rsel
switch (rsel) {
u32 rsel = nvkm_rd32(device, 0x00e18c);
case 0x4028: id = !!(rsel & 0x00000004); break;
case 0x4008: id = !!(rsel & 0x00000008); break;
rsel = nvkm_rd32(device, 0x00c050);
case 0x4020: rsel = (rsel & 0x00000003) >> 0; break;
case 0x4008: rsel = (rsel & 0x0000000c) >> 2; break;
case 0x4028: rsel = (rsel & 0x00001800) >> 11; break;
case 0x4030: rsel = 3; break;
state->rsel) < 0)
state->deci = 0; state->csel = 0; state->rsel = 0;
state->deci = 0; state->csel = 0; state->rsel = 1;
state->deci = 0; state->csel = 1; state->rsel = 0;
int rsel;
state->deci = 0; state->csel = 1; state->rsel = 1;
state->deci = 1; state->csel = 0; state->rsel = 0;
state->deci = 1; state->csel = 0; state->rsel = 1;
state->deci = 1; state->csel = 1; state->rsel = 0;
state->deci = 1; state->csel = 1; state->rsel = 1;
state->deci = 2; state->csel = 0; state->rsel = 0;
state->deci = 2; state->csel = 0; state->rsel = 1;
state->deci = 2; state->csel = 1; state->rsel = 0;
state->deci = 2; state->csel = 1; state->rsel = 1;
state->deci = 3; state->csel = 0; state->rsel = 0;
state->deci = 3; state->csel = 0; state->rsel = 1;
state->deci = 3; state->csel = 1; state->rsel = 0;
state->deci = 3; state->csel = 1; state->rsel = 1;
state->deci = 4; state->csel = 0; state->rsel = 0;
state->deci = 4; state->csel = 0; state->rsel = 1;
state->deci = 4; state->csel = 1; state->rsel = 0;
state->deci = 4; state->csel = 1; state->rsel = 1;
state->deci = 5; state->csel = 0; state->rsel = 0;
state->deci = 5; state->csel = 0; state->rsel = 1;
state->deci = 5; state->csel = 1; state->rsel = 0;
state->deci = 5; state->csel = 1; state->rsel = 1;
struct v4l2_rect r, *rsel;
rsel = &q_data->rect;
rsel = &r;
rsel = &r;
s->r = *rsel;
const struct mtk_pin_rsel *rsel;
rsel = hw->soc->pin_rsel;
if (desc->number >= rsel[check].s_pin &&
desc->number <= rsel[check].e_pin) {
if (rsel[check].up_rsel == arg) {
*rsel_val = rsel[check].rsel_index;
if (rsel[check].down_rsel == arg) {
*rsel_val = rsel[check].rsel_index;
const struct mtk_pin_rsel *rsel;
rsel = hw->soc->pin_rsel;
if (desc->number >= rsel[check].s_pin &&
desc->number <= rsel[check].e_pin) {
if (rsel_val == rsel[check].rsel_index) {
*si_unit = rsel[check].up_rsel;
*si_unit = rsel[check].down_rsel;
int pu, pd, rsel, err;
err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel);
mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable);
*enable = rsel + MTK_PULL_SET_RSEL_000;
mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable);
*enable = rsel + MTK_PULL_SET_RSEL_000;
int pinmux, pullup = 0, pullen = 0, len = 0, r1 = -1, r0 = -1, rsel = -1;
rsel = pullen;
rsel = pullen - MTK_PULL_SET_RSEL_000;
else if (rsel != -1)
len += scnprintf(buf + len, buf_len - len, " (%1d)", rsel);
enum rt9467_ranges rsel,
const struct linear_range *range = rt9467_ranges + rsel;
enum rt9467_ranges rsel,
const struct linear_range *range = rt9467_ranges + rsel;
if (rsel == RT9467_RANGE_VMIVR) {
enum rt9756_fields field, enum rt9756_ranges rsel, int *val)
const struct linear_range *range = rt9756_chg_ranges + rsel;
enum rt9756_fields field, enum rt9756_ranges rsel, int val)
const struct linear_range *range = rt9756_chg_ranges + rsel;
struct gpio_desc *rsel;
rsel = devm_gpiod_get_optional(dev, "regulator-select", GPIOD_IN);
if (IS_ERR(rsel))
return PTR_ERR(rsel);
if (rsel) {
gpiod_set_consumer_name(rsel, "DA9055 rsel GPI");
u32 ohms, rsel;
rsel = BAT_CHARGE_RSEL_2K_OHM;
rsel = BAT_CHARGE_RSEL_250_OHM;
rsel = BAT_CHARGE_RSEL_50_OHM;
rsel = BAT_CHARGE_RSEL_0_OHM;
writel(BAT_CHARGE_RSEL_MASK_BIT | rsel, sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
udc_regs->rsel = UDC_RSEL_SEND;
udc_regs->rsel = UDC_RSEL_RECV;
unsigned short rsel; /* select regs to load */