arch/arm64/kvm/sys_regs.c

1020

reset_unknown(vcpu, r);

arch/arm64/kvm/sys_regs.c

1028

reset_unknown(vcpu, r);

arch/arm64/kvm/sys_regs.c

1040

reset_unknown(vcpu, r);

arch/arm64/kvm/sys_regs.c

1048

reset_unknown(vcpu, r);

arch/arm64/kvm/sys_regs.c

1524

{ SYS_DESC(SYS_## k), undef_access, reset_unknown, k, \

arch/arm64/kvm/sys_regs.c

2615

.reset = reset_unknown, \

arch/arm64/kvm/sys_regs.c

3390

{ SYS_DESC(SYS_TTBR0_EL1), access_vm_reg, reset_unknown, TTBR0_EL1 },

arch/arm64/kvm/sys_regs.c

3391

{ SYS_DESC(SYS_TTBR1_EL1), access_vm_reg, reset_unknown, TTBR1_EL1 },

arch/arm64/kvm/sys_regs.c

3407

{ SYS_DESC(SYS_AFSR0_EL1), access_vm_reg, reset_unknown, AFSR0_EL1 },

arch/arm64/kvm/sys_regs.c

3408

{ SYS_DESC(SYS_AFSR1_EL1), access_vm_reg, reset_unknown, AFSR1_EL1 },

arch/arm64/kvm/sys_regs.c

3409

{ SYS_DESC(SYS_ESR_EL1), access_vm_reg, reset_unknown, ESR_EL1 },

arch/arm64/kvm/sys_regs.c

3428

{ SYS_DESC(SYS_FAR_EL1), access_vm_reg, reset_unknown, FAR_EL1 },

arch/arm64/kvm/sys_regs.c

3429

{ SYS_DESC(SYS_PAR_EL1), NULL, reset_unknown, PAR_EL1 },

arch/arm64/kvm/sys_regs.c

3453

{ SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 },

arch/arm64/kvm/sys_regs.c

3454

{ SYS_DESC(SYS_PIRE0_EL1), NULL, reset_unknown, PIRE0_EL1,

arch/arm64/kvm/sys_regs.c

3456

{ SYS_DESC(SYS_PIR_EL1), NULL, reset_unknown, PIR_EL1,

arch/arm64/kvm/sys_regs.c

3458

{ SYS_DESC(SYS_POR_EL1), NULL, reset_unknown, POR_EL1,

arch/arm64/kvm/sys_regs.c

3507

{ SYS_DESC(SYS_TPIDR_EL1), NULL, reset_unknown, TPIDR_EL1 },

arch/arm64/kvm/sys_regs.c

3519

{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },

arch/arm64/kvm/sys_regs.c

3554

.access = access_pmu_evcntr, .reset = reset_unknown,

arch/arm64/kvm/sys_regs.c

3571

{ SYS_DESC(SYS_POR_EL0), NULL, reset_unknown, POR_EL0,

arch/arm64/kvm/sys_regs.c

3573

{ SYS_DESC(SYS_TPIDR_EL0), NULL, reset_unknown, TPIDR_EL0 },

arch/arm64/kvm/sys_regs.c

3574

{ SYS_DESC(SYS_TPIDRRO_EL0), NULL, reset_unknown, TPIDRRO_EL0 },

arch/arm64/kvm/sys_regs.c

3737

EL2_REG_VNCR(VPIDR_EL2, reset_unknown, 0),

arch/arm64/kvm/sys_regs.c

3738

EL2_REG_VNCR(VMPIDR_EL2, reset_unknown, 0),

arch/arm64/kvm/sys_regs.c

3767

{ SYS_DESC(SYS_DACR32_EL2), undef_access, reset_unknown, DACR32_EL2 },

arch/arm64/kvm/sys_regs.c

3786

{ SYS_DESC(SYS_IFSR32_EL2), undef_access, reset_unknown, IFSR32_EL2 },

arch/arm64/kvm/sys_regs.c

3790

EL2_REG_VNCR(VSESR_EL2, reset_unknown, 0),

arch/arm64/kvm/sys_regs.c

3819

EL2_REG_VNCR(VDISR_EL2, reset_unknown, 0),

arch/arm64/kvm/sys_regs.c

3879

EL2_REG(SP_EL2, NULL, reset_unknown, 0),