rtase_w32
rtase_w32(tp, ivec->imr_addr, ivec->imr);
rtase_w32(tp, ivec->imr_addr, 0x0);
rtase_w32(tp, ivec->isr_addr, status & ~RTASE_FOVW);
rtase_w32(tp, ivec->imr_addr, ivec->imr);
rtase_w32(tp, RTASE_MAC0, rar_low);
rtase_w32(tp, RTASE_MAC4, rar_high);
rtase_w32(tp, RTASE_DTCCR4, upper_32_bits(paddr));
rtase_w32(tp, RTASE_DTCCR0, cmd);
rtase_w32(tp, RTASE_DTCCR0, cmd | RTASE_COUNTER_DUMP);
rtase_w32(tp, RTASE_TXQCRDT_0 + queue * 4, val);
rtase_w32(tp, RTASE_TXQCRDT_0 + queue * 4, 0);
rtase_w32(tp, RTASE_VLAN_ENTRY_0 + i * 4, 0);
rtase_w32(tp, RTASE_DTCCR4, upper_32_bits(tp->tally_paddr));
rtase_w32(tp, RTASE_DTCCR0, lower_32_bits(tp->tally_paddr));
rtase_w32(tp, RTASE_DTCCR4, upper_32_bits(tp->tally_paddr));
rtase_w32(tp, RTASE_DTCCR0, cmd | RTASE_COUNTER_RESET);
rtase_w32(tp, RTASE_TX_DESC_ADDR0,
rtase_w32(tp, RTASE_TX_DESC_ADDR4,
rtase_w32(tp, RTASE_Q0_RX_DESC_ADDR0,
rtase_w32(tp, RTASE_Q0_RX_DESC_ADDR4,
rtase_w32(tp, (RTASE_Q1_RX_DESC_ADDR0 + ((i - 1) * 8)),
rtase_w32(tp, (RTASE_Q1_RX_DESC_ADDR4 + ((i - 1) * 8)),
rtase_w32(tp, RTASE_MAR0, swab32(mc_filter[1]));
rtase_w32(tp, RTASE_MAR1, swab32(mc_filter[0]));
rtase_w32(tp, ivec->imr_addr, 0);
rtase_w32(tp, ivec->isr_addr, val1);
rtase_w32(tp, RTASE_TX_CONFIG_0, reg_data32);