drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6078

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6079

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6080

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2703

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2706

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2712

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2715

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2826

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2829

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2835

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2838

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2986

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2987

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2991

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2992

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3008

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3009

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3013

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3014

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3131

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3132

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3315

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3318

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3324

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3327

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3534

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3537

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3543

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3546

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6786

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6788

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6790

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6792

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6796

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6798

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6800

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6802

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2136

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2137

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2141

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2142

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2158

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2159

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2163

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2164

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2216

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2219

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2225

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2228

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2258

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2261

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2267

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2270

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2337

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2338

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5249

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5251

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5253

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5255

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5259

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5261

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5263

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5265

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4089

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4090

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4091

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4093

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4094

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4095

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3249

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_INVALIDATE_ICACHE, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3250

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_INVALIDATE_ICACHE, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3251

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_INVALIDATE_ICACHE, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3252

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_PIPE0_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3253

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_PIPE1_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3254

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3255

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3256

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3257

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3258

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3259

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3260

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, enable ? 0 : 1);

drivers/gpu/drm/radeon/cik.c

3866

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

3870

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));

drivers/gpu/drm/radeon/cik.c

4947

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/cik.c

5151

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/evergreen.c

3022

WREG32(CP_ME_CNTL, cp_me);

drivers/gpu/drm/radeon/evergreen.c

3914

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/evergreen.c

4024

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/ni.c

1438

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/ni.c

1442

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));

drivers/gpu/drm/radeon/ni.c

1820

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/rv770.c

1084

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));

drivers/gpu/drm/radeon/si.c

3443

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/si.c

3447

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));

drivers/gpu/drm/radeon/si.c

3860

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/si.c

4029

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);