rt2800_rfcsr_write_bank
rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0xC1);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x20);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x02);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 5, 0x31);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0xF1);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x18);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x02);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 8, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, rf_val);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, saverfb5r00);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, saverfb5r01);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, saverfb5r03);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r04);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 5, saverfb5r05);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, saverfb5r06);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, saverfb5r07);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 8, saverfb5r08);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, saverfb5r17);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, saverfb5r18);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, saverfb5r19);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, saverfb5r20);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 37, saverfb5r37);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 38, saverfb5r38);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 39, saverfb5r39);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 40, saverfb5r40);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 41, saverfb5r41);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 42, saverfb5r42);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 43, saverfb5r43);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 44, saverfb5r44);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 45, saverfb5r45);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 46, saverfb5r46);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, saverfb5r58);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, saverfb5r59);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69);
rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20);
rt2800_rfcsr_write_bank(rt2x00dev, 4, reg, value);
rt2800_rfcsr_write_bank(rt2x00dev, 6, reg, value);
rt2800_rfcsr_write_bank(rt2x00dev, 5, reg, value);
rt2800_rfcsr_write_bank(rt2x00dev, 7, reg, value);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 6, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 7, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 58, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 59, rfcsr);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, 0x4);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, rfb5r1_org);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, 0x4);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, rfb7r1_org);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, 0x27);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, 0x80);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0x83);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x00);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x20);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, 0x00);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, 0x13);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x00);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x01);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 7, r_cal_code);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, saverfb0r1);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, saverfb0r34);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, saverfb0r35);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, saverfb5r17);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, saverfb5r18);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, saverfb5r19);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, saverfb5r20);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfvalue);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 4, saverfb7r4);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, saverfb0r2);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfb0r1);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfb0r2);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfb0r42);
rt2800_rfcsr_write_bank(rt2x00dev, 4, 0, rfb4r0);
rt2800_rfcsr_write_bank(rt2x00dev, 4, 19, rfb4r19);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, rfb5r3);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, rfb5r4);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, rfb5r17);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, rfb5r18);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, rfb5r19);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, rfb5r20);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 0, rfb6r0);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 19, rfb6r19);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 3, rfb7r3);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 4, rfb7r4);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 17, rfb7r17);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 18, rfb7r18);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 19, rfb7r19);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 20, rfb7r20);
rt2800_rfcsr_write_bank(rt2x00dev, bank, rf_register, value);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, 0x21);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, 0x10);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x00);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, 0x1b);
rt2800_rfcsr_write_bank(rt2x00dev, 4, 0, 0x81);
rt2800_rfcsr_write_bank(rt2x00dev, 4, 2, 0x81);
rt2800_rfcsr_write_bank(rt2x00dev, 4, 34, 0xee);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, 0x2d);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, 0x2d);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, 0x80);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0xd7);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0xa2);
rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x20);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, 0x22);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, 0x20);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x00);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, 0x4b);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 0, 0x81);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 2, 0x81);
rt2800_rfcsr_write_bank(rt2x00dev, 6, 34, 0xee);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 3, 0x2d);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 4, 0x2d);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 17, 0x80);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 18, 0xd7);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 19, 0xa2);
rt2800_rfcsr_write_bank(rt2x00dev, 7, 20, 0x20);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 39, 0x80);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, 0x5B);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 39, rfb0r39);
rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfb0r42);