rt2800_register_read
MAC_RF_CONTROL0 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
reg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
reg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
reg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
reg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
reg = rt2800_register_read(rt2x00dev, efuse_ctrl_reg);
reg = rt2800_register_read(rt2x00dev, MAC_DEBUG_INDEX);
reg = rt2800_register_read(rt2x00dev, MAC_CSR0_3290);
reg = rt2800_register_read(rt2x00dev, MAC_CSR0);
reg = rt2800_register_read(rt2x00dev, GPIO_CTRL);
reg = rt2800_register_read(rt2x00dev, TX_RTS_CFG);
reg = rt2800_register_read(rt2x00dev, CCK_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, OFDM_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, MM20_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, MM40_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, GF20_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, GF40_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, offset);
reg = rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG);
reg = rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG);
reg = rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG);
reg = rt2800_register_read(rt2x00dev, offset);
reg = rt2800_register_read(rt2x00dev, TSF_TIMER_DW1);
reg = rt2800_register_read(rt2x00dev, TSF_TIMER_DW0);
chan_survey->time_idle += rt2800_register_read(rt2x00dev, CH_IDLE_STA);
chan_survey->time_busy += rt2800_register_read(rt2x00dev, CH_BUSY_STA);
chan_survey->time_ext_busy += rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC);
u32 reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
u32 reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
bssid_dw1 = rt2800_register_read(rt2x00dev, MAC_BSSID_DW1);
reg = rt2800_register_read(rt2x00dev, BCN_TIME_CFG);
orig_reg = rt2800_register_read(rt2x00dev, BCN_TIME_CFG);
.read = rt2800_register_read,
reg = rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL);
reg = rt2800_register_read(rt2x00dev, GPIO_CTRL);
reg = rt2800_register_read(led->rt2x00dev, LED_CFG);
reg = rt2800_register_read(rt2x00dev, offset);
reg = rt2800_register_read(rt2x00dev, offset);
reg = rt2800_register_read(rt2x00dev, offset);
reg = rt2800_register_read(rt2x00dev, offset);
reg = rt2800_register_read(rt2x00dev, MAX_LEN_CFG);
reg = rt2800_register_read(rt2x00dev, RX_FILTER_CFG);
reg = rt2800_register_read(rt2x00dev, BCN_TIME_CFG);
reg = rt2800_register_read(rt2x00dev, TBTT_SYNC_CFG);
reg = rt2800_register_read(rt2x00dev, TBTT_SYNC_CFG);
reg = rt2800_register_read(rt2x00dev, MM20_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, MM40_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, GF20_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, GF40_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, AUTO_RSP_CFG);
reg = rt2800_register_read(rt2x00dev, OFDM_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG);
reg = rt2800_register_read(rt2x00dev, XIFS_TIME_CFG);
reg = rt2800_register_read(rt2x00dev, BCN_TIME_CFG);
reg = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
reg = rt2800_register_read(rt2x00dev, GPIO_SWITCH);
reg = rt2800_register_read(rt2x00dev, LED_CFG);
reg = rt2800_register_read(rt2x00dev, E2PROM_CSR);
reg = rt2800_register_read(rt2x00dev, GPIO_CTRL);
reg = rt2800_register_read(rt2x00dev, GPIO_CTRL);
reg = rt2800_register_read(rt2x00dev, LDO_CFG0);
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_0);
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
mac_sys_ctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
reg = rt2800_register_read(rt2x00dev, TX_BAND_CFG);
tx_pin = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
reg = rt2800_register_read(rt2x00dev, GPIO_CTRL);
reg = rt2800_register_read(rt2x00dev, CH_IDLE_STA);
reg = rt2800_register_read(rt2x00dev, CH_BUSY_STA);
reg = rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC);
reg = rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL);
reg = rt2800_register_read(rt2x00dev, CMB_CTRL);
reg = rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL);
reg = rt2800_register_read(rt2x00dev, TX_PWR_CFG_1);
reg = rt2800_register_read(rt2x00dev, TX_PWR_CFG_2);
reg = rt2800_register_read(rt2x00dev, TX_PWR_CFG_3);
reg = rt2800_register_read(rt2x00dev, TX_PWR_CFG_4);
reg = rt2800_register_read(rt2x00dev, offset);
reg = rt2800_register_read(rt2x00dev, MAC_CSR0);
tx_pin = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
tx_pin = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
reg = rt2800_register_read(rt2x00dev, TX_RTY_CFG);
reg = rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG);
reg = rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG);
reg = rt2800_register_read(rt2x00dev, RX_STA_CNT0);
reg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
reg = rt2800_register_read(rt2x00dev, BCN_TIME_CFG);
reg = rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG);
reg = rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL);
reg = rt2800_register_read(rt2x00dev, CMB_CTRL);
reg = rt2800_register_read(rt2x00dev, OSC_CTRL);
reg = rt2800_register_read(rt2x00dev, COEX_CFG0);
reg = rt2800_register_read(rt2x00dev, COEX_CFG2);
reg = rt2800_register_read(rt2x00dev, PLL_CTRL);
reg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
reg = rt2800_register_read(rt2x00dev, TX_LINK_CFG);
reg = rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG);
reg = rt2800_register_read(rt2x00dev, MAX_LEN_CFG);
reg = rt2800_register_read(rt2x00dev, LED_CFG);
reg = rt2800_register_read(rt2x00dev, TX_RTY_CFG);
reg = rt2800_register_read(rt2x00dev, AUTO_RSP_CFG);
reg = rt2800_register_read(rt2x00dev, CCK_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, OFDM_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, MM20_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, MM40_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, GF20_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, GF40_PROT_CFG);
reg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
reg = rt2800_register_read(rt2x00dev, TXOP_CTRL_CFG);
reg = rt2800_register_read(rt2x00dev, TX_RTS_CFG);
reg = rt2800_register_read(rt2x00dev, XIFS_TIME_CFG);
reg = rt2800_register_read(rt2x00dev, US_CYC_CNT);
reg = rt2800_register_read(rt2x00dev, US_CYC_CNT);
reg = rt2800_register_read(rt2x00dev, US_CYC_CNT);
reg = rt2800_register_read(rt2x00dev, HT_FBK_CFG0);
reg = rt2800_register_read(rt2x00dev, HT_FBK_CFG1);
reg = rt2800_register_read(rt2x00dev, LG_FBK_CFG0);
reg = rt2800_register_read(rt2x00dev, LG_FBK_CFG1);
reg = rt2800_register_read(rt2x00dev, AMPDU_BA_WINSIZE);
reg = rt2800_register_read(rt2x00dev, RX_STA_CNT0);
reg = rt2800_register_read(rt2x00dev, RX_STA_CNT1);
reg = rt2800_register_read(rt2x00dev, RX_STA_CNT2);
reg = rt2800_register_read(rt2x00dev, TX_STA_CNT0);
reg = rt2800_register_read(rt2x00dev, TX_STA_CNT1);
reg = rt2800_register_read(rt2x00dev, TX_STA_CNT2);
reg = rt2800_register_read(rt2x00dev, INT_TIMER_CFG);
reg = rt2800_register_read(rt2x00dev, CH_TIME_CFG);
reg = rt2800_register_read(rt2x00dev, GPIO_CTRL);
reg = rt2800_register_read(rt2x00dev, OPT_14_CSR);
reg = rt2800_register_read(rt2x00dev, AUX_CTRL);
reg = rt2800_register_read(rt2x00dev, PBF_SYS_CTRL);
reg = rt2800_register_read(rt2x00dev, LDO_CFG0);
reg = rt2800_register_read(rt2x00dev, LDO_CFG0);
reg = rt2800_register_read(rt2x00dev, GPIO_SWITCH);
reg = rt2800_register_read(rt2x00dev, GPIO_SWITCH);
reg = rt2800_register_read(rt2x00dev, LDO_CFG0);
reg = rt2800_register_read(rt2x00dev, LDO_CFG0);
reg = rt2800_register_read(rt2x00dev, GPIO_SWITCH);
reg = rt2800_register_read(rt2x00dev, LDO_CFG0);
reg = rt2800_register_read(rt2x00dev, LDO_CFG0);
mac0518 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
mac051c = rt2800_register_read(rt2x00dev, RF_BYPASS0);
mac0528 = rt2800_register_read(rt2x00dev, RF_CONTROL2);
mac052c = rt2800_register_read(rt2x00dev, RF_BYPASS2);
savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
MAC_RF_CONTROL0 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
MAC_PWR_PIN_CFG = rt2800_register_read(rt2x00dev, PWR_PIN_CFG);
maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
macvalue = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
orig_RF_CONTROL0 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
orig_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
orig_RF_CONTROL1 = rt2800_register_read(rt2x00dev, RF_CONTROL1);
orig_RF_BYPASS1 = rt2800_register_read(rt2x00dev, RF_BYPASS1);
orig_RF_CONTROL3 = rt2800_register_read(rt2x00dev, RF_CONTROL3);
orig_RF_BYPASS3 = rt2800_register_read(rt2x00dev, RF_BYPASS3);
macvalue = rt2800_register_read(rt2x00dev, 0x057C);
macvalue = rt2800_register_read(rt2x00dev, 0x057C);
macvalue = rt2800_register_read(rt2x00dev, 0x057C);
savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
macorg1 = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
macorg2 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
macorg3 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
macorg4 = rt2800_register_read(rt2x00dev, RF_CONTROL3);
macorg5 = rt2800_register_read(rt2x00dev, RF_BYPASS3);
mac13b8 = rt2800_register_read(rt2x00dev, 0x13b8);
orig528 = rt2800_register_read(rt2x00dev, RF_CONTROL2);
orig52c = rt2800_register_read(rt2x00dev, RF_BYPASS2);
macvalue = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
macvalue = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
macvalue = rt2800_register_read(rt2x00dev, RF_CONTROL3);
savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
macorg1 = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
macorg2 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
macorg3 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
macorg4 = rt2800_register_read(rt2x00dev, RF_CONTROL3);
macorg5 = rt2800_register_read(rt2x00dev, RF_BYPASS3);
mac13b8 = rt2800_register_read(rt2x00dev, 0x13b8);
macvalue = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
macvalue = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);