drivers/crypto/caam/ctrl.c

1030

if (!reg_access)

drivers/crypto/caam/ctrl.c

1137

if (reg_access) {

drivers/crypto/caam/ctrl.c

873

bool reg_access = true;

drivers/crypto/caam/ctrl.c

902

reg_access = !ctrlpriv->optee_en;

drivers/crypto/caam/ctrl.c

910

reg_access = reg_access && imx_soc_data->page0_access;

drivers/crypto/caam/ctrl.c

911

ctrlpriv->no_page0 = !reg_access;

drivers/crypto/caam/ctrl.c

963

if (reg_access && comp_params & CTPR_MS_PS &&

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

587

adev->virt.reg_access = pf2vf->reg_access_flags.all;

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

318

uint32_t reg_access;

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

378

((adev)->virt.reg_access & (AMDGIM_FEATURE_IH_REG_PSP_EN)))

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

382

((adev)->virt.reg_access & (AMDGIM_FEATURE_MMHUB_REG_RLC_EN)))

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

386

((adev)->virt.reg_access & (AMDGIM_FEATURE_GC_REG_RLC_EN)))

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

390

((adev)->virt.reg_access & (AMDGIM_FEATURE_L1_TLB_CNTL_PSP_EN)))

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

397

((adev)->virt.reg_access & (AMDGIM_FEATURE_REG_ACCESS_SQ_CONFIG)))

drivers/media/i2c/ccs/ccs-quirk.h

47

int (*reg_access)(struct ccs_sensor *sensor, bool write, u32 *reg,

drivers/media/i2c/ccs/ccs-reg-access.c

177

rval = ccs_call_quirk(sensor, reg_access, false, &reg, val);

drivers/media/i2c/ccs/ccs-reg-access.c

216

rval = ccs_call_quirk(sensor, reg_access, true, &reg, &val);

tools/testing/selftests/powerpc/pmu/ebb/reg_access_test.c

39

return test_harness(reg_access, "reg_access");