drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

187

value = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_CP_SCHEDULERS));

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

190

WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_CP_SCHEDULERS), value);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4100

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4103

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2955

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2958

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3880

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3882

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2136

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2139

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2141

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2894

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2896

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1807

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1810

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1562

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1565

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1573

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1575

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1736

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1739

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1731

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1734

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1736

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);