Symbol: rps_to_gt
drivers/gpu/drm/i915/gt/intel_rps.c
1051
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
drivers/gpu/drm/i915/gt/intel_rps.c
1053
queue_work(rps_to_gt(rps)->i915->unordered_wq,
drivers/gpu/drm/i915/gt/intel_rps.c
1066
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
drivers/gpu/drm/i915/gt/intel_rps.c
1070
queue_work(rps_to_gt(rps)->i915->unordered_wq, &rps->work);
drivers/gpu/drm/i915/gt/intel_rps.c
1122
u32 rp_state_cap = rps_to_gt(rps)->type == GT_MEDIA ?
drivers/gpu/drm/i915/gt/intel_rps.c
1125
u32 rpe = rps_to_gt(rps)->type == GT_MEDIA ?
drivers/gpu/drm/i915/gt/intel_rps.c
1210
if (snb_pcode_read(rps_to_gt(rps)->uncore,
drivers/gpu/drm/i915/gt/intel_rps.c
1241
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
1288
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
1538
for_each_engine(engine, rps_to_gt(rps), id) {
drivers/gpu/drm/i915/gt/intel_rps.c
1558
intel_gt_check_clock_frequency(rps_to_gt(rps));
drivers/gpu/drm/i915/gt/intel_rps.c
1581
GT_TRACE(rps_to_gt(rps),
drivers/gpu/drm/i915/gt/intel_rps.c
1823
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
1912
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
1930
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
198
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
2020
rps_to_gt(rps)->defaults.max_freq = rps->max_freq_softlimit;
drivers/gpu/drm/i915/gt/intel_rps.c
2022
rps_to_gt(rps)->defaults.min_freq = rps->min_freq_softlimit;
drivers/gpu/drm/i915/gt/intel_rps.c
2028
snb_pcode_read(rps_to_gt(rps)->uncore, GEN6_READ_OC_PARAMS, &params, NULL);
drivers/gpu/drm/i915/gt/intel_rps.c
2040
rps_to_gt(rps)->defaults.rps_up_threshold = rps->power.up_threshold;
drivers/gpu/drm/i915/gt/intel_rps.c
2042
rps_to_gt(rps)->defaults.rps_down_threshold = rps->power.down_threshold;
drivers/gpu/drm/i915/gt/intel_rps.c
2066
if (intel_uc_uses_guc_submission(&rps_to_gt(rps)->uc))
drivers/gpu/drm/i915/gt/intel_rps.c
2086
return intel_uncore_read(rps_to_gt(rps)->uncore, rpstat);
drivers/gpu/drm/i915/gt/intel_rps.c
217
gen6_gt_pm_reset_iir(rps_to_gt(rps), GEN6_PM_RPS_EVENTS);
drivers/gpu/drm/i915/gt/intel_rps.c
222
while (gen11_gt_reset_one_iir(rps_to_gt(rps), 0, GEN11_GTPM))
drivers/gpu/drm/i915/gt/intel_rps.c
2267
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
228
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
242
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
2430
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
2711
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
2753
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
47
return rps_to_gt(rps)->i915;
drivers/gpu/drm/i915/gt/intel_rps.c
52
return rps_to_gt(rps)->uncore;
drivers/gpu/drm/i915/gt/intel_rps.c
57
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
64
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
682
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
788
GT_TRACE(rps_to_gt(rps), "mark interactive: %s\n",
drivers/gpu/drm/i915/gt/intel_rps.c
82
struct intel_gt *gt = rps_to_gt(rps);
drivers/gpu/drm/i915/gt/intel_rps.c
820
GT_TRACE(rps_to_gt(rps), "set val:%x, freq:%d, swreq:%x\n",
drivers/gpu/drm/i915/gt/intel_rps.c
835
GT_TRACE(rps_to_gt(rps), "set val:%x, freq:%d\n",
drivers/gpu/drm/i915/gt/intel_rps.c
870
GT_TRACE(rps_to_gt(rps), "unpark:%x\n", rps->cur_freq);
drivers/gpu/drm/i915/gt/intel_rps.c
953
GT_TRACE(rps_to_gt(rps), "park:%x\n", rps->cur_freq);
drivers/gpu/drm/i915/gt/intel_rps.c
985
queue_work(rps_to_gt(rps)->i915->unordered_wq, &rps->work);
drivers/gpu/drm/i915/gt/selftest_rps.c
530
snb_pcode_read(rps_to_gt(rps)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE,
drivers/gpu/drm/i915/gt/selftest_slpc.c
252
struct intel_gt *gt = rps_to_gt(rps);