Symbol: regCP_HQD_PQ_DOORBELL_CONTROL
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
309
WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
205
WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL), data);
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
233
SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
4481
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
4542
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
167
SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
3318
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
3379
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
2324
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
2377
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
128
SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
1860
tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
1981
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
2050
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
2106
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000);
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
2107
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1237
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1240
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1271
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1539
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1544
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1546
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1396
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1399
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1430
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1711
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1716
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1718
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1372
data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1375
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1406
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1706
data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1711
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1713
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0);