arch/alpha/include/asm/io.h
557
extern u32 readl_relaxed(const volatile void __iomem *addr);
arch/alpha/include/asm/io.h
561
#define readl_relaxed readl_relaxed
arch/alpha/kernel/io.c
271
EXPORT_SYMBOL(readl_relaxed);
arch/arc/include/asm/io.h
198
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
arch/arm/common/sa1111.c
1000
save->wakeen0 = readl_relaxed(base + SA1111_WAKEEN0);
arch/arm/common/sa1111.c
1001
save->wakeen1 = readl_relaxed(base + SA1111_WAKEEN1);
arch/arm/common/sa1111.c
1006
val = readl_relaxed(sachip->base + SA1111_SKCR);
arch/arm/common/sa1111.c
1044
id = readl_relaxed(sachip->base + SA1111_SKID);
arch/arm/common/sa1111.c
1186
skcdr = readl_relaxed(sachip->base + SA1111_SKCDR);
arch/arm/common/sa1111.c
1228
val = readl_relaxed(sachip->base + SA1111_SKCR);
arch/arm/common/sa1111.c
1277
div = readl_relaxed(sachip->base + SA1111_SKAUD) + 1;
arch/arm/common/sa1111.c
1303
val = readl_relaxed(sachip->base + SA1111_SKPCR);
arch/arm/common/sa1111.c
1322
val = readl_relaxed(sachip->base + SA1111_SKPCR);
arch/arm/common/sa1111.c
214
stat0 = readl_relaxed(mapbase + SA1111_INTSTATCLR0);
arch/arm/common/sa1111.c
215
stat1 = readl_relaxed(mapbase + SA1111_INTSTATCLR1);
arch/arm/common/sa1111.c
262
ie = readl_relaxed(mapbase + SA1111_INTEN0);
arch/arm/common/sa1111.c
273
ie = readl_relaxed(mapbase + SA1111_INTEN0);
arch/arm/common/sa1111.c
292
ip = readl_relaxed(mapbase + SA1111_INTPOL0);
arch/arm/common/sa1111.c
296
if (readl_relaxed(mapbase + SA1111_INTSTATCLR0) & mask)
arch/arm/common/sa1111.c
321
ip = readl_relaxed(mapbase + SA1111_INTPOL0);
arch/arm/common/sa1111.c
338
we = readl_relaxed(mapbase + SA1111_WAKEEN0);
arch/arm/common/sa1111.c
509
val = readl_relaxed(reg);
arch/arm/common/sa1111.c
521
return !!(readl_relaxed(reg + SA1111_GPIO_PXDDR) & mask);
arch/arm/common/sa1111.c
563
return !!(readl_relaxed(reg + SA1111_GPIO_PXDRR) & mask);
arch/arm/common/sa1111.c
654
r = readl_relaxed(sachip->base + SA1111_SKCR);
arch/arm/common/sa1111.c
837
id = readl_relaxed(sachip->base + SA1111_SKID);
arch/arm/common/sa1111.c
885
val = readl_relaxed(sachip->base + SA1111_SKPCR);
arch/arm/common/sa1111.c
983
save->skcr = readl_relaxed(base + SA1111_SKCR);
arch/arm/common/sa1111.c
984
save->skpcr = readl_relaxed(base + SA1111_SKPCR);
arch/arm/common/sa1111.c
985
save->skcdr = readl_relaxed(base + SA1111_SKCDR);
arch/arm/common/sa1111.c
986
save->skaud = readl_relaxed(base + SA1111_SKAUD);
arch/arm/common/sa1111.c
987
save->skpwm0 = readl_relaxed(base + SA1111_SKPWM0);
arch/arm/common/sa1111.c
988
save->skpwm1 = readl_relaxed(base + SA1111_SKPWM1);
arch/arm/common/sa1111.c
994
save->intpol0 = readl_relaxed(base + SA1111_INTPOL0);
arch/arm/common/sa1111.c
995
save->intpol1 = readl_relaxed(base + SA1111_INTPOL1);
arch/arm/common/sa1111.c
996
save->inten0 = readl_relaxed(base + SA1111_INTEN0);
arch/arm/common/sa1111.c
997
save->inten1 = readl_relaxed(base + SA1111_INTEN1);
arch/arm/common/sa1111.c
998
save->wakepol0 = readl_relaxed(base + SA1111_WAKEPOL0);
arch/arm/common/sa1111.c
999
save->wakepol1 = readl_relaxed(base + SA1111_WAKEPOL1);
arch/arm/include/asm/arch_gicv3.h
154
val = readl_relaxed(addr);
arch/arm/include/asm/arch_gicv3.h
155
val |= (u64)readl_relaxed(addr + 4) << 32;
arch/arm/include/asm/arch_gicv3.h
190
#define gic_read_lpir(c) readl_relaxed(c)
arch/arm/include/asm/arch_gicv3.h
223
tmp = readl_relaxed(addr + 4);
arch/arm/include/asm/io.h
297
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
arch/arm/kernel/io.c
21
value = readl_relaxed(reg) & ~mask;
arch/arm/kernel/io.c
34
value = readl_relaxed(reg) & ~mask;
arch/arm/kernel/smp_scu.c
31
unsigned int ncores = readl_relaxed(scu_base + SCU_CONFIG);
arch/arm/kernel/smp_scu.c
45
scu_ctrl = readl_relaxed(scu_base + 0x30);
arch/arm/kernel/smp_scu.c
51
scu_ctrl = readl_relaxed(scu_base + SCU_CTRL);
arch/arm/kernel/smp_twd.c
170
count = readl_relaxed(twd_base + TWD_TIMER_COUNTER);
arch/arm/kernel/smp_twd.c
66
unsigned long ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL);
arch/arm/kernel/smp_twd.c
84
if (readl_relaxed(twd_base + TWD_TIMER_INTSTAT)) {
arch/arm/mach-bcm/platsmp-brcmstb.c
122
val = readl_relaxed(cpubiuctrl_block + cpu_rst_cfg_reg);
arch/arm/mach-bcm/platsmp-brcmstb.c
85
return readl_relaxed(base);
arch/arm/mach-bcm/platsmp.c
200
while (!timeout && readl_relaxed(boot_reg) == boot_val)
arch/arm/mach-dove/irq.c
47
stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
arch/arm/mach-dove/irq.c
48
stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
arch/arm/mach-dove/irq.c
54
stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
arch/arm/mach-dove/irq.c
55
stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
arch/arm/mach-exynos/common.h
170
return readl_relaxed(pmu_base_addr + offset);
arch/arm/mach-exynos/exynos.c
98
exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID);
arch/arm/mach-exynos/firmware.c
115
*boot_addr = readl_relaxed(boot_reg);
arch/arm/mach-exynos/firmware.c
245
tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4);
arch/arm/mach-exynos/firmware.c
258
tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4);
arch/arm/mach-exynos/platsmp.c
310
*boot_addr = readl_relaxed(boot_reg);
arch/arm/mach-exynos/suspend.c
343
pm_state.cpu_state = readl_relaxed(pm_state.sysram_base +
arch/arm/mach-hisi/hotplug.c
104
val = readl_relaxed(ctrl_base + SCPERCTRL0);
arch/arm/mach-hisi/hotplug.c
114
val = readl_relaxed(ctrl_base + SCPERCTRL0);
arch/arm/mach-hisi/hotplug.c
200
val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0);
arch/arm/mach-hisi/hotplug.c
205
val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20);
arch/arm/mach-hisi/hotplug.c
210
val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0);
arch/arm/mach-hisi/hotplug.c
216
val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20);
arch/arm/mach-hisi/hotplug.c
237
temp = readl_relaxed(ctrl_base + HIP01_PERI9);
arch/arm/mach-hisi/hotplug.c
244
temp = readl_relaxed(ctrl_base + HIP01_PERI9);
arch/arm/mach-hisi/platmcpm.c
125
data = readl_relaxed(sys_status);
arch/arm/mach-hisi/platmcpm.c
135
} while (data == readl_relaxed(sys_status));
arch/arm/mach-hisi/platmcpm.c
208
data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster));
arch/arm/mach-hisi/platmcpm.c
223
data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster));
arch/arm/mach-hisi/platmcpm.c
87
data = readl_relaxed(fabric + FAB_SF_MODE);
arch/arm/mach-hisi/platmcpm.c
95
} while (data != readl_relaxed(fabric + FAB_SF_MODE));
arch/arm/mach-hisi/platsmp.c
169
remap_reg_value = readl_relaxed(ctrl_base + REG_SC_CTRL);
arch/arm/mach-hisi/platsmp.c
36
return readl_relaxed(ctrl_base + ((cpu - 1) << 2));
arch/arm/mach-imx/anatop.c
110
digprog = readl_relaxed(anatop_base + offset);
arch/arm/mach-imx/anatop.c
142
sbmr2 = readl_relaxed(src_base + SRC_SBMR2);
arch/arm/mach-imx/cpu-imx5.c
152
gpc = readl_relaxed(tigerp_base + ARM_GPC);
arch/arm/mach-imx/gpc.c
111
gpc_saved_imrs[i] = readl_relaxed(reg_imr1 + i * 4);
arch/arm/mach-imx/gpc.c
131
val = readl_relaxed(reg);
arch/arm/mach-imx/gpc.c
142
val = readl_relaxed(reg);
arch/arm/mach-imx/gpc.c
55
val = readl_relaxed(gpc_base + GPC_CNTR);
arch/arm/mach-imx/gpc.c
72
gpc_saved_imrs[i] = readl_relaxed(reg_imr1 + i * 4);
arch/arm/mach-imx/mach-vf610.c
37
cpxcount = readl_relaxed(mscm + MSCM_CPxCOUNT);
arch/arm/mach-imx/mach-vf610.c
38
cpxcfg1 = readl_relaxed(mscm + MSCM_CPxCFG1);
arch/arm/mach-imx/mmdc.c
567
val = readl_relaxed(reg);
arch/arm/mach-imx/mmdc.c
574
val = readl_relaxed(reg);
arch/arm/mach-imx/mxc.h
82
#define imx_readl readl_relaxed
arch/arm/mach-imx/pm-imx6.c
236
u32 val = readl_relaxed(ccm_base + CGPR);
arch/arm/mach-imx/pm-imx6.c
255
val = readl_relaxed(ccm_base + CCR);
arch/arm/mach-imx/pm-imx6.c
261
val = readl_relaxed(ccm_base + CCR);
arch/arm/mach-imx/pm-imx6.c
282
val = readl_relaxed(ccm_base + CLPCR);
arch/arm/mach-imx/pm-imx6.c
288
val = readl_relaxed(ccm_base + CCR);
arch/arm/mach-imx/pm-imx6.c
296
u32 val = readl_relaxed(ccm_base + CLPCR);
arch/arm/mach-imx/pm-imx6.c
567
readl_relaxed(pm_info->iomuxc_base.vbase +
arch/arm/mach-imx/pm-imx6.c
658
val = readl_relaxed(ccm_base + CLPCR);
arch/arm/mach-imx/pm-imx7ulp.c
32
u32 val = readl_relaxed(smc1_base + SMC_PMCTRL);
arch/arm/mach-imx/src.c
106
val = readl_relaxed(gpc_base + reg);
arch/arm/mach-imx/src.c
133
val = readl_relaxed(src_base + SRC_A7RCR1);
arch/arm/mach-imx/src.c
138
val = readl_relaxed(src_base + SRC_SCR);
arch/arm/mach-imx/src.c
156
return readl_relaxed(src_base + SRC_GPR1(gpr_v2) + cpu * 8 + 4);
arch/arm/mach-imx/src.c
181
val = readl_relaxed(src_base + SRC_SCR);
arch/arm/mach-imx/src.c
66
val = readl_relaxed(src_base + SRC_SCR);
arch/arm/mach-imx/system.c
100
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
arch/arm/mach-imx/system.c
102
val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);
arch/arm/mach-mstar/mstarv7.c
67
while (!(readl_relaxed(l3bridge + MSTARV7_L3BRIDGE_STATUS)
arch/arm/mach-mv78xx0/irq.c
31
stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_LOW_OFF);
arch/arm/mach-mv78xx0/irq.c
32
stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_LOW_OFF);
arch/arm/mach-mv78xx0/irq.c
38
stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_HIGH_OFF);
arch/arm/mach-mv78xx0/irq.c
39
stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_HIGH_OFF);
arch/arm/mach-mv78xx0/irq.c
45
stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_ERR_OFF);
arch/arm/mach-mv78xx0/irq.c
46
stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_ERR_OFF);
arch/arm/mach-omap1/irq.c
142
irqnr = readl_relaxed(l1 + IRQ_ITR_REG_OFFSET);
arch/arm/mach-omap1/irq.c
143
irqnr &= ~(readl_relaxed(l1 + IRQ_MIR_REG_OFFSET) & 0xffffffff);
arch/arm/mach-omap1/irq.c
147
irqnr = readl_relaxed(l1 + IRQ_SIR_FIQ_REG_OFFSET);
arch/arm/mach-omap1/irq.c
151
irqnr = readl_relaxed(l1 + IRQ_SIR_IRQ_REG_OFFSET);
arch/arm/mach-omap1/irq.c
153
irqnr = readl_relaxed(l2 + IRQ_SIR_IRQ_REG_OFFSET);
arch/arm/mach-omap1/irq.c
71
return readl_relaxed(irq_banks[bank].va + offset);
arch/arm/mach-omap1/timer32k.c
176
return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
arch/arm/mach-omap1/timer32k.c
197
cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
arch/arm/mach-omap1/timer32k.c
225
if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
arch/arm/mach-omap2/cm2xxx_3xxx.h
52
return readl_relaxed(cm_base.va + module + idx);
arch/arm/mach-omap2/cm33xx.c
48
return readl_relaxed(cm_base.va + inst + idx);
arch/arm/mach-omap2/cminst44xx.c
118
return readl_relaxed(_cm_bases[part].va + inst + idx);
arch/arm/mach-omap2/control.c
163
return readl_relaxed(omap2_ctrl_base + offset);
arch/arm/mach-omap2/id.c
100
#define read_tap_reg(reg) readl_relaxed(tap_base + (reg))
arch/arm/mach-omap2/omap-hotplug.c
53
readl_relaxed(base + OMAP_AUX_CORE_BOOT_0) >> 5;
arch/arm/mach-omap2/omap-mpuss-lowpower.c
484
old_cpu1_ns_pa_addr = readl_relaxed(ns_pa_addr);
arch/arm/mach-omap2/omap-smp.c
316
released = readl_relaxed(cfg.wakeupgen_base +
arch/arm/mach-omap2/omap-smp.c
325
cpu1_startup_pa = readl_relaxed(cfg.wakeupgen_base +
arch/arm/mach-omap2/omap-smp.c
351
readl_relaxed(c->cpu1_rstctrl_va);
arch/arm/mach-omap2/omap-wakeupgen.c
264
val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
arch/arm/mach-omap2/omap-wakeupgen.c
266
val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_1);
arch/arm/mach-omap2/omap-wakeupgen.c
270
val = readl_relaxed(wakeupgen_base + OMAP_PTMSYNCREQ_MASK);
arch/arm/mach-omap2/omap-wakeupgen.c
272
val = readl_relaxed(wakeupgen_base + OMAP_PTMSYNCREQ_EN);
arch/arm/mach-omap2/omap-wakeupgen.c
276
val = readl_relaxed(sar_base + SAR_BACKUP_STATUS_OFFSET);
arch/arm/mach-omap2/omap-wakeupgen.c
297
val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
arch/arm/mach-omap2/omap-wakeupgen.c
299
val = readl_relaxed(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
arch/arm/mach-omap2/omap-wakeupgen.c
303
val = readl_relaxed(sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);
arch/arm/mach-omap2/omap-wakeupgen.c
351
val = readl_relaxed(sar_base + offset);
arch/arm/mach-omap2/omap-wakeupgen.c
77
return readl_relaxed(wakeupgen_base + OMAP_WKG_ENB_A_0 +
arch/arm/mach-omap2/omap4-common.c
118
writel_relaxed(readl_relaxed(dram_sync), dram_sync);
arch/arm/mach-omap2/omap4-common.c
119
writel_relaxed(readl_relaxed(sram_sync), sram_sync);
arch/arm/mach-omap2/omap4-common.c
188
return !(readl_relaxed(gic_dist_base_addr + GIC_DIST_CTRL) & 0x1);
arch/arm/mach-omap2/omap4-common.c
193
u32 twd_int = readl_relaxed(twd_base + TWD_TIMER_INTSTAT);
arch/arm/mach-omap2/omap4-common.c
194
u32 gic_int = readl_relaxed(gic_dist_base_addr + GIC_DIST_PENDING_SET);
arch/arm/mach-omap2/omap4-common.c
195
u32 twd_ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL);
arch/arm/mach-omap2/omap_hwmod.c
2894
return readl_relaxed(oh->_mpu_rt_va + reg_offs);
arch/arm/mach-omap2/prcm_mpu44xx.c
30
return readl_relaxed(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
arch/arm/mach-omap2/prm2xxx_3xxx.h
55
return readl_relaxed(prm_base.va + module + idx);
arch/arm/mach-omap2/prm33xx.c
22
return readl_relaxed(prm_base.va + inst + idx);
arch/arm/mach-omap2/prm44xx.c
98
return readl_relaxed(prm_base.va + inst + reg);
arch/arm/mach-omap2/prminst44xx.c
63
return readl_relaxed(_prm_bases[part].va + inst + idx);
arch/arm/mach-omap2/sdrc.h
36
return readl_relaxed(OMAP_SDRC_REGADDR(reg));
arch/arm/mach-omap2/sdrc.h
48
return readl_relaxed(OMAP_SMS_REGADDR(reg));
arch/arm/mach-omap2/timer.c
145
reg = readl_relaxed(base + INCREMENTER_NUMERATOR_OFFSET) &
arch/arm/mach-omap2/timer.c
150
reg = readl_relaxed(base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET) &
arch/arm/mach-omap2/wd_timer.c
49
while (readl_relaxed(base + OMAP_WDT_WPS) & 0x10)
arch/arm/mach-omap2/wd_timer.c
53
while (readl_relaxed(base + OMAP_WDT_WPS) & 0x10)
arch/arm/mach-orion5x/irq.c
31
stat = readl_relaxed(MAIN_IRQ_CAUSE);
arch/arm/mach-orion5x/irq.c
32
stat &= readl_relaxed(MAIN_IRQ_MASK);
arch/arm/mach-pxa/pxa2xx.c
40
mdcnfg = readl_relaxed(MDCNFG);
arch/arm/mach-pxa/reset.c
78
writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
arch/arm/mach-s3c/cpu.c
20
samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0x118);
arch/arm/mach-s3c/cpu.c
27
samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0xA1C);
arch/arm/mach-s3c/pm-common.c
30
ptr->val = readl_relaxed(ptr->reg);
arch/arm/mach-s3c/pm-common.c
50
ptr->reg, ptr->val, readl_relaxed(ptr->reg));
arch/arm/mach-s5pv210/pm.c
44
ptr->val = readl_relaxed(ptr->reg);
arch/arm/mach-sa1100/include/mach/mtd-xip.h
20
#define xip_currtime() readl_relaxed(OSCR)
arch/arm/mach-sa1100/include/mach/mtd-xip.h
21
#define xip_elapsed_since(x) (signed)((readl_relaxed(OSCR) - (x)) / 4)
arch/arm/mach-sa1100/neponset.c
212
readl_relaxed(reg), names, NULL, NULL);
arch/arm/mach-shmobile/platsmp-apmu.c
53
while (readl_relaxed(p + WUPCR_OFFS) != 0)
arch/arm/mach-shmobile/platsmp-apmu.c
71
if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
arch/arm/mach-shmobile/pm-rcar-gen2.c
114
writel_relaxed((readl_relaxed(p + CA15RESCNT) &
arch/arm/mach-shmobile/pm-rcar-gen2.c
123
writel_relaxed((readl_relaxed(p + CA7RESCNT) &
arch/arm/mach-tegra/irq.c
37
pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET);
arch/arm/mach-ux500/pm.c
147
er = readl_relaxed(dist_base +
arch/arm/mach-ux500/pm.c
94
pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4);
arch/arm/mach-ux500/pm.c
95
er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
arch/arm/mach-versatile/spc.c
129
reg = readl_relaxed(info->baseaddr + WAKE_INT_MASK);
arch/arm/mach-versatile/spc.c
162
reg = readl_relaxed(info->baseaddr + WAKE_INT_MASK);
arch/arm/mach-versatile/spc.c
242
ret = readl_relaxed(info->baseaddr + STANDBYWFI_STAT);
arch/arm/mach-versatile/spc.c
258
perf = readl_relaxed(info->baseaddr + perf_cfg_reg);
arch/arm/mach-versatile/spc.c
373
uint32_t status = readl_relaxed(drv_data->baseaddr + PWC_STATUS);
arch/arm/mach-versatile/spc.c
460
readl_relaxed(info->baseaddr + PWC_STATUS);
arch/arm/mach-versatile/tc2_pm.c
118
return !(readl_relaxed(scc + RESET_CTRL) & mask);
arch/arm/mach-versatile/tc2_pm.c
134
readl_relaxed(scc + RESET_CTRL));
arch/arm/mach-versatile/tc2_pm.c
218
a15_cluster_id = readl_relaxed(scc + A15_CONF) & 0xf;
arch/arm/mach-versatile/tc2_pm.c
219
a7_cluster_id = readl_relaxed(scc + A7_CONF) & 0xf;
arch/arm/mach-versatile/tc2_pm.c
223
sys_info = readl_relaxed(scc + SYS_INFO);
arch/arm/mm/cache-l2x0-pmu.c
71
return readl_relaxed(l2x0_base + L2X0_EVENT_CNT0_VAL - 4 * idx);
arch/arm/mm/cache-l2x0-pmu.c
81
u32 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT_CTRL);
arch/arm/mm/cache-l2x0-pmu.c
88
u32 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT_CTRL);
arch/arm/mm/cache-l2x0.c
146
l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
arch/arm/mm/cache-l2x0.c
1460
l2x0_saved_regs.ctrl = readl_relaxed(base + L2X0_CTRL);
arch/arm/mm/cache-l2x0.c
1461
l2x0_saved_regs.aux_ctrl = readl_relaxed(base + L2X0_AUX_CTRL);
arch/arm/mm/cache-l2x0.c
154
if (!(readl_relaxed(base + L2X0_CTRL) & L2X0_CTRL_EN))
arch/arm/mm/cache-l2x0.c
1720
readl_relaxed(base + TAUROS3_AUX2_CTRL);
arch/arm/mm/cache-l2x0.c
1722
readl_relaxed(base + L310_PREFETCH_CTRL);
arch/arm/mm/cache-l2x0.c
1790
old_aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
arch/arm/mm/cache-l2x0.c
1815
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN))
arch/arm/mm/cache-l2x0.c
1822
cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID);
arch/arm/mm/cache-l2x0.c
401
if (readl_relaxed(base + L2X0_AUX_CTRL) & L220_AUX_CTRL_NS_LOCKDOWN)
arch/arm/mm/cache-l2x0.c
546
l2x0_saved_regs.tag_latency = readl_relaxed(base +
arch/arm/mm/cache-l2x0.c
548
l2x0_saved_regs.data_latency = readl_relaxed(base +
arch/arm/mm/cache-l2x0.c
550
l2x0_saved_regs.filter_end = readl_relaxed(base +
arch/arm/mm/cache-l2x0.c
552
l2x0_saved_regs.filter_start = readl_relaxed(base +
arch/arm/mm/cache-l2x0.c
555
revision = readl_relaxed(base + L2X0_CACHE_ID) &
arch/arm/mm/cache-l2x0.c
560
l2x0_saved_regs.prefetch_ctrl = readl_relaxed(base +
arch/arm/mm/cache-l2x0.c
565
l2x0_saved_regs.pwr_ctrl = readl_relaxed(base +
arch/arm/mm/cache-l2x0.c
58
while (readl_relaxed(reg) & mask)
arch/arm/mm/cache-l2x0.c
585
revision = readl_relaxed(base + L2X0_CACHE_ID) &
arch/arm/mm/cache-l2x0.c
610
unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
arch/arm/mm/cache-l2x0.c
625
u32 aux_cur = readl_relaxed(base + L2X0_AUX_CTRL);
arch/arm/mm/cache-l2x0.c
655
aux = readl_relaxed(base + L2X0_AUX_CTRL);
arch/arm/mm/cache-l2x0.c
658
u32 prefetch = readl_relaxed(base + L310_PREFETCH_CTRL);
arch/arm/mm/cache-l2x0.c
670
power_ctrl = readl_relaxed(base + L310_POWER_CTRL);
arch/arm/mm/cache-l2x0.c
68
if (val == readl_relaxed(base + reg))
arch/arm/mm/cache-l2x0.c
757
if (readl_relaxed(base + L2X0_AUX_CTRL) & L310_AUX_CTRL_NS_LOCKDOWN)
arch/arm/mm/cache-l2x0.c
804
old_aux = aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
arch/arm/mm/cache-l2x0.c
867
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
arch/arm/mm/cache-l2x0.c
883
aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
arch/arm/mm/cache-l2x0.c
902
cache_id = readl_relaxed(base + L2X0_CACHE_ID);
arch/arm/mm/cache-uniphier.c
103
readl_relaxed(data->op_base + UNIPHIER_SSCOPE);
arch/arm/mm/cache-uniphier.c
159
} while (unlikely(readl_relaxed(data->op_base + UNIPHIER_SSCOPPQSEF) &
arch/arm/mm/cache-uniphier.c
163
while (likely(readl_relaxed(data->op_base + UNIPHIER_SSCOLPQS) !=
arch/arm/mm/pmsa-v7.c
113
u32 rsr = readl_relaxed(BASEADDR_V7M_SCB + PMSAv7_RASR) & GENMASK(15, 0);
arch/arm/mm/pmsa-v7.c
121
u32 racr = readl_relaxed(BASEADDR_V7M_SCB + PMSAv7_RASR) & GENMASK(31, 16);
arch/arm/mm/pmsa-v7.c
134
return readl_relaxed(BASEADDR_V7M_SCB + PMSAv7_RBAR);
arch/arm/mm/pmsa-v8.c
53
return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RLAR);
arch/arm/mm/pmsa-v8.c
58
return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RBAR);
arch/arm/plat-orion/gpio.c
451
out = readl_relaxed(GPIO_OUT(ochip));
arch/arm/plat-orion/gpio.c
452
io_conf = readl_relaxed(GPIO_IO_CONF(ochip));
arch/arm/plat-orion/gpio.c
453
blink = readl_relaxed(GPIO_BLINK_EN(ochip));
arch/arm/plat-orion/gpio.c
454
in_pol = readl_relaxed(GPIO_IN_POL(ochip));
arch/arm/plat-orion/gpio.c
455
data_in = readl_relaxed(GPIO_DATA_IN(ochip));
arch/arm/plat-orion/gpio.c
456
cause = readl_relaxed(GPIO_EDGE_CAUSE(ochip));
arch/arm/plat-orion/gpio.c
457
edg_msk = readl_relaxed(GPIO_EDGE_MASK(ochip));
arch/arm/plat-orion/gpio.c
458
lvl_msk = readl_relaxed(GPIO_LEVEL_MASK(ochip));
arch/arm64/kernel/acpi_parking_protocol.c
80
cpu_id = readl_relaxed(&mailbox->cpu_id);
arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c
82
u32 data = readl_relaxed(addr);
arch/arm64/kvm/vgic/vgic-v2.c
519
vtr = readl_relaxed(kvm_vgic_global_state.vctrl_base + GICH_VTR);
arch/arm64/kvm/vgic/vgic-v2.c
553
elrsr = readl_relaxed(base + GICH_ELRSR0);
arch/arm64/kvm/vgic/vgic-v2.c
555
elrsr |= ((u64)readl_relaxed(base + GICH_ELRSR1)) << 32;
arch/arm64/kvm/vgic/vgic-v2.c
561
cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
arch/arm64/kvm/vgic/vgic-v2.c
576
cpu_if->vgic_vmcr = readl_relaxed(kvm_vgic_global_state.vctrl_base + GICH_VMCR);
arch/arm64/kvm/vgic/vgic-v2.c
582
u32 val = readl_relaxed(base + GICH_HCR);
arch/arm64/kvm/vgic/vgic-v2.c
621
cpu_if->vgic_apr = readl_relaxed(kvm_vgic_global_state.vctrl_base + GICH_APR);
arch/csky/include/asm/io.h
22
#define readl(c) ({ u32 __v = readl_relaxed(c); rmb(); __v; })
arch/mips/loongson64/smp.c
122
action = readl_relaxed(ipi_status0_regs[cpu_logical_map(cpu)]);
arch/riscv/include/asm/timex.h
25
return readl_relaxed(((u32 *)clint_time_val));
arch/riscv/include/asm/timex.h
31
return readl_relaxed(((u32 *)clint_time_val) + 1);
arch/sh/include/asm/io.h
50
#define readl(a) ({ u32 r_ = readl_relaxed(a); rmb(); r_; })
drivers/accel/ethosu/ethosu_drv.c
224
if (!FIELD_GET(PROT_ACTIVE_CSL, readl_relaxed(ethosudev->regs + NPU_REG_PROT))) {
drivers/accel/ethosu/ethosu_drv.c
226
readl_relaxed(ethosudev->regs + NPU_REG_PROT));
drivers/accel/ethosu/ethosu_drv.c
312
ethosudev->npu_info.id = id = readl_relaxed(ethosudev->regs + NPU_REG_ID);
drivers/accel/ethosu/ethosu_drv.c
313
ethosudev->npu_info.config = config = readl_relaxed(ethosudev->regs + NPU_REG_CONFIG);
drivers/accel/ethosu/ethosu_job.c
207
u32 status = readl_relaxed(dev->regs + NPU_REG_STATUS);
drivers/accel/ethosu/ethosu_job.c
235
u32 status = readl_relaxed(dev->regs + NPU_REG_STATUS);
drivers/accel/ethosu/ethosu_job.c
252
cmdaddr = readl_relaxed(dev->regs + NPU_REG_QREAD);
drivers/accel/ethosu/ethosu_job.c
253
running = FIELD_GET(STATUS_STATE_RUNNING, readl_relaxed(dev->regs + NPU_REG_STATUS));
drivers/accel/qaic/mhi_controller.c
765
tmp = readl_relaxed(addr);
drivers/acpi/cppc_acpi.c
1094
*val = readl_relaxed(vaddr);
drivers/acpi/cppc_acpi.c
1174
prev_val = readl_relaxed(vaddr);
drivers/ata/ahci_brcm.c
106
return readl_relaxed(addr);
drivers/ata/sata_dwc_460ex.c
41
#define sata_dwc_readl(a) readl_relaxed(a)
drivers/base/regmap/regmap-mmio.c
290
return readl_relaxed(ctx->regs + reg);
drivers/bus/arm-cci.c
246
while (readl_relaxed(cci_ctrl_base + CCI_CTRL_STATUS) & 0x1)
drivers/bus/omap-ocp2scp.c
60
reg = readl_relaxed(regs + OCP2SCP_TIMING);
drivers/bus/omap_l3_noc.c
113
masterid = (readl_relaxed(l3_targ_mstaddr) &
drivers/bus/omap_l3_noc.c
124
op_code = readl_relaxed(l3_targ_hdr) & 0x7;
drivers/bus/omap_l3_noc.c
126
m_req_info = readl_relaxed(l3_targ_info) & 0xF;
drivers/bus/omap_l3_noc.c
178
err_reg = readl_relaxed(base + flag_mux->offset +
drivers/bus/omap_l3_noc.c
205
mask_val = readl_relaxed(mask_reg);
drivers/bus/omap_l3_noc.c
322
mask_val = readl_relaxed(mask_regx);
drivers/bus/omap_l3_noc.c
328
mask_val = readl_relaxed(mask_regx);
drivers/bus/omap_l3_noc.c
84
std_err_main = readl_relaxed(l3_targ_stderr);
drivers/bus/omap_l3_noc.c
91
readl_relaxed(l3_targ_slvofslsb));
drivers/bus/stm32_rifsc.c
451
u32 rimc_attr = readl_relaxed(rifsc->mmio + RIFSC_RIMC_ATTR0 + 0x4 * i);
drivers/bus/stm32_rifsc.c
468
cid_cfgr = readl_relaxed(rifsc->mmio + RIFSC_RISC_PER0_CIDCFGR + 0x8 * i);
drivers/bus/stm32_rifsc.c
469
sec_cfgr = readl_relaxed(rifsc->mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id);
drivers/bus/stm32_rifsc.c
470
priv_cfgr = readl_relaxed(rifsc->mmio + RIFSC_RISC_PRIVCFGR0 + 0x4 * reg_id);
drivers/bus/stm32_rifsc.c
487
u32 risc_xcfgr = readl_relaxed(rifsc->mmio + RIFSC_RISC_REG0_ACFGR + 0x10 * i + 0x8 * j);
drivers/bus/stm32_rifsc.c
496
risc_xaddr = readl_relaxed(rifsc->mmio + RIFSC_RISC_REG3_AADDR + 0x8 * j);
drivers/bus/ti-sysc.c
212
return readl_relaxed(ddata->module_va + offset);
drivers/char/hw_random/bcm74110-rng.c
35
return readl_relaxed(mem) & HOST_FIFO_COUNT_MASK;
drivers/char/hw_random/bcm74110-rng.c
72
((u32 *)buf)[i] = readl_relaxed(fd_addr);
drivers/char/hw_random/hisi-rng.c
69
*data = readl_relaxed(hrng->base + RNG_RAN_NUM);
drivers/char/hw_random/histb-rng.c
45
val = readl_relaxed(base + RNG_CTRL);
drivers/char/hw_random/histb-rng.c
65
if (!(readl_relaxed(base + RNG_STAT) & DATA_COUNT)) {
drivers/char/hw_random/histb-rng.c
74
*(u32 *) (data + i) = readl_relaxed(base + RNG_NUMBER);
drivers/char/hw_random/histb-rng.c
82
return (readl_relaxed(base + RNG_CTRL) & POST_PROCESS_DEPTH) >> 8;
drivers/char/hw_random/meson-rng.c
40
*(u32 *)buf = readl_relaxed(data->base + RNG_DATA);
drivers/char/hw_random/meson-rng.c
67
writel_relaxed(readl_relaxed(cfg_addr) | SEED_READY_STS_BIT, cfg_addr);
drivers/char/hw_random/meson-rng.c
81
*(u32 *)buf = readl_relaxed(data->base + RNG_S4_DATA);
drivers/char/hw_random/st-rng.c
56
status = readl_relaxed(ddata->base + ST_RNG_STATUS_REG);
drivers/char/hw_random/st-rng.c
67
readl_relaxed(ddata->base + ST_RNG_DATA_REG);
drivers/char/hw_random/stm32-rng.c
106
u32 sr = readl_relaxed(priv->base + RNG_SR);
drivers/char/hw_random/stm32-rng.c
107
u32 cr = readl_relaxed(priv->base + RNG_CR);
drivers/char/hw_random/stm32-rng.c
128
if (readl_relaxed(priv->base + RNG_SR) & RNG_SR_SEIS)
drivers/char/hw_random/stm32-rng.c
160
u32 sr = readl_relaxed(priv->base + RNG_SR);
drivers/char/hw_random/stm32-rng.c
165
(void)readl_relaxed(priv->base + RNG_DR);
drivers/char/hw_random/stm32-rng.c
167
if (readl_relaxed(priv->base + RNG_SR) & RNG_SR_SEIS)
drivers/char/hw_random/stm32-rng.c
197
if (readl_relaxed(priv->base + RNG_SR) & RNG_SR_SEIS)
drivers/char/hw_random/stm32-rng.c
201
sr = readl_relaxed(priv->base + RNG_SR);
drivers/char/hw_random/stm32-rng.c
238
*(u32 *)data = readl_relaxed(priv->base + RNG_DR);
drivers/char/hw_random/stm32-rng.c
299
reg = readl_relaxed(priv->base + RNG_CR);
drivers/char/hw_random/stm32-rng.c
381
reg = readl_relaxed(priv->base + RNG_CR);
drivers/char/hw_random/stm32-rng.c
400
priv->pm_conf.nscr = readl_relaxed(priv->base + RNG_NSCR);
drivers/char/hw_random/stm32-rng.c
401
priv->pm_conf.htcr = readl_relaxed(priv->base + RNG_HTCR);
drivers/char/hw_random/stm32-rng.c
405
priv->pm_conf.cr = readl_relaxed(priv->base + RNG_CR) & ~RNG_CR_RNGEN;
drivers/char/hw_random/stm32-rng.c
427
reg = readl_relaxed(priv->base + RNG_CR);
drivers/char/hw_random/stm32-rng.c
459
reg = readl_relaxed(priv->base + RNG_CR);
drivers/clk/at91/pmc.c
124
backup = readl_relaxed(at91_pmc_backup_suspend);
drivers/clk/at91/pmc.c
138
backup = readl_relaxed(at91_pmc_backup_suspend);
drivers/clk/axs10x/i2s_pll_clock.c
73
return readl_relaxed(clk->base + reg);
drivers/clk/berlin/berlin2-avpll.c
118
reg = readl_relaxed(vco->base + VCO_CTRL0);
drivers/clk/berlin/berlin2-avpll.c
130
reg = readl_relaxed(vco->base + VCO_CTRL0);
drivers/clk/berlin/berlin2-avpll.c
145
reg = readl_relaxed(vco->base + VCO_CTRL0);
drivers/clk/berlin/berlin2-avpll.c
163
reg = readl_relaxed(vco->base + VCO_CTRL1);
drivers/clk/berlin/berlin2-avpll.c
220
reg = readl_relaxed(ch->base + VCO_CTRL10);
drivers/clk/berlin/berlin2-avpll.c
231
reg = readl_relaxed(ch->base + VCO_CTRL10);
drivers/clk/berlin/berlin2-avpll.c
243
reg = readl_relaxed(ch->base + VCO_CTRL10);
drivers/clk/berlin/berlin2-avpll.c
258
reg = readl_relaxed(ch->base + VCO_CTRL30);
drivers/clk/berlin/berlin2-avpll.c
267
reg = readl_relaxed(ch->base + VCO_SYNC1n(ch->index));
drivers/clk/berlin/berlin2-avpll.c
273
reg = readl_relaxed(ch->base + VCO_SYNC2n(ch->index));
drivers/clk/berlin/berlin2-avpll.c
284
reg = readl_relaxed(ch->base + VCO_CTRL11) >> 7;
drivers/clk/berlin/berlin2-avpll.c
294
reg = readl_relaxed(ch->base + VCO_CTRL11);
drivers/clk/berlin/berlin2-avpll.c
297
reg = readl_relaxed(ch->base + VCO_CTRL12);
drivers/clk/berlin/berlin2-avpll.c
308
reg = readl_relaxed(ch->base + VCO_CTRL12);
drivers/clk/berlin/berlin2-avpll.c
311
reg = readl_relaxed(ch->base + VCO_CTRL13);
drivers/clk/berlin/berlin2-avpll.c
314
reg = readl_relaxed(ch->base + VCO_CTRL14);
drivers/clk/berlin/berlin2-avpll.c
326
reg = readl_relaxed(ch->base + VCO_CTRL14);
drivers/clk/berlin/berlin2-avpll.c
329
reg = readl_relaxed(ch->base + VCO_CTRL15);
drivers/clk/berlin/berlin2-div.c
111
reg = readl_relaxed(div->base + map->gate_offs);
drivers/clk/berlin/berlin2-div.c
129
reg = readl_relaxed(div->base + map->pll_switch_offs);
drivers/clk/berlin/berlin2-div.c
138
reg = readl_relaxed(div->base + map->pll_select_offs);
drivers/clk/berlin/berlin2-div.c
161
reg = readl_relaxed(div->base + map->pll_switch_offs);
drivers/clk/berlin/berlin2-div.c
164
reg = readl_relaxed(div->base + map->pll_select_offs);
drivers/clk/berlin/berlin2-div.c
186
divsw = readl_relaxed(div->base + map->div_switch_offs) &
drivers/clk/berlin/berlin2-div.c
188
div3sw = readl_relaxed(div->base + map->div3_switch_offs) &
drivers/clk/berlin/berlin2-div.c
200
reg = readl_relaxed(div->base + map->div_select_offs);
drivers/clk/berlin/berlin2-div.c
74
reg = readl_relaxed(div->base + map->gate_offs);
drivers/clk/berlin/berlin2-div.c
92
reg = readl_relaxed(div->base + map->gate_offs);
drivers/clk/berlin/berlin2-pll.c
49
val = readl_relaxed(pll->base + SPLL_CTRL0);
drivers/clk/berlin/berlin2-pll.c
57
val = readl_relaxed(pll->base + SPLL_CTRL1);
drivers/clk/clk-apple-nco.c
196
readl_relaxed(chan->base + REG_DIV));
drivers/clk/clk-apple-nco.c
198
inc1 = readl_relaxed(chan->base + REG_INC1);
drivers/clk/clk-apple-nco.c
199
inc2 = readl_relaxed(chan->base + REG_INC2);
drivers/clk/clk-apple-nco.c
82
val = readl_relaxed(chan->base + REG_CTRL);
drivers/clk/clk-apple-nco.c
91
val = readl_relaxed(chan->base + REG_CTRL);
drivers/clk/clk-apple-nco.c
99
return (readl_relaxed(chan->base + REG_CTRL) & CTRL_ENABLE) != 0;
drivers/clk/clk-npcm7xx.c
51
val = readl_relaxed(pll->pllcon);
drivers/clk/clk-npcm8xx.c
237
val = readl_relaxed(pll->pllcon);
drivers/clk/clk-xgene.c
34
return readl_relaxed(csr);
drivers/clk/eswin/clk.c
103
val = readl_relaxed(clk->ctrl_reg0);
drivers/clk/eswin/clk.c
109
val = readl_relaxed(clk->ctrl_reg1);
drivers/clk/eswin/clk.c
114
val = readl_relaxed(clk->ctrl_reg2);
drivers/clk/eswin/clk.c
121
val = readl_relaxed(clk->ctrl_reg0);
drivers/clk/eswin/clk.c
142
val = readl_relaxed(clk->ctrl_reg0);
drivers/clk/eswin/clk.c
146
val = readl_relaxed(clk->ctrl_reg1);
drivers/clk/eswin/clk.c
348
val = readl_relaxed(dclk->ctrl_reg);
drivers/clk/eswin/clk.c
364
val = readl_relaxed(dclk->ctrl_reg) >> dclk->shift;
drivers/clk/eswin/clk.c
98
val = readl_relaxed(clk->ctrl_reg0);
drivers/clk/hisilicon/clk-hi3559a.c
385
val = readl_relaxed(clk->ctrl_reg1);
drivers/clk/hisilicon/clk-hi3559a.c
395
val = readl_relaxed(clk->ctrl_reg2);
drivers/clk/hisilicon/clk-hi3559a.c
415
val = readl_relaxed(clk->ctrl_reg1);
drivers/clk/hisilicon/clk-hi3559a.c
420
val = readl_relaxed(clk->ctrl_reg1);
drivers/clk/hisilicon/clk-hi3559a.c
425
val = readl_relaxed(clk->ctrl_reg1);
drivers/clk/hisilicon/clk-hi3559a.c
430
val = readl_relaxed(clk->ctrl_reg2);
drivers/clk/hisilicon/clk-hi3559a.c
435
val = readl_relaxed(clk->ctrl_reg2);
drivers/clk/hisilicon/clk-hi3559a.c
681
val = readl_relaxed(crg_base + 0x20);
drivers/clk/hisilicon/clk-hi3559a.c
686
val = readl_relaxed(crg_base + 0x1C);
drivers/clk/hisilicon/clk-hi3620.c
359
val = readl_relaxed(mclk->clken_reg);
drivers/clk/hisilicon/clk-hi3620.c
363
val = readl_relaxed(mclk->sam_reg);
drivers/clk/hisilicon/clk-hi3620.c
367
val = readl_relaxed(mclk->drv_reg);
drivers/clk/hisilicon/clk-hi3620.c
371
val = readl_relaxed(mclk->div_reg);
drivers/clk/hisilicon/clk-hi3620.c
375
val = readl_relaxed(mclk->clken_reg);
drivers/clk/hisilicon/clk-hix5hd2.c
174
val = readl_relaxed(clk->ctrl_reg);
drivers/clk/hisilicon/clk-hix5hd2.c
180
val = readl_relaxed(clk->phy_reg);
drivers/clk/hisilicon/clk-hix5hd2.c
203
val = readl_relaxed(clk->ctrl_reg);
drivers/clk/hisilicon/clk-hix5hd2.c
218
val = readl_relaxed(clk->ctrl_reg);
drivers/clk/hisilicon/clk-hix5hd2.c
223
val = readl_relaxed(clk->phy_reg);
drivers/clk/hisilicon/clk-hix5hd2.c
236
val = readl_relaxed(clk->ctrl_reg);
drivers/clk/hisilicon/clk-hix5hd2.c
241
val = readl_relaxed(clk->phy_reg);
drivers/clk/hisilicon/clkdivider-hi6220.c
51
val = readl_relaxed(dclk->reg) >> dclk->shift;
drivers/clk/hisilicon/clkdivider-hi6220.c
81
data = readl_relaxed(dclk->reg);
drivers/clk/hisilicon/clkgate-separated.c
43
readl_relaxed(sclk->enable + CLKGATE_SEPARATED_STATUS);
drivers/clk/hisilicon/clkgate-separated.c
60
readl_relaxed(sclk->enable + CLKGATE_SEPARATED_STATUS);
drivers/clk/hisilicon/clkgate-separated.c
71
reg = readl_relaxed(sclk->enable + CLKGATE_SEPARATED_STATUS);
drivers/clk/imx/clk-busy.c
20
while (readl_relaxed(reg) & (1 << shift))
drivers/clk/imx/clk-composite-7ulp.c
151
val = readl_relaxed(reg);
drivers/clk/imx/clk-frac-pll.c
104
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-frac-pll.c
106
val = readl_relaxed(pll->base + PLL_CFG1);
drivers/clk/imx/clk-frac-pll.c
174
val = readl_relaxed(pll->base + PLL_CFG1);
drivers/clk/imx/clk-frac-pll.c
179
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-frac-pll.c
184
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-frac-pll.c
191
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-frac-pll.c
57
if (readl_relaxed(pll->base) & (PLL_PD_MASK | PLL_BYPASS_MASK))
drivers/clk/imx/clk-frac-pll.c
70
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-frac-pll.c
82
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-frac-pll.c
92
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-fracn-gppll.c
172
pll_numerator = readl_relaxed(pll->base + PLL_NUMERATOR);
drivers/clk/imx/clk-fracn-gppll.c
175
pll_denominator = readl_relaxed(pll->base + PLL_DENOMINATOR);
drivers/clk/imx/clk-fracn-gppll.c
178
pll_div = readl_relaxed(pll->base + PLL_DIV);
drivers/clk/imx/clk-fracn-gppll.c
246
tmp = readl_relaxed(pll->base + PLL_CTRL);
drivers/clk/imx/clk-fracn-gppll.c
251
tmp = readl_relaxed(pll->base + PLL_CTRL);
drivers/clk/imx/clk-fracn-gppll.c
290
ana_mfn = readl_relaxed(pll->base + PLL_STATUS);
drivers/clk/imx/clk-fracn-gppll.c
304
val = readl_relaxed(pll->base + PLL_CTRL);
drivers/clk/imx/clk-fracn-gppll.c
309
writel_relaxed(readl_relaxed(pll->base + PLL_NUMERATOR),
drivers/clk/imx/clk-fracn-gppll.c
337
val = readl_relaxed(pll->base + PLL_CTRL);
drivers/clk/imx/clk-fracn-gppll.c
347
val = readl_relaxed(pll->base + PLL_CTRL);
drivers/clk/imx/clk-imx6q.c
289
reg = readl_relaxed(ccm_base + CCM_CCSR);
drivers/clk/imx/clk-imx6q.c
299
reg = readl_relaxed(ccm_base + CCM_CCSR);
drivers/clk/imx/clk-imx6q.c
339
reg = readl_relaxed(ccm_base + CCM_CS2CDR);
drivers/clk/imx/clk-imx6q.c
384
reg = readl_relaxed(ccm_base + CCM_CS2CDR);
drivers/clk/imx/clk-imx6q.c
411
reg = readl_relaxed(anatop_base + CCM_ANALOG_PFD_528);
drivers/clk/imx/clk-imx6q.c
421
reg = readl_relaxed(anatop_base + CCM_ANALOG_PFD_480);
drivers/clk/imx/clk-imx6q.c
426
reg = readl_relaxed(anatop_base + CCM_ANALOG_PLL_VIDEO);
drivers/clk/imx/clk-imx6sl.c
129
if (readl_relaxed(ccm_base + CCSR) & BM_CCSR_PLL1_SW_CLK_SEL) {
drivers/clk/imx/clk-imx6sl.c
132
if ((readl_relaxed(anatop_base + PLL_ARM) &
drivers/clk/imx/clk-imx6sl.c
146
saved_pll_arm = val = readl_relaxed(anatop_base + PLL_ARM);
drivers/clk/imx/clk-imx6sl.c
150
while (!(readl_relaxed(anatop_base + PLL_ARM) & BM_PLL_ARM_LOCK))
drivers/clk/imx/clk-imx6sl.c
170
saved_arm_div = readl_relaxed(ccm_base + CACRR);
drivers/clk/imx/clk-imx8-acm.c
459
priv->regs[i] = readl_relaxed(priv->reg + sels[i].reg);
drivers/clk/imx/clk-lpcg-scu.c
101
reg = readl_relaxed(clk->reg);
drivers/clk/imx/clk-lpcg-scu.c
167
clk->state = readl_relaxed(clk->reg);
drivers/clk/imx/clk-lpcg-scu.c
77
reg = readl_relaxed(clk->reg);
drivers/clk/imx/clk-pfd.c
112
if (readl_relaxed(pfd->reg) & (1 << ((pfd->idx + 1) * 8 - 1)))
drivers/clk/imx/clk-pfd.c
57
u8 frac = (readl_relaxed(pfd->reg) >> (pfd->idx * 8)) & 0x3f;
drivers/clk/imx/clk-pfdv2.c
146
if (readl_relaxed(pfd->reg) & (1 << pfd->gate_bit))
drivers/clk/imx/clk-pfdv2.c
185
val = readl_relaxed(pfd->reg);
drivers/clk/imx/clk-pfdv2.c
58
val = readl_relaxed(pfd->reg);
drivers/clk/imx/clk-pfdv2.c
73
val = readl_relaxed(pfd->reg);
drivers/clk/imx/clk-pfdv2.c
86
frac = (readl_relaxed(pfd->reg) >> pfd->frac_off)
drivers/clk/imx/clk-pll14xx.c
164
pll_div_ctl0 = readl_relaxed(pll->base + DIV_CTL0);
drivers/clk/imx/clk-pll14xx.c
168
pll_div_ctl1 = readl_relaxed(pll->base + DIV_CTL1);
drivers/clk/imx/clk-pll14xx.c
259
pll_div_ctl0 = readl_relaxed(pll->base + DIV_CTL0);
drivers/clk/imx/clk-pll14xx.c
265
pll_div_ctl1 = readl_relaxed(pll->base + DIV_CTL1);
drivers/clk/imx/clk-pll14xx.c
308
tmp = readl_relaxed(pll->base + DIV_CTL0);
drivers/clk/imx/clk-pll14xx.c
319
tmp = readl_relaxed(pll->base + GNRL_CTL);
drivers/clk/imx/clk-pll14xx.c
369
div_ctl0 = readl_relaxed(pll->base + DIV_CTL0);
drivers/clk/imx/clk-pll14xx.c
384
gnrl_ctl = readl_relaxed(pll->base + GNRL_CTL);
drivers/clk/imx/clk-pll14xx.c
433
val = readl_relaxed(pll->base + GNRL_CTL);
drivers/clk/imx/clk-pll14xx.c
456
val = readl_relaxed(pll->base + GNRL_CTL);
drivers/clk/imx/clk-pll14xx.c
470
val = readl_relaxed(pll->base + GNRL_CTL);
drivers/clk/imx/clk-pll14xx.c
538
val = readl_relaxed(pll->base + GNRL_CTL);
drivers/clk/imx/clk-pllv3.c
105
if (readl_relaxed(pll->base) & BM_PLL_LOCK)
drivers/clk/imx/clk-pllv3.c
115
u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask;
drivers/clk/imx/clk-pllv3.c
143
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv3.c
164
u32 div = readl_relaxed(pll->base) & pll->div_mask;
drivers/clk/imx/clk-pllv3.c
200
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv3.c
221
u32 mfn = readl_relaxed(pll->base + pll->num_offset);
drivers/clk/imx/clk-pllv3.c
222
u32 mfd = readl_relaxed(pll->base + pll->denom_offset);
drivers/clk/imx/clk-pllv3.c
223
u32 div = readl_relaxed(pll->base) & pll->div_mask;
drivers/clk/imx/clk-pllv3.c
289
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv3.c
356
mf.mfn = readl_relaxed(pll->base + pll->num_offset);
drivers/clk/imx/clk-pllv3.c
357
mf.mfd = readl_relaxed(pll->base + pll->denom_offset);
drivers/clk/imx/clk-pllv3.c
358
mf.mfi = (readl_relaxed(pll->base) & pll->div_mask) ? 22 : 20;
drivers/clk/imx/clk-pllv3.c
382
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv3.c
63
u32 val = readl_relaxed(pll->base) & pll->power_bit;
drivers/clk/imx/clk-pllv3.c
78
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv3.c
93
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv4.c
204
val = readl_relaxed(pll->base + pll->cfg_offset);
drivers/clk/imx/clk-pllv4.c
220
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv4.c
232
val = readl_relaxed(pll->base);
drivers/clk/imx/clk-pllv4.c
72
if (readl_relaxed(pll->base) & PLL_EN)
drivers/clk/imx/clk-pllv4.c
85
mult = readl_relaxed(pll->base + pll->cfg_offset);
drivers/clk/imx/clk-pllv4.c
89
mfn = readl_relaxed(pll->base + pll->num_offset);
drivers/clk/imx/clk-pllv4.c
90
mfd = readl_relaxed(pll->base + pll->denom_offset);
drivers/clk/imx/clk-sscg-pll.c
102
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-sscg-pll.c
300
u32 val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-sscg-pll.c
310
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-sscg-pll.c
322
val = readl_relaxed(pll->base + PLL_CFG0);
drivers/clk/imx/clk-sscg-pll.c
334
val = readl_relaxed(pll->base + PLL_CFG2);
drivers/clk/imx/clk-sscg-pll.c
371
val = readl_relaxed(pll->base + PLL_CFG2);
drivers/clk/imx/clk-vf610.c
153
cscmr1 = readl_relaxed(CCM_CSCMR1);
drivers/clk/imx/clk-vf610.c
154
cscmr2 = readl_relaxed(CCM_CSCMR2);
drivers/clk/imx/clk-vf610.c
156
cscdr1 = readl_relaxed(CCM_CSCDR1);
drivers/clk/imx/clk-vf610.c
157
cscdr2 = readl_relaxed(CCM_CSCDR2);
drivers/clk/imx/clk-vf610.c
158
cscdr3 = readl_relaxed(CCM_CSCDR3);
drivers/clk/imx/clk-vf610.c
161
ccgr[i] = readl_relaxed(CCM_CCGRx(i));
drivers/clk/imx/clk.c
37
reg = readl_relaxed(ccm_base + CCM_CCDR);
drivers/clk/microchip/clk-mpfs-ccc.c
81
mult = readl_relaxed(mult_addr) >> MPFS_CCC_FBDIV_SHIFT;
drivers/clk/microchip/clk-mpfs-ccc.c
83
ref_div = readl_relaxed(ref_div_addr) >> MPFS_CCC_REFDIV_SHIFT;
drivers/clk/microchip/clk-mpfs-ccc.c
94
return !!(readl_relaxed(pll_cr_addr) & MPFS_CCC_REFCLK_SEL);
drivers/clk/microchip/clk-mpfs.c
154
mult = readl_relaxed(mult_addr) >> MSSPLL_FBDIV_SHIFT;
drivers/clk/microchip/clk-mpfs.c
156
ref_div = readl_relaxed(ref_div_addr) >> MSSPLL_REFDIV_SHIFT;
drivers/clk/mmp/clk-apbc.c
106
data = readl_relaxed(apbc->base);
drivers/clk/mmp/clk-apbc.c
45
data = readl_relaxed(apbc->base);
drivers/clk/mmp/clk-apbc.c
59
data = readl_relaxed(apbc->base);
drivers/clk/mmp/clk-apbc.c
72
data = readl_relaxed(apbc->base);
drivers/clk/mmp/clk-apbc.c
92
data = readl_relaxed(apbc->base);
drivers/clk/mmp/clk-apmu.c
35
data = readl_relaxed(apmu->base) | apmu->enable_mask;
drivers/clk/mmp/clk-apmu.c
53
data = readl_relaxed(apmu->base) & ~apmu->enable_mask;
drivers/clk/mmp/clk-frac.c
102
val = readl_relaxed(factor->base);
drivers/clk/mmp/clk-frac.c
61
val = readl_relaxed(factor->base);
drivers/clk/mmp/clk-pll.c
34
val = readl_relaxed(pll->enable_reg);
drivers/clk/mmp/clk-pll.c
53
val = readl_relaxed(pll->enable_reg);
drivers/clk/mmp/clk-pll.c
58
val = readl_relaxed(pll->reg);
drivers/clk/mmp/clk-pll.c
70
val = readl_relaxed(pll->postdiv_reg);
drivers/clk/mvebu/dove-divider.c
41
v = readl_relaxed(base + DIV_CTRL1) | DIV_CTRL1_N_RESET_MASK;
drivers/clk/mvebu/dove-divider.c
44
v = (readl_relaxed(base + DIV_CTRL0) & ~(mask | load)) | val;
drivers/clk/mvebu/dove-divider.c
56
val = readl_relaxed(dc->base + DIV_CTRL0);
drivers/clk/mxs/clk-frac.c
40
div = readl_relaxed(frac->reg) >> frac->shift;
drivers/clk/mxs/clk-frac.c
96
val = readl_relaxed(frac->reg);
drivers/clk/mxs/clk-imx23.c
55
val = readl_relaxed(SAIF);
drivers/clk/mxs/clk-imx28.c
102
val = readl_relaxed(ENET);
drivers/clk/mxs/clk-imx28.c
116
val = readl_relaxed(FRAC0);
drivers/clk/mxs/clk-imx28.c
93
val = readl_relaxed(SAIF0);
drivers/clk/mxs/clk-imx28.c
97
val = readl_relaxed(SAIF1);
drivers/clk/mxs/clk-ref.c
52
u8 frac = (readl_relaxed(ref->reg) >> (ref->idx * 8)) & 0x3f;
drivers/clk/mxs/clk-ref.c
95
val = readl_relaxed(ref->reg);
drivers/clk/mxs/clk.c
18
while (readl_relaxed(reg) & (1 << shift))
drivers/clk/nuvoton/clk-ma35d1-divider.c
35
val = readl_relaxed(dclk->reg) >> dclk->shift;
drivers/clk/nuvoton/clk-ma35d1-divider.c
63
data = readl_relaxed(dclk->reg);
drivers/clk/nuvoton/clk-ma35d1-pll.c
232
reg_ctl[0] = readl_relaxed(pll->ctl0_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
239
reg_ctl[0] = readl_relaxed(pll->ctl0_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
240
reg_ctl[1] = readl_relaxed(pll->ctl1_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
265
reg_ctl[0] = readl_relaxed(pll->ctl0_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
274
reg_ctl[0] = readl_relaxed(pll->ctl0_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
275
reg_ctl[1] = readl_relaxed(pll->ctl1_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
290
u32 val = readl_relaxed(pll->ctl1_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
300
val = readl_relaxed(pll->ctl1_base);
drivers/clk/nuvoton/clk-ma35d1-pll.c
311
val = readl_relaxed(pll->ctl1_base);
drivers/clk/renesas/clk-vbattb.c
167
u32 val = readl_relaxed(vbclk->base + VBATTB_XOSCCR);
drivers/clk/rockchip/clk-cpu.c
87
u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg[0]);
drivers/clk/rockchip/clk-pll.c
149
pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(0));
drivers/clk/rockchip/clk-pll.c
155
pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(1));
drivers/clk/rockchip/clk-pll.c
163
pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(2));
drivers/clk/rockchip/clk-pll.c
236
pllcon = readl_relaxed(pll->reg_base + RK3036_PLLCON(2));
drivers/clk/rockchip/clk-pll.c
392
pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));
drivers/clk/rockchip/clk-pll.c
398
pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));
drivers/clk/rockchip/clk-pll.c
402
pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(2));
drivers/clk/rockchip/clk-pll.c
415
pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(3));
drivers/clk/rockchip/clk-pll.c
631
pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(0));
drivers/clk/rockchip/clk-pll.c
635
pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(1));
drivers/clk/rockchip/clk-pll.c
643
pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(2));
drivers/clk/rockchip/clk-pll.c
647
pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(3));
drivers/clk/rockchip/clk-pll.c
716
pllcon = readl_relaxed(pll->reg_base + RK3399_PLLCON(2));
drivers/clk/rockchip/clk-pll.c
892
pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(0));
drivers/clk/rockchip/clk-pll.c
895
pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(1));
drivers/clk/rockchip/clk-pll.c
899
pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(2));
drivers/clk/rockchip/clk-rk3288.c
882
readl_relaxed(rk3288_cru_base + reg_id);
drivers/clk/samsung/clk-pll.c
1031
pll_con = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
105
tmp = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1067
tmp = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1132
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1137
pll_con1 = readl_relaxed(pll->con_reg + 4);
drivers/clk/samsung/clk-pll.c
1162
con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1163
con1 = readl_relaxed(pll->con_reg + 4);
drivers/clk/samsung/clk-pll.c
117
tmp = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1224
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1225
pll_con2 = readl_relaxed(pll->con_reg + 8);
drivers/clk/samsung/clk-pll.c
1252
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1253
pll_con2 = readl_relaxed(pll->con_reg + 8);
drivers/clk/samsung/clk-pll.c
1308
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1309
pll_con8 = readl_relaxed(pll->con_reg + 20);
drivers/clk/samsung/clk-pll.c
1355
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1356
pll_con3 = readl_relaxed(pll->con_reg + 0xc);
drivers/clk/samsung/clk-pll.c
1397
con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1398
con3 = readl_relaxed(pll->con_reg + 0xc);
drivers/clk/samsung/clk-pll.c
140
pll_con = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1422
con3 = readl_relaxed(pll->con_reg + 0xc);
drivers/clk/samsung/clk-pll.c
1478
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1479
pll_con5 = readl_relaxed(pll->con_reg + PLLA9FRACO_PLL_CON5_DIV_FRAC);
drivers/clk/samsung/clk-pll.c
1520
con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1521
con5 = readl_relaxed(pll->con_reg + PLLA9FRACO_PLL_CON5_DIV_FRAC);
drivers/clk/samsung/clk-pll.c
1533
con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
1555
con5 = readl_relaxed(pll->con_reg + PLLA9FRACO_PLL_CON5_DIV_FRAC);
drivers/clk/samsung/clk-pll.c
1565
con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
173
pll_con = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
214
pll_con = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
265
tmp = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
337
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
338
pll_con1 = readl_relaxed(pll->con_reg + 4);
drivers/clk/samsung/clk-pll.c
378
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
379
pll_con1 = readl_relaxed(pll->con_reg + 4);
drivers/clk/samsung/clk-pll.c
452
pll_con3 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
494
pll_con3 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
553
pll_con3 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
554
pll_con5 = readl_relaxed(pll->con_reg + 8);
drivers/clk/samsung/clk-pll.c
582
pll_con3 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
583
pll_con5 = readl_relaxed(pll->con_reg + 8);
drivers/clk/samsung/clk-pll.c
650
pll_con = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
692
con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
693
con1 = readl_relaxed(pll->con_reg + 0x4);
drivers/clk/samsung/clk-pll.c
713
con1 = readl_relaxed(pll->con_reg + 0x4);
drivers/clk/samsung/clk-pll.c
783
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
784
pll_con1 = readl_relaxed(pll->con_reg + 4);
drivers/clk/samsung/clk-pll.c
829
con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
830
con1 = readl_relaxed(pll->con_reg + 0x4);
drivers/clk/samsung/clk-pll.c
865
con1 = readl_relaxed(pll->con_reg + 0x4);
drivers/clk/samsung/clk-pll.c
912
pll_con = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
952
pll_con0 = readl_relaxed(pll->con_reg);
drivers/clk/samsung/clk-pll.c
953
pll_con1 = readl_relaxed(pll->con_reg + 0x4);
drivers/clk/samsung/clk-pll.c
990
pll_stat = readl_relaxed(pll->con_reg);
drivers/clk/sifive/sifive-prci.c
34
return readl_relaxed(pd->va + offs);
drivers/clk/spear/clk-aux-synth.c
112
val = readl_relaxed(aux->reg) &
drivers/clk/spear/clk-aux-synth.c
74
val = readl_relaxed(aux->reg);
drivers/clk/spear/clk-frac-synth.c
108
val = readl_relaxed(frac->reg) & ~DIV_FACTOR_MASK;
drivers/clk/spear/clk-frac-synth.c
77
val = readl_relaxed(frac->reg);
drivers/clk/spear/clk-gpt-synth.c
64
val = readl_relaxed(gpt->reg);
drivers/clk/spear/clk-vco-pll.c
134
p = readl_relaxed(pll->vco->cfg_reg);
drivers/clk/spear/clk-vco-pll.c
157
val = readl_relaxed(pll->vco->cfg_reg);
drivers/clk/spear/clk-vco-pll.c
204
mode = (readl_relaxed(vco->mode_reg) >> PLL_MODE_SHIFT) & PLL_MODE_MASK;
drivers/clk/spear/clk-vco-pll.c
206
val = readl_relaxed(vco->cfg_reg);
drivers/clk/spear/clk-vco-pll.c
246
val = readl_relaxed(vco->mode_reg);
drivers/clk/spear/clk-vco-pll.c
251
val = readl_relaxed(vco->cfg_reg);
drivers/clk/starfive/clk-starfive-jh71x0.c
30
return readl_relaxed(reg);
drivers/clk/starfive/clk-starfive-jh71x0.c
40
value |= readl_relaxed(reg) & ~mask;
drivers/clk/stm32/clk-stm32mp1.c
1018
prescaler = readl_relaxed(tim_ker->apbdiv) & APB_DIV_MASK;
drivers/clk/stm32/clk-stm32mp1.c
1020
timpre = readl_relaxed(tim_ker->timpre) & TIM_PRE_MASK;
drivers/clk/stm32/clk-stm32mp1.c
773
return readl_relaxed(clk_elem->reg) & PLL_ON;
drivers/clk/stm32/clk-stm32mp1.c
791
reg = readl_relaxed(clk_elem->reg);
drivers/clk/stm32/clk-stm32mp1.c
801
bit_status = !(readl_relaxed(clk_elem->reg) & PLL_RDY);
drivers/clk/stm32/clk-stm32mp1.c
822
reg = readl_relaxed(clk_elem->reg);
drivers/clk/stm32/clk-stm32mp1.c
834
reg = readl_relaxed(clk_elem->reg + FRAC_OFFSET);
drivers/clk/stm32/clk-stm32mp1.c
849
reg = readl_relaxed(clk_elem->reg + 4);
drivers/clk/stm32/clk-stm32mp1.c
961
prescaler = readl_relaxed(tim_ker->apbdiv) & APB_DIV_MASK;
drivers/clk/tegra/clk-divider.c
103
val = readl_relaxed(divider->reg);
drivers/clk/tegra/clk-divider.c
43
reg = readl_relaxed(divider->reg);
drivers/clk/tegra/clk-periph-gate.c
20
readl_relaxed(gate->clk_base + (gate->regs->enb_reg))
drivers/clk/tegra/clk-periph-gate.c
27
readl_relaxed(gate->clk_base + (gate->regs->rst_reg))
drivers/clk/tegra/clk-pll-out.c
21
u32 val = readl_relaxed(pll_out->reg);
drivers/clk/tegra/clk-pll-out.c
39
val = readl_relaxed(pll_out->reg);
drivers/clk/tegra/clk-pll-out.c
61
val = readl_relaxed(pll_out->reg);
drivers/clk/tegra/clk-pll.c
1167
value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);
drivers/clk/tegra/clk-pll.c
1179
value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);
drivers/clk/tegra/clk-pll.c
1795
value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);
drivers/clk/tegra/clk-pll.c
1807
value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);
drivers/clk/tegra/clk-pll.c
1821
value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-pll.c
1827
value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);
drivers/clk/tegra/clk-pll.c
1838
value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-pll.c
1846
value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-pll.c
2092
val = readl_relaxed(clk_base + pll_params->base_reg);
drivers/clk/tegra/clk-pll.c
2093
val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);
drivers/clk/tegra/clk-pll.c
2140
WARN_ON(readl_relaxed(clk_base + pll_params->iddq_reg) &
drivers/clk/tegra/clk-pll.c
230
#define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
drivers/clk/tegra/clk-pll.c
233
#define pll_override_readl(offset, p) readl_relaxed(p->pmc + offset)
drivers/clk/tegra/clk-pll.c
2395
val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);
drivers/clk/tegra/clk-pll.c
2670
val = readl_relaxed(clk_base + pll_params->base_reg);
drivers/clk/tegra/clk-pll.c
311
val = readl_relaxed(lock_addr);
drivers/clk/tegra/clk-pll.c
332
u32 val = readl_relaxed(pll->pmc + PMC_PLLP_WB0_OVERRIDE);
drivers/clk/tegra/clk-pll.c
383
val = readl_relaxed(pll->pmc + PMC_PLLP_WB0_OVERRIDE);
drivers/clk/tegra/clk-pll.c
401
val = readl_relaxed(pll->pmc + PMC_PLLP_WB0_OVERRIDE);
drivers/clk/tegra/clk-sdmmc-mux.c
50
val = readl_relaxed(sdmmc_mux->reg);
drivers/clk/tegra/clk-sdmmc-mux.c
73
val = readl_relaxed(sdmmc_mux->reg);
drivers/clk/tegra/clk-sdmmc-mux.c
95
val = readl_relaxed(sdmmc_mux->reg);
drivers/clk/tegra/clk-super.c
40
val = readl_relaxed(mux->reg);
drivers/clk/tegra/clk-super.c
74
val = readl_relaxed(mux->reg);
drivers/clk/tegra/clk-tegra-fixed.c
114
val = readl_relaxed(clk_base + OSC_CTRL) & ~OSC_CTRL_MASK;
drivers/clk/tegra/clk-tegra-fixed.c
35
val = readl_relaxed(clk_base + OSC_CTRL);
drivers/clk/tegra/clk-tegra-super-cclk.c
196
val = readl_relaxed(reg + 4);
drivers/clk/tegra/clk-tegra-super-cclk.c
53
u32 val = readl_relaxed(super->reg);
drivers/clk/tegra/clk-tegra114.c
1194
readl_relaxed(clk_base + CPU_FINETRIM_SELECT);
drivers/clk/tegra/clk-tegra114.c
1285
v = readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra114.c
1301
v = readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra124.c
1380
readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra124.c
1392
v = readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra124.c
1408
v = readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra20-emc.c
110
val = readl_relaxed(emc->reg);
drivers/clk/tegra/clk-tegra20-emc.c
143
val = readl_relaxed(emc->reg);
drivers/clk/tegra/clk-tegra20-emc.c
60
val = readl_relaxed(emc->reg);
drivers/clk/tegra/clk-tegra20-emc.c
70
return readl_relaxed(emc->reg) >> CLK_SOURCE_EMC_2X_CLK_SRC_SHIFT;
drivers/clk/tegra/clk-tegra20-emc.c
78
val = readl_relaxed(emc->reg);
drivers/clk/tegra/clk-tegra20.c
573
u32 osc_ctrl = readl_relaxed(clk_base + OSC_CTRL);
drivers/clk/tegra/clk-tegra20.c
607
u32 pll_ref_div = readl_relaxed(clk_base + OSC_CTRL) &
drivers/clk/tegra/clk-tegra20.c
973
misc = readl_relaxed(clk_base + PLLX_MISC);
drivers/clk/tegra/clk-tegra20.c
974
base = readl_relaxed(clk_base + PLLX_BASE);
drivers/clk/tegra/clk-tegra210-emc.c
57
value = readl_relaxed(emc->regs + CLK_SOURCE_EMC);
drivers/clk/tegra/clk-tegra210-emc.c
81
value = readl_relaxed(emc->regs + CLK_SOURCE_EMC);
drivers/clk/tegra/clk-tegra210.c
1059
u32 val = readl_relaxed(clk_base + pllre->params->base_reg);
drivers/clk/tegra/clk-tegra210.c
1084
val = readl_relaxed(clk_base + pllre->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
1188
if (readl_relaxed(clk_base + pllx->params->base_reg) & PLL_ENABLE) {
drivers/clk/tegra/clk-tegra210.c
1202
val = readl_relaxed(clk_base + pllx->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
1237
u32 mask, val = readl_relaxed(clk_base + pllmb->params->base_reg);
drivers/clk/tegra/clk-tegra210.c
1255
val = readl_relaxed(clk_base + pllmb->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
1298
u32 val = readl_relaxed(clk_base + pllp->params->base_reg);
drivers/clk/tegra/clk-tegra210.c
1313
val = readl_relaxed(clk_base + pllp->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
1328
val = readl_relaxed(clk_base + pllp->params->ext_misc_reg[1]);
drivers/clk/tegra/clk-tegra210.c
1361
u32 val = readl_relaxed(clk_base + pllu->base_reg);
drivers/clk/tegra/clk-tegra210.c
1376
val = readl_relaxed(clk_base + pllu->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
1381
val = readl_relaxed(clk_base + pllu->ext_misc_reg[1]);
drivers/clk/tegra/clk-tegra210.c
1421
val = readl_relaxed(clk_base + reg);
drivers/clk/tegra/clk-tegra210.c
1438
val = readl_relaxed(clk_base + pllx->params->ext_misc_reg[2]);
drivers/clk/tegra/clk-tegra210.c
1444
val = readl_relaxed(clk_base + pllx->params->ext_misc_reg[2]);
drivers/clk/tegra/clk-tegra210.c
1452
base = readl_relaxed(clk_base + pllx->params->base_reg) &
drivers/clk/tegra/clk-tegra210.c
2779
reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
2795
reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
2817
reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
2823
reg = readl_relaxed(clk_base + UTMIP_PLL_CFG2);
drivers/clk/tegra/clk-tegra210.c
2836
reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
drivers/clk/tegra/clk-tegra210.c
2850
reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
drivers/clk/tegra/clk-tegra210.c
2858
reg = readl_relaxed(clk_base + UTMIP_PLL_CFG2);
drivers/clk/tegra/clk-tegra210.c
2868
reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
drivers/clk/tegra/clk-tegra210.c
2873
reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
2880
reg = readl_relaxed(clk_base + XUSB_PLL_CFG0);
drivers/clk/tegra/clk-tegra210.c
2887
reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
2911
reg = readl_relaxed(clk_base + pllu.params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
2916
reg = readl_relaxed(clk_base + PLLU_BASE);
drivers/clk/tegra/clk-tegra210.c
2948
reg = readl_relaxed(clk_base + PLLU_BASE);
drivers/clk/tegra/clk-tegra210.c
2958
reg = readl_relaxed(clk_base + PLLU_BASE);
drivers/clk/tegra/clk-tegra210.c
2962
reg = readl_relaxed(clk_base + PLLU_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
2970
reg = readl_relaxed(clk_base + XUSB_PLL_CFG0);
drivers/clk/tegra/clk-tegra210.c
2975
reg = readl_relaxed(clk_base + PLLU_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
2980
reg = readl_relaxed(clk_base + PLLU_BASE);
drivers/clk/tegra/clk-tegra210.c
2986
reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
drivers/clk/tegra/clk-tegra210.c
3440
#define car_readl(_base, _off) readl_relaxed(clk_base + (_base) + ((_off) * 4))
drivers/clk/tegra/clk-tegra210.c
3457
spare_reg_ctx = readl_relaxed(clk_base + SPARE_REG0);
drivers/clk/tegra/clk-tegra210.c
3458
misc_clk_enb_ctx = readl_relaxed(clk_base + MISC_CLK_ENB);
drivers/clk/tegra/clk-tegra210.c
3459
clk_msk_arm_ctx = readl_relaxed(clk_base + CLK_MASK_ARM);
drivers/clk/tegra/clk-tegra210.c
3630
readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra210.c
3642
v = readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra210.c
3658
v = readl_relaxed(clk_base + RST_DFLL_DVCO);
drivers/clk/tegra/clk-tegra210.c
504
value = readl_relaxed(clk_base + PLLE_AUX);
drivers/clk/tegra/clk-tegra210.c
520
value = readl_relaxed(clk_base + PLLE_MISC0);
drivers/clk/tegra/clk-tegra210.c
527
value = readl_relaxed(clk_base + PLLE_AUX);
drivers/clk/tegra/clk-tegra210.c
547
val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0);
drivers/clk/tegra/clk-tegra210.c
560
val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0);
drivers/clk/tegra/clk-tegra210.c
570
val = readl_relaxed(clk_base + SATA_PLL_CFG0);
drivers/clk/tegra/clk-tegra210.c
582
val = readl_relaxed(clk_base + SATA_PLL_CFG0);
drivers/clk/tegra/clk-tegra210.c
592
val = readl_relaxed(clk_base + SATA_PLL_CFG0);
drivers/clk/tegra/clk-tegra210.c
633
val = readl_relaxed(clk_base + mbist->lvl2_offset);
drivers/clk/tegra/clk-tegra210.c
647
csi_src = readl_relaxed(clk_base + PLLD_BASE);
drivers/clk/tegra/clk-tegra210.c
651
ovra = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRA);
drivers/clk/tegra/clk-tegra210.c
653
ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);
drivers/clk/tegra/clk-tegra210.c
669
ovra = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRA);
drivers/clk/tegra/clk-tegra210.c
673
dsc_top_ctrl = readl_relaxed(dispa_base + DC_COM_DSC_TOP_CTL);
drivers/clk/tegra/clk-tegra210.c
675
readl_relaxed(dispa_base + DC_CMD_DISPLAY_COMMAND);
drivers/clk/tegra/clk-tegra210.c
677
readl_relaxed(dispa_base + DC_CMD_DISPLAY_COMMAND);
drivers/clk/tegra/clk-tegra210.c
687
ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);
drivers/clk/tegra/clk-tegra210.c
691
val = readl_relaxed(vic_base + NV_PVIC_THI_SLCG_OVERRIDE_LOW);
drivers/clk/tegra/clk-tegra210.c
709
ovrc = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRC);
drivers/clk/tegra/clk-tegra210.c
710
ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);
drivers/clk/tegra/clk-tegra210.c
721
i2s_ctrl = readl_relaxed(i2s_base + TEGRA210_I2S_CTRL);
drivers/clk/tegra/clk-tegra210.c
742
u32 boot_val = readl_relaxed(base + params->ext_misc_reg[misc_num]);
drivers/clk/tegra/clk-tegra210.c
785
if (readl_relaxed(clk_base + pllcx->params->base_reg) & PLL_ENABLE) {
drivers/clk/tegra/clk-tegra210.c
834
u32 val = readl_relaxed(clk_base + plla->params->base_reg);
drivers/clk/tegra/clk-tegra210.c
860
val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
890
if (readl_relaxed(clk_base + plld->params->base_reg) &
drivers/clk/tegra/clk-tegra210.c
913
val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
922
val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra210.c
940
u32 val = readl_relaxed(clk_base + plldss->params->base_reg);
drivers/clk/tegra/clk-tegra210.c
994
val = readl_relaxed(clk_base + plldss->params->ext_misc_reg[0]);
drivers/clk/tegra/clk-tegra30.c
1171
misc = readl_relaxed(clk_base + CLK_RESET_PLLX_MISC);
drivers/clk/tegra/clk-tegra30.c
1172
base = readl_relaxed(clk_base + CLK_RESET_PLLX_BASE);
drivers/clk/tegra/clk.c
168
val = readl_relaxed(clk_base + CLK_OUT_ENB_Y);
drivers/clk/tegra/clk.c
184
readl_relaxed(clk_base + periph_regs[i].enb_reg);
drivers/clk/tegra/clk.c
188
readl_relaxed(clk_base + periph_regs[i].rst_reg);
drivers/clk/ti/adpll.c
353
v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET);
drivers/clk/ti/adpll.c
365
v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET);
drivers/clk/ti/adpll.c
375
v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET);
drivers/clk/ti/adpll.c
387
u32 v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET);
drivers/clk/ti/adpll.c
450
frac_m = readl_relaxed(d->regs + ADPLL_FRACDIV_OFFSET);
drivers/clk/ti/adpll.c
461
v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET);
drivers/clk/ti/adpll.c
782
v = readl_relaxed(reg);
drivers/clk/ti/clk.c
59
v = readl_relaxed(ptr);
drivers/clk/ti/clk.c
84
val = readl_relaxed(reg->ptr);
drivers/clk/ti/clk.c
88
val = readl_relaxed(io->mem + reg->offset);
drivers/clk/ti/fapll.c
102
u32 v = readl_relaxed(fd->base);
drivers/clk/ti/fapll.c
116
while ((v = readl_relaxed(fd->base))) {
drivers/clk/ti/fapll.c
134
u32 v = readl_relaxed(fd->base);
drivers/clk/ti/fapll.c
146
u32 v = readl_relaxed(fd->base);
drivers/clk/ti/fapll.c
155
u32 v = readl_relaxed(fd->base);
drivers/clk/ti/fapll.c
173
v = readl_relaxed(fd->base);
drivers/clk/ti/fapll.c
256
v = readl_relaxed(fd->base);
drivers/clk/ti/fapll.c
281
u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET);
drivers/clk/ti/fapll.c
292
u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET);
drivers/clk/ti/fapll.c
301
u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET);
drivers/clk/ti/fapll.c
338
v = readl_relaxed(synth->freq);
drivers/clk/ti/fapll.c
348
synth_div_m = readl_relaxed(synth->div) & SYNTH_MAX_DIV_M;
drivers/clk/ti/fapll.c
361
post_div_m = readl_relaxed(synth->div) & SYNTH_MAX_DIV_M;
drivers/clk/ti/fapll.c
395
v = readl_relaxed(synth->freq);
drivers/clk/ti/fapll.c
472
v = readl_relaxed(synth->div);
drivers/clk/ti/fapll.c
637
v = readl_relaxed(freq);
drivers/clk/ti/fapll.c
81
u32 v = readl_relaxed(fd->base);
drivers/clk/ti/fapll.c
91
u32 v = readl_relaxed(fd->base);
drivers/clocksource/arm_arch_timer_mmio.c
107
return readl_relaxed(timer->base + CNTV_CTL);
drivers/clocksource/arm_arch_timer_mmio.c
208
cnttidr = readl_relaxed(cntctlbase + CNTTIDR);
drivers/clocksource/arm_arch_timer_mmio.c
224
cntacr = readl_relaxed(cntctlbase + CNTACR(i));
drivers/clocksource/arm_arch_timer_mmio.c
304
rate = readl_relaxed(at->base + CNTFRQ);
drivers/clocksource/arm_arch_timer_mmio.c
99
return readl_relaxed(timer->base + CNTP_CTL);
drivers/clocksource/arm_global_timer.c
149
if (!(readl_relaxed(gt_base + GT_INT_STATUS) &
drivers/clocksource/arm_global_timer.c
235
return readl_relaxed(gt_base + GT_COUNTER0);
drivers/clocksource/arm_global_timer.c
72
upper = readl_relaxed(gt_base + GT_COUNTER1);
drivers/clocksource/arm_global_timer.c
75
lower = readl_relaxed(gt_base + GT_COUNTER0);
drivers/clocksource/arm_global_timer.c
76
upper = readl_relaxed(gt_base + GT_COUNTER1);
drivers/clocksource/bcm2835_timer.c
40
return readl_relaxed(system_clock);
drivers/clocksource/bcm2835_timer.c
48
writel_relaxed(readl_relaxed(system_clock) + event,
drivers/clocksource/bcm2835_timer.c
57
if (readl_relaxed(timer->control) & timer->match_mask) {
drivers/clocksource/clksrc-dbx500-prcmu.c
36
count = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
drivers/clocksource/clksrc-dbx500-prcmu.c
37
count2 = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
drivers/clocksource/clksrc_st_lpc.c
40
return (u64)readl_relaxed(ddata.base + LPC_LPT_LSB_OFF);
drivers/clocksource/dw_apb_timer.c
62
return readl_relaxed(timer->base + offs);
drivers/clocksource/dw_apb_timer_of.c
144
return ~readl_relaxed(sched_io_base);
drivers/clocksource/dw_apb_timer_of.c
169
return ~readl_relaxed(sched_io_base);
drivers/clocksource/exynos_mct.c
148
if (readl_relaxed(reg_base + stat_addr) & mask) {
drivers/clocksource/exynos_mct.c
161
reg = readl_relaxed(reg_base + EXYNOS4_MCT_G_TCON);
drivers/clocksource/exynos_mct.c
179
u32 hi2 = readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_U);
drivers/clocksource/exynos_mct.c
183
lo = readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_L);
drivers/clocksource/exynos_mct.c
184
hi2 = readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_U);
drivers/clocksource/exynos_mct.c
200
return readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_L);
drivers/clocksource/exynos_mct.c
267
tcon = readl_relaxed(reg_base + EXYNOS4_MCT_G_TCON);
drivers/clocksource/exynos_mct.c
279
tcon = readl_relaxed(reg_base + EXYNOS4_MCT_G_TCON);
drivers/clocksource/exynos_mct.c
367
tmp = readl_relaxed(reg_base + offset);
drivers/clocksource/exynos_mct.c
389
tmp = readl_relaxed(reg_base + mevt->base + MCT_L_TCON_OFFSET);
drivers/clocksource/exynos_mct.c
398
if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1)
drivers/clocksource/mmio.c
22
return (u64)readl_relaxed(to_mmio_clksrc(c)->reg);
drivers/clocksource/mmio.c
28
return ~(u64)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask;
drivers/clocksource/mps2-timer.c
41
return ~readl_relaxed(sched_clock_base + TIMER_VALUE);
drivers/clocksource/mps2-timer.c
84
u32 status = readl_relaxed(ce->reg + TIMER_INT);
drivers/clocksource/mxs_timer.c
185
return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1));
drivers/clocksource/nomadik-mtu.c
84
return ~readl_relaxed(mtu_base + MTU_VAL(0));
drivers/clocksource/samsung_pwm_timer.c
129
tcon = readl_relaxed(pwm.base + REG_TCON);
drivers/clocksource/samsung_pwm_timer.c
147
tcon = readl_relaxed(pwm.base + REG_TCON);
drivers/clocksource/samsung_pwm_timer.c
169
tcon = readl_relaxed(pwm.base + REG_TCON);
drivers/clocksource/samsung_pwm_timer.c
307
return ~readl_relaxed(pwm.source_reg);
drivers/clocksource/timer-atmel-pit.c
61
return readl_relaxed(base + reg_offset);
drivers/clocksource/timer-atmel-tcb.c
247
sr = readl_relaxed(dev->regs + ATMEL_TC_REG(2, SR));
drivers/clocksource/timer-atmel-tcb.c
60
upper = readl_relaxed(tcaddr + ATMEL_TC_REG(1, CV));
drivers/clocksource/timer-atmel-tcb.c
61
lower = readl_relaxed(tcaddr + ATMEL_TC_REG(0, CV));
drivers/clocksource/timer-atmel-tcb.c
62
} while (upper != readl_relaxed(tcaddr + ATMEL_TC_REG(1, CV)));
drivers/clocksource/timer-atmel-tcb.c
70
return readl_relaxed(tcaddr + ATMEL_TC_REG(0, CV));
drivers/clocksource/timer-cadence-ttc.c
116
ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET);
drivers/clocksource/timer-cadence-ttc.c
145
readl_relaxed(timer->base_addr + TTC_ISR_OFFSET);
drivers/clocksource/timer-cadence-ttc.c
162
return (u64)readl_relaxed(timer->base_addr +
drivers/clocksource/timer-cadence-ttc.c
168
return readl_relaxed(ttc_sched_clock_val_reg);
drivers/clocksource/timer-cadence-ttc.c
203
ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET);
drivers/clocksource/timer-cadence-ttc.c
231
ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET);
drivers/clocksource/timer-cadence-ttc.c
276
readl_relaxed(ttccs->ttc.base_addr +
drivers/clocksource/timer-cadence-ttc.c
516
clksel = readl_relaxed(timer_baseaddr + TTC_CLK_CNTRL_OFFSET);
drivers/clocksource/timer-cadence-ttc.c
524
clksel = readl_relaxed(timer_baseaddr + 4 + TTC_CLK_CNTRL_OFFSET);
drivers/clocksource/timer-clint.c
75
#define clint_get_cycles() readl_relaxed(clint_timer_val)
drivers/clocksource/timer-clint.c
76
#define clint_get_cycles_hi() readl_relaxed(((u32 *)clint_timer_val) + 1)
drivers/clocksource/timer-davinci.c
182
return readl_relaxed(davinci_clocksource.base +
drivers/clocksource/timer-davinci.c
76
return readl_relaxed(clockevent->base + reg);
drivers/clocksource/timer-gx6605s.c
100
return (u64)readl_relaxed(base + TIMER_VALUE);
drivers/clocksource/timer-gxp.c
43
return readl_relaxed(system_clock);
drivers/clocksource/timer-imx-gpt.c
111
tmp = readl_relaxed(imxtm->base + MXC_TCTL);
drivers/clocksource/timer-imx-gpt.c
140
return sched_clock_reg ? readl_relaxed(sched_clock_reg) : 0;
drivers/clocksource/timer-imx-gpt.c
148
return readl_relaxed(sched_clock_reg);
drivers/clocksource/timer-imx-gpt.c
178
tcmp = readl_relaxed(imxtm->base + MX1_2_TCN) + evt;
drivers/clocksource/timer-imx-gpt.c
182
return (int)(tcmp - readl_relaxed(imxtm->base + MX1_2_TCN)) < 0 ?
drivers/clocksource/timer-imx-gpt.c
192
tcmp = readl_relaxed(imxtm->base + V2_TCN) + evt;
drivers/clocksource/timer-imx-gpt.c
197
(int)(tcmp - readl_relaxed(imxtm->base + V2_TCN)) < 0 ?
drivers/clocksource/timer-imx-gpt.c
209
tcn = readl_relaxed(imxtm->base + imxtm->gpt->reg_tcn);
drivers/clocksource/timer-imx-gpt.c
231
u32 tcn = readl_relaxed(imxtm->base + imxtm->gpt->reg_tcn);
drivers/clocksource/timer-imx-gpt.c
262
readl_relaxed(imxtm->base + imxtm->gpt->reg_tstat);
drivers/clocksource/timer-imx-gpt.c
98
tmp = readl_relaxed(imxtm->base + MXC_TCTL);
drivers/clocksource/timer-imx-sysctr.c
60
cnt_hi = readl_relaxed(base + priv->hi_off);
drivers/clocksource/timer-imx-sysctr.c
61
cnt_lo = readl_relaxed(base + priv->lo_off);
drivers/clocksource/timer-imx-sysctr.c
62
tmp_hi = readl_relaxed(base + priv->hi_off);
drivers/clocksource/timer-keystone.c
50
return readl_relaxed(timer.base + rg);
drivers/clocksource/timer-mediatek.c
136
return readl_relaxed(gpt_sched_reg);
drivers/clocksource/timer-meson6.c
61
return readl_relaxed(timer_base + MESON_ISA_TIMERE);
drivers/clocksource/timer-microchip-pit64b.c
111
low = readl_relaxed(base + MCHP_PIT64B_TLSBR);
drivers/clocksource/timer-microchip-pit64b.c
112
high = readl_relaxed(base + MCHP_PIT64B_TMSBR);
drivers/clocksource/timer-microchip-pit64b.c
232
readl_relaxed(irq_data->timer.base + MCHP_PIT64B_ISR);
drivers/clocksource/timer-milbeaut.c
165
return ~readl_relaxed(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS);
drivers/clocksource/timer-milbeaut.c
55
val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
drivers/clocksource/timer-milbeaut.c
76
u32 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
drivers/clocksource/timer-pxa.c
52
#define timer_readl(reg) readl_relaxed(timer_base + (reg))
drivers/clocksource/timer-qcom.c
42
u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
drivers/clocksource/timer-qcom.c
53
u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
drivers/clocksource/timer-qcom.c
62
while (readl_relaxed(sts_base) & TIMER_STS_GPT0_CLR_PEND)
drivers/clocksource/timer-qcom.c
73
ctrl = readl_relaxed(event_base + TIMER_ENABLE);
drivers/clocksource/timer-qcom.c
85
return readl_relaxed(source_base + TIMER_COUNT_VAL);
drivers/clocksource/timer-rda.c
164
lo = readl_relaxed(base + RDA_HWTIMER_LOCKVAL_L);
drivers/clocksource/timer-rda.c
165
hi = readl_relaxed(base + RDA_HWTIMER_LOCKVAL_H);
drivers/clocksource/timer-rda.c
166
} while (hi != readl_relaxed(base + RDA_HWTIMER_LOCKVAL_H));
drivers/clocksource/timer-rockchip.c
124
return ~readl_relaxed(rk_clksrc->base + TIMER_CURRENT_VALUE0);
drivers/clocksource/timer-sp804.c
106
return ~readl_relaxed(sched_clkevt->value);
drivers/clocksource/timer-sp804.c
116
return ~readl_relaxed(delay_clkevt->value);
drivers/clocksource/timer-sprd.c
169
hi = readl_relaxed(timer_of_base(&suspend_to) +
drivers/clocksource/timer-sprd.c
171
lo = readl_relaxed(timer_of_base(&suspend_to) +
drivers/clocksource/timer-sprd.c
173
} while (hi != readl_relaxed(timer_of_base(&suspend_to) + TIMER_VALUE_SHDW_HI));
drivers/clocksource/timer-sprd.c
37
u32 val = readl_relaxed(base + TIMER_CTL);
drivers/clocksource/timer-sprd.c
55
u32 val = readl_relaxed(base + TIMER_CTL);
drivers/clocksource/timer-sprd.c
74
u32 val = readl_relaxed(base + TIMER_INT);
drivers/clocksource/timer-stm32.c
132
next = readl_relaxed(timer_of_base(to) + TIM_CNT) + evt;
drivers/clocksource/timer-stm32.c
134
now = readl_relaxed(timer_of_base(to) + TIM_CNT);
drivers/clocksource/timer-stm32.c
194
width = readl_relaxed(timer_of_base(to) + TIM_ARR);
drivers/clocksource/timer-stm32.c
89
return readl_relaxed(stm32_timer_cnt);
drivers/clocksource/timer-stm32.c
96
return readl_relaxed(stm32_timer_cnt);
drivers/clocksource/timer-tegra.c
168
return readl_relaxed(timer_reg_base + TIMERUS_CNTR_1US);
drivers/clocksource/timer-tegra.c
174
return readl_relaxed(timer_reg_base + TIMERUS_CNTR_1US);
drivers/clocksource/timer-tegra.c
197
u32 ms = readl_relaxed(reg_base + RTC_MILLISECONDS);
drivers/clocksource/timer-tegra.c
198
u32 s = readl_relaxed(reg_base + RTC_SHADOW_SECONDS);
drivers/clocksource/timer-tegra186.c
120
return readl_relaxed(wdt->regs + offset);
drivers/clocksource/timer-tegra186.c
281
val = readl_relaxed(wdt->regs + WDTSR);
drivers/clocksource/timer-tegra186.c
287
val = readl_relaxed(wdt->tmr->regs + TMRSR);
drivers/clocksource/timer-tegra186.c
329
value = readl_relaxed(tegra->regs + WDTSCR(index));
drivers/clocksource/timer-tegra186.c
390
hi = readl_relaxed(tegra->regs + TKETSC1);
drivers/clocksource/timer-tegra186.c
401
lo = readl_relaxed(tegra->regs + TKETSC0);
drivers/clocksource/timer-tegra186.c
402
hi = readl_relaxed(tegra->regs + TKETSC1);
drivers/clocksource/timer-tegra186.c
425
return readl_relaxed(tegra->regs + TKEOSC);
drivers/clocksource/timer-tegra186.c
445
return readl_relaxed(tegra->regs + TKEUSEC);
drivers/clocksource/timer-ti-32k.c
146
if (readl_relaxed(ti_32k_timer.base + OMAP2_32KSYNCNT_REV_OFF) &
drivers/clocksource/timer-ti-32k.c
62
return (u64)readl_relaxed(ti->counter);
drivers/clocksource/timer-ti-dm-systimer.c
114
l = readl_relaxed(sysc);
drivers/clocksource/timer-ti-dm-systimer.c
416
pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(t->base),
drivers/clocksource/timer-ti-dm-systimer.c
417
readl_relaxed(t->base + t->sysc));
drivers/clocksource/timer-ti-dm-systimer.c
452
while (readl_relaxed(pend) & WP_TCRR)
drivers/clocksource/timer-ti-dm-systimer.c
456
while (readl_relaxed(pend) & WP_TCLR)
drivers/clocksource/timer-ti-dm-systimer.c
470
l = readl_relaxed(ctrl);
drivers/clocksource/timer-ti-dm-systimer.c
475
l = readl_relaxed(ctrl);
drivers/clocksource/timer-ti-dm-systimer.c
493
while (readl_relaxed(pend) & WP_TLDR)
drivers/clocksource/timer-ti-dm-systimer.c
497
while (readl_relaxed(pend) & WP_TCRR)
drivers/clocksource/timer-ti-dm-systimer.c
501
while (readl_relaxed(pend) & WP_TCLR)
drivers/clocksource/timer-ti-dm-systimer.c
68
u32 tidr = readl_relaxed(t->base);
drivers/clocksource/timer-ti-dm-systimer.c
717
return (u64)readl_relaxed(t->base + t->counter);
drivers/clocksource/timer-ti-dm-systimer.c
724
return readl_relaxed(dmtimer_sched_clock_counter);
drivers/clocksource/timer-ti-dm-systimer.c
732
clksrc->loadval = readl_relaxed(t->base + t->counter);
drivers/clocksource/timer-ti-dm.c
1223
return readl_relaxed(omap_dm_timer_sched_clock_counter);
drivers/clocksource/timer-ti-dm.c
195
while (readl_relaxed(timer->pend) & wp)
drivers/clocksource/timer-ti-dm.c
198
return readl_relaxed(timer->func_base + offset);
drivers/clocksource/timer-ti-dm.c
220
while (readl_relaxed(timer->pend) & wp)
drivers/clocksource/timer-ti-dm.c
231
tidr = readl_relaxed(timer->io_base);
drivers/cpufreq/apple-soc-cpufreq.c
149
u32 reg = readl_relaxed(priv->reg_base + APPLE_DVFS_STATUS);
drivers/cpufreq/kirkwood-cpufreq.c
59
reg = readl_relaxed(priv.base);
drivers/cpufreq/kirkwood-cpufreq.c
76
reg = readl_relaxed(priv.base);
drivers/cpufreq/mediatek-cpufreq-hw.c
117
*uW = readl_relaxed(data->reg_bases[REG_EM_POWER_TBL] +
drivers/cpufreq/mediatek-cpufreq-hw.c
164
index = readl_relaxed(data->reg_bases[REG_FREQ_PERF_STATE]);
drivers/cpufreq/mediatek-cpufreq-hw.c
201
temp = readl_relaxed(base_table + (i * LUT_ROW_SIZE));
drivers/cpufreq/mediatek-cpufreq-hw.c
310
latency = readl_relaxed(data->reg_bases[REG_FREQ_LATENCY]) * 1000;
drivers/cpufreq/qcom-cpufreq-hw.c
140
lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_current_vote) & 0x3ff;
drivers/cpufreq/qcom-cpufreq-hw.c
142
lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_domain_state) & 0xff;
drivers/cpufreq/qcom-cpufreq-hw.c
160
index = readl_relaxed(data->base + soc_data->reg_perf_state);
drivers/cpufreq/qcom-cpufreq-hw.c
242
data = readl_relaxed(drv_data->base + soc_data->reg_freq_lut +
drivers/cpufreq/qcom-cpufreq-hw.c
248
data = readl_relaxed(drv_data->base + soc_data->reg_volt_lut +
drivers/cpufreq/qcom-cpufreq-hw.c
560
if (!(readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_enable) & 0x1)) {
drivers/cpufreq/qcom-cpufreq-hw.c
565
if (readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_dcvs_ctrl) & 0x1)
drivers/cpufreq/s5pv210-cpufreq.c
296
reg = readl_relaxed(S5P_CLK_DIV2);
drivers/cpufreq/s5pv210-cpufreq.c
304
reg = readl_relaxed(S5P_CLKDIV_STAT0);
drivers/cpufreq/s5pv210-cpufreq.c
311
reg = readl_relaxed(S5P_CLK_SRC2);
drivers/cpufreq/s5pv210-cpufreq.c
318
reg = readl_relaxed(S5P_CLKMUX_STAT1);
drivers/cpufreq/s5pv210-cpufreq.c
330
reg = readl_relaxed(S5P_CLK_SRC0);
drivers/cpufreq/s5pv210-cpufreq.c
336
reg = readl_relaxed(S5P_CLKMUX_STAT0);
drivers/cpufreq/s5pv210-cpufreq.c
342
reg = readl_relaxed(S5P_CLK_DIV0);
drivers/cpufreq/s5pv210-cpufreq.c
361
reg = readl_relaxed(S5P_CLKDIV_STAT0);
drivers/cpufreq/s5pv210-cpufreq.c
365
reg = readl_relaxed(S5P_ARM_MCS_CON);
drivers/cpufreq/s5pv210-cpufreq.c
389
reg = readl_relaxed(S5P_APLL_CON);
drivers/cpufreq/s5pv210-cpufreq.c
397
reg = readl_relaxed(S5P_CLK_SRC2);
drivers/cpufreq/s5pv210-cpufreq.c
404
reg = readl_relaxed(S5P_CLKMUX_STAT1);
drivers/cpufreq/s5pv210-cpufreq.c
411
reg = readl_relaxed(S5P_CLK_DIV2);
drivers/cpufreq/s5pv210-cpufreq.c
419
reg = readl_relaxed(S5P_CLKDIV_STAT0);
drivers/cpufreq/s5pv210-cpufreq.c
423
reg = readl_relaxed(S5P_CLK_SRC0);
drivers/cpufreq/s5pv210-cpufreq.c
429
reg = readl_relaxed(S5P_CLKMUX_STAT0);
drivers/cpufreq/s5pv210-cpufreq.c
446
reg = readl_relaxed(S5P_CLK_DIV6);
drivers/cpufreq/s5pv210-cpufreq.c
452
reg = readl_relaxed(S5P_CLKDIV_STAT1);
drivers/cpufreq/s5pv210-cpufreq.c
492
val = readl_relaxed(dmc_reg + 0x4);
drivers/cpufreq/s5pv210-cpufreq.c
537
s5pv210_dram_conf[0].refresh = (readl_relaxed(dmc_base[0] + 0x30) * 1000);
drivers/cpufreq/s5pv210-cpufreq.c
540
s5pv210_dram_conf[1].refresh = (readl_relaxed(dmc_base[1] + 0x30) * 1000);
drivers/cpufreq/virtual-cpufreq.c
111
return readl_relaxed(base + cpu * PER_CPU_OFFSET +
drivers/cpufreq/virtual-cpufreq.c
138
cur_perf_domain = readl_relaxed(base + policy->cpu *
drivers/cpufreq/virtual-cpufreq.c
146
perf_domain = readl_relaxed(base + cpu *
drivers/cpufreq/virtual-cpufreq.c
277
num_perftbl_entries = readl_relaxed(base + cpu * PER_CPU_OFFSET +
drivers/cpufreq/virtual-cpufreq.c
77
cur_freq = (u64)readl_relaxed(base + cpu * PER_CPU_OFFSET
drivers/crypto/atmel-aes.c
336
u32 value = readl_relaxed(dd->io_base + offset);
drivers/crypto/atmel-sha.c
254
u32 value = readl_relaxed(dd->io_base + offset);
drivers/crypto/atmel-tdes.c
172
return readl_relaxed(dd->io_base + offset);
drivers/crypto/axis/artpec6_crypto.c
2576
intr = readl_relaxed(base + A6_PDMA_MASKED_INTR);
drivers/crypto/axis/artpec6_crypto.c
2583
intr = readl_relaxed(base + A7_PDMA_MASKED_INTR);
drivers/crypto/hisilicon/debugfs.c
1036
val = readl_relaxed(qm->io_base + qm_dfx_regs[i].offset);
drivers/crypto/hisilicon/debugfs.c
923
debug->qm_last_words[i] = readl_relaxed(qm->io_base +
drivers/crypto/hisilicon/hpre/hpre_main.c
1324
debug->last_words[i] = readl_relaxed(qm->io_base +
drivers/crypto/hisilicon/hpre/hpre_main.c
1331
debug->last_words[idx] = readl_relaxed(
drivers/crypto/hisilicon/hpre/hpre_main.c
1367
val = readl_relaxed(qm->io_base + hpre_com_dfx_regs[i].offset);
drivers/crypto/hisilicon/hpre/hpre_main.c
1379
val = readl_relaxed(io_base +
drivers/crypto/hisilicon/hpre/hpre_main.c
518
val1 = readl_relaxed(qm->io_base + HPRE_DATA_RUSER_CFG);
drivers/crypto/hisilicon/hpre/hpre_main.c
519
val2 = readl_relaxed(qm->io_base + HPRE_DATA_WUSER_CFG);
drivers/crypto/hisilicon/hpre/hpre_main.c
616
val = readl_relaxed(qm->io_base + HPRE_PREFETCH_CFG);
drivers/crypto/hisilicon/hpre/hpre_main.c
639
val = readl_relaxed(qm->io_base + HPRE_PREFETCH_CFG);
drivers/crypto/hisilicon/sec/sec_drv.c
257
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
272
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
287
if ((readl_relaxed(base + SEC_ALGSUB_CLK_ST_REG) & 0x7) == 0x7)
drivers/crypto/hisilicon/sec/sec_drv.c
304
if ((readl_relaxed(base + SEC_ALGSUB_CLK_ST_REG) & 0x7) == 0)
drivers/crypto/hisilicon/sec/sec_drv.c
323
is_reset = readl_relaxed(base + SEC_ALGSUB_RST_ST_REG) &
drivers/crypto/hisilicon/sec/sec_drv.c
325
b_is_reset = readl_relaxed(base + SEC_ALGSUB_BUILD_RST_ST_REG) &
drivers/crypto/hisilicon/sec/sec_drv.c
341
is_reset = readl_relaxed(base + SEC_ALGSUB_RST_ST_REG) &
drivers/crypto/hisilicon/sec/sec_drv.c
343
b_is_reset = readl_relaxed(base + SEC_ALGSUB_BUILD_RST_ST_REG) &
drivers/crypto/hisilicon/sec/sec_drv.c
363
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
390
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
402
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
414
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
427
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
440
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
476
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
494
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
524
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
541
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec/sec_drv.c
558
regval = readl_relaxed(base + SEC_Q_CFG_REG);
drivers/crypto/hisilicon/sec/sec_drv.c
571
regval = readl_relaxed(addr);
drivers/crypto/hisilicon/sec2/sec_main.c
1053
debug->last_words[i] = readl_relaxed(qm->io_base +
drivers/crypto/hisilicon/sec2/sec_main.c
1082
val = readl_relaxed(qm->io_base + sec_dfx_regs[i].offset);
drivers/crypto/hisilicon/sec2/sec_main.c
482
reg = readl_relaxed(qm->io_base + SEC_CONTROL_REG);
drivers/crypto/hisilicon/sec2/sec_main.c
528
val = readl_relaxed(qm->io_base + SEC_PREFETCH_CFG);
drivers/crypto/hisilicon/sec2/sec_main.c
550
val = readl_relaxed(qm->io_base + SEC_PREFETCH_CFG);
drivers/crypto/hisilicon/sec2/sec_main.c
573
reg = readl_relaxed(qm->io_base +
drivers/crypto/hisilicon/sec2/sec_main.c
579
reg = readl_relaxed(qm->io_base +
drivers/crypto/hisilicon/sec2/sec_main.c
586
reg = readl_relaxed(qm->io_base +
drivers/crypto/hisilicon/sec2/sec_main.c
591
reg = readl_relaxed(qm->io_base +
drivers/crypto/hisilicon/sec2/sec_main.c
611
val = readl_relaxed(qm->io_base + SEC_CONTROL_REG);
drivers/crypto/hisilicon/sec2/sec_main.c
629
val = readl_relaxed(qm->io_base + SEC_CONTROL_REG);
drivers/crypto/hisilicon/sec2/sec_main.c
652
reg = readl_relaxed(qm->io_base + SEC_CONTROL_REG);
drivers/crypto/hisilicon/zip/zip_main.c
1082
debug->last_words[i] = readl_relaxed(io_base);
drivers/crypto/hisilicon/zip/zip_main.c
1089
debug->last_words[idx] = readl_relaxed(
drivers/crypto/hisilicon/zip/zip_main.c
1124
val = readl_relaxed(qm->io_base + hzip_com_dfx_regs[i].offset);
drivers/crypto/hisilicon/zip/zip_main.c
1148
val = readl_relaxed(base + hzip_dump_dfx_regs[j].offset);
drivers/crypto/hisilicon/zip/zip_main.c
484
val = readl_relaxed(qm->io_base + HZIP_LIT_LEN_EN_OFFSET);
drivers/crypto/hisilicon/zip/zip_main.c
495
val = readl_relaxed(qm->io_base + HZIP_HIGH_PERF_OFFSET);
drivers/crypto/hisilicon/zip/zip_main.c
540
val = readl_relaxed(qm->io_base + HZIP_PREFETCH_CFG);
drivers/crypto/hisilicon/zip/zip_main.c
562
val = readl_relaxed(qm->io_base + HZIP_PREFETCH_CFG);
drivers/crypto/img-hash.c
150
return readl_relaxed(hdev->io_base + offset);
drivers/crypto/inside-secure/safexcel.c
356
(readl_relaxed(EIP197_PE(priv) + base +
drivers/crypto/marvell/cesa/hash.c
378
creq->state[i] = readl_relaxed(engine->regs +
drivers/crypto/qcom-rng.c
133
val = readl_relaxed(rng->base + PRNG_CONFIG);
drivers/crypto/qcom-rng.c
137
val = readl_relaxed(rng->base + PRNG_LFSR_CFG);
drivers/crypto/qcom-rng.c
142
val = readl_relaxed(rng->base + PRNG_CONFIG);
drivers/crypto/qcom-rng.c
67
val = readl_relaxed(rng->base + PRNG_DATA_OUT);
drivers/crypto/rockchip/rk3288_crypto.h
184
readl_relaxed(((dev)->reg + (offset)))
drivers/crypto/sa2ul.c
2408
status = readl_relaxed(saul_base + SA_ENGINE_STATUS);
drivers/crypto/stm32/stm32-cryp.c
296
return readl_relaxed(cryp->regs + ofst);
drivers/crypto/stm32/stm32-cryp.c
314
writel_relaxed(readl_relaxed(cryp->regs + cryp->caps->cr) | CR_CRYPEN,
drivers/crypto/stm32/stm32-cryp.c
344
writel_relaxed(readl_relaxed(cryp->regs + cryp->caps->cr) | CR_KEYRDEN,
drivers/crypto/stm32/stm32-cryp.c
350
writel_relaxed(readl_relaxed(cryp->regs + cryp->caps->cr) & ~CR_KEYRDEN,
drivers/crypto/stm32/stm32-hash.c
231
return readl_relaxed(hdev->io_base + offset);
drivers/crypto/ti/dthev2-aes.c
1081
readl_relaxed(aes_base_reg + DTHE_P_AES_DATA_IN_OUT + DTHE_REG_SIZE * i);
drivers/crypto/ti/dthev2-aes.c
357
u32 aes_irqenable_val = readl_relaxed(aes_base_reg + DTHE_P_AES_IRQENABLE);
drivers/crypto/ti/dthev2-aes.c
358
u32 aes_sysconfig_val = readl_relaxed(aes_base_reg + DTHE_P_AES_SYSCONFIG);
drivers/crypto/ti/dthev2-aes.c
478
readl_relaxed(aes_base_reg + DTHE_P_AES_DATA_IN_OUT + (DTHE_REG_SIZE * i));
drivers/crypto/ti/dthev2-aes.c
488
iv_out[i] = readl_relaxed(aes_base_reg +
drivers/crypto/ti/dthev2-aes.c
720
tag[i] = readl_relaxed(aes_base_reg +
drivers/crypto/ti/dthev2-aes.c
887
u32 aes_irqenable_val = readl_relaxed(aes_base_reg + DTHE_P_AES_IRQENABLE);
drivers/crypto/ti/dthev2-aes.c
888
u32 aes_sysconfig_val = readl_relaxed(aes_base_reg + DTHE_P_AES_SYSCONFIG);
drivers/devfreq/event/rockchip-dfi.c
140
ddrmon_ver = readl_relaxed(dfi->regs);
drivers/devfreq/event/rockchip-dfi.c
256
res->c[i].read_access = readl_relaxed(dfi_regs +
drivers/devfreq/event/rockchip-dfi.c
258
res->c[i].write_access = readl_relaxed(dfi_regs +
drivers/devfreq/event/rockchip-dfi.c
260
res->c[i].access = readl_relaxed(dfi_regs +
drivers/devfreq/event/rockchip-dfi.c
262
res->c[i].clock_cycles = readl_relaxed(dfi_regs +
drivers/devfreq/sun8i-a33-mbus.c
108
return readl_relaxed(priv->reg_mbus + MBUS_TOTAL_BWCR);
drivers/devfreq/sun8i-a33-mbus.c
152
pwrctl = readl_relaxed(priv->reg_dram + DRAM_PWRCTL) &
drivers/devfreq/sun8i-a33-mbus.c
155
vtfcr = readl_relaxed(priv->reg_dram + DRAM_VTFCR);
drivers/devfreq/sun8i-a33-mbus.c
267
mbus_cr = readl_relaxed(priv->reg_mbus + MBUS_CR);
drivers/devfreq/sun8i-a33-mbus.c
285
priv->odtmap = readl_relaxed(priv->reg_dram + DRAM_ODTMAP);
drivers/devfreq/sun8i-a33-mbus.c
291
if (!(readl_relaxed(reg) & DRAM_DXnGCR0_DXEN))
drivers/devfreq/tegra30-devfreq.c
220
return readl_relaxed(tegra->regs + offset);
drivers/devfreq/tegra30-devfreq.c
230
return readl_relaxed(dev->regs + offset);
drivers/dma/apple-admac.c
156
ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE);
drivers/dma/apple-admac.c
157
ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE);
drivers/dma/apple-admac.c
209
u32 curr = readl_relaxed(addr);
drivers/dma/apple-admac.c
319
if (readl_relaxed(ad->base + REG_DESC_RING(channo)) & RING_FULL)
drivers/dma/apple-admac.c
353
ring1 = readl_relaxed(ad->base + REG_REPORT_RING(channo));
drivers/dma/apple-admac.c
354
residue1 = readl_relaxed(ad->base + REG_RESIDUE(channo));
drivers/dma/apple-admac.c
355
ring2 = readl_relaxed(ad->base + REG_REPORT_RING(channo));
drivers/dma/apple-admac.c
356
residue2 = readl_relaxed(ad->base + REG_RESIDUE(channo));
drivers/dma/apple-admac.c
607
if (readl_relaxed(ad->base + REG_REPORT_RING(channo)) & RING_EMPTY)
drivers/dma/apple-admac.c
610
countval_lo = readl_relaxed(ad->base + REG_REPORT_READ(channo));
drivers/dma/apple-admac.c
611
countval_hi = readl_relaxed(ad->base + REG_REPORT_READ(channo));
drivers/dma/apple-admac.c
612
unk1 = readl_relaxed(ad->base + REG_REPORT_READ(channo));
drivers/dma/apple-admac.c
613
flags = readl_relaxed(ad->base + REG_REPORT_READ(channo));
drivers/dma/apple-admac.c
626
if (readl_relaxed(ad->base + REG_DESC_RING(channo)) & RING_ERR) {
drivers/dma/apple-admac.c
632
if (readl_relaxed(ad->base + REG_REPORT_RING(channo)) & RING_ERR) {
drivers/dma/apple-admac.c
672
u32 cause = readl_relaxed(ad->base + REG_CHAN_INTSTATUS(no, ad->irq_index));
drivers/dma/apple-admac.c
687
rx_intstate = readl_relaxed(ad->base + REG_RX_INTSTATE(ad->irq_index));
drivers/dma/apple-admac.c
688
tx_intstate = readl_relaxed(ad->base + REG_TX_INTSTATE(ad->irq_index));
drivers/dma/apple-admac.c
689
global_intstate = readl_relaxed(ad->base + REG_GLOBAL_INTSTATE(ad->irq_index));
drivers/dma/apple-admac.c
747
u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) &
drivers/dma/arm-dma350.c
324
hi_new = readl_relaxed(dch->base + CH_XSIZEHI);
drivers/dma/arm-dma350.c
327
xsize = readl_relaxed(dch->base + CH_XSIZE);
drivers/dma/arm-dma350.c
328
hi_new = readl_relaxed(dch->base + CH_XSIZEHI);
drivers/dma/arm-dma350.c
476
u32 errinfo = readl_relaxed(dch->base + CH_ERRINFO);
drivers/dma/arm-dma350.c
539
reg = readl_relaxed(base + DMAINFO + IIDR);
drivers/dma/arm-dma350.c
546
reg = readl_relaxed(base + DMAINFO + DMA_BUILDCFG0);
drivers/dma/arm-dma350.c
560
reg = readl_relaxed(base + DMAINFO + DMA_BUILDCFG1);
drivers/dma/arm-dma350.c
593
reg = readl_relaxed(dch->base + CH_BUILDCFG1);
drivers/dma/arm-dma350.c
610
reg = readl_relaxed(dch->base + CH_BUILDCFG0);
drivers/dma/at_xdmac.c
2287
reg = readl_relaxed(base + AT_XDMAC_GTYPE);
drivers/dma/at_xdmac.c
315
#define at_xdmac_read(atxdmac, reg) readl_relaxed((atxdmac)->regs + (reg))
drivers/dma/at_xdmac.c
319
#define at_xdmac_chan_read(atchan, reg) readl_relaxed((atchan)->ch_regs + (reg))
drivers/dma/hisi_dma.c
340
tmp = readl_relaxed(addr);
drivers/dma/hisi_dma.c
675
tmp = readl_relaxed(addr);
drivers/dma/imx-sdma.c
709
evt = readl_relaxed(sdma->regs + SDMA_H_EVTOVR);
drivers/dma/imx-sdma.c
710
mcu = readl_relaxed(sdma->regs + SDMA_H_HOSTOVR);
drivers/dma/imx-sdma.c
711
dsp = readl_relaxed(sdma->regs + SDMA_H_DSPOVR);
drivers/dma/imx-sdma.c
809
val = readl_relaxed(sdma->regs + chnenbl);
drivers/dma/imx-sdma.c
815
val = readl_relaxed(sdma->regs + SDMA_DONE0_CONFIG);
drivers/dma/imx-sdma.c
829
val = readl_relaxed(sdma->regs + chnenbl);
drivers/dma/imx-sdma.c
950
stat = readl_relaxed(sdma->regs + SDMA_H_INTR);
drivers/dma/k3dma.c
138
val = readl_relaxed(phy->base + CX_CFG);
drivers/dma/k3dma.c
142
val = readl_relaxed(phy->base + CX_CFG);
drivers/dma/k3dma.c
174
cnt = readl_relaxed(d->base + CX_CUR_CNT + phy->idx * 0x10);
drivers/dma/k3dma.c
181
return readl_relaxed(phy->base + CX_LLI);
drivers/dma/k3dma.c
186
return readl_relaxed(d->base + CH_STAT);
drivers/dma/k3dma.c
214
u32 stat = readl_relaxed(d->base + INT_STAT);
drivers/dma/k3dma.c
215
u32 tc1 = readl_relaxed(d->base + INT_TC1);
drivers/dma/k3dma.c
216
u32 tc2 = readl_relaxed(d->base + INT_TC2);
drivers/dma/k3dma.c
217
u32 err1 = readl_relaxed(d->base + INT_ERR1);
drivers/dma/k3dma.c
218
u32 err2 = readl_relaxed(d->base + INT_ERR2);
drivers/dma/milbeaut-hdmac.c
180
val = readl_relaxed(mc->reg_ch_base + MLB_HDMAC_DMACB);
drivers/dma/milbeaut-hdmac.c
232
val = readl_relaxed(mc->reg_ch_base + MLB_HDMAC_DMACA);
drivers/dma/milbeaut-hdmac.c
247
val = readl_relaxed(mc->reg_ch_base + MLB_HDMAC_DMACA);
drivers/dma/milbeaut-hdmac.c
298
val = readl_relaxed(mc->reg_ch_base + MLB_HDMAC_DMACA);
drivers/dma/milbeaut-hdmac.c
353
done = readl_relaxed(mc->reg_ch_base
drivers/dma/milbeaut-hdmac.c
356
done = readl_relaxed(mc->reg_ch_base
drivers/dma/milbeaut-xdmac.c
127
val = readl_relaxed(mc->reg_ch_base + M10V_XDSAC);
drivers/dma/milbeaut-xdmac.c
133
val = readl_relaxed(mc->reg_ch_base + M10V_XDDAC);
drivers/dma/milbeaut-xdmac.c
140
val = readl_relaxed(mc->reg_ch_base + M10V_XDDES);
drivers/dma/mv_xor.c
100
return readl_relaxed(XOR_CURR_DESC(chan));
drivers/dma/mv_xor.c
111
u32 val = readl_relaxed(XOR_INTR_MASK(chan));
drivers/dma/mv_xor.c
118
u32 intr_cause = readl_relaxed(XOR_INTR_CAUSE(chan));
drivers/dma/mv_xor.c
1260
readl_relaxed(XOR_CONFIG(mv_chan));
drivers/dma/mv_xor.c
1262
readl_relaxed(XOR_INTR_MASK(mv_chan));
drivers/dma/mv_xor.c
142
u32 config = readl_relaxed(XOR_CONFIG(chan));
drivers/dma/mv_xor.c
166
u32 state = readl_relaxed(XOR_ACTIVATION(chan));
drivers/dma/mv_xor.c
696
val = readl_relaxed(XOR_CONFIG(chan));
drivers/dma/mv_xor.c
699
val = readl_relaxed(XOR_ACTIVATION(chan));
drivers/dma/mv_xor.c
702
val = readl_relaxed(XOR_INTR_CAUSE(chan));
drivers/dma/mv_xor.c
705
val = readl_relaxed(XOR_INTR_MASK(chan));
drivers/dma/mv_xor.c
708
val = readl_relaxed(XOR_ERROR_CAUSE(chan));
drivers/dma/mv_xor.c
711
val = readl_relaxed(XOR_ERROR_ADDR(chan));
drivers/dma/pxa_dma.c
147
readl_relaxed((phy)->base + _reg((phy)->idx))
drivers/dma/pxa_dma.c
151
_v = readl_relaxed((phy)->base + _reg((phy)->idx)); \
drivers/dma/pxa_dma.c
197
drcmr = readl_relaxed(phy->base + pxad_drcmr(i));
drivers/dma/qcom/bam_dma.c
1205
val = readl_relaxed(bam_addr(bdev, 0, BAM_REVISION));
drivers/dma/qcom/bam_dma.c
1214
val = readl_relaxed(bam_addr(bdev, 0, BAM_NUM_PIPES));
drivers/dma/qcom/bam_dma.c
460
val = readl_relaxed(bam_addr(bdev, 0, BAM_CTRL));
drivers/dma/qcom/bam_dma.c
541
val = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_SRCS_MSK_EE));
drivers/dma/qcom/bam_dma.c
624
val = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_SRCS_MSK_EE));
drivers/dma/qcom/bam_dma.c
633
val = readl_relaxed(bam_addr(bdev, 0, BAM_CTRL));
drivers/dma/qcom/bam_dma.c
849
srcs = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_SRCS_EE));
drivers/dma/qcom/bam_dma.c
862
pipe_stts = readl_relaxed(bam_addr(bdev, i, BAM_P_IRQ_STTS));
drivers/dma/qcom/bam_dma.c
868
offset = readl_relaxed(bam_addr(bdev, i, BAM_P_SW_OFSTS)) &
drivers/dma/qcom/bam_dma.c
934
clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS));
drivers/dma/qcom/gpi.c
564
return readl_relaxed(addr);
drivers/dma/qcom/hidma_ll.c
244
evre_write_off = readl_relaxed(lldev->evca + HIDMA_EVCA_WRITE_PTR_REG);
drivers/dma/qcom/hidma_ll.c
279
readl_relaxed(lldev->evca + HIDMA_EVCA_WRITE_PTR_REG);
drivers/dma/qcom/hidma_ll.c
431
status = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG);
drivers/dma/qcom/hidma_ll.c
432
enable = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
drivers/dma/qcom/hidma_ll.c
442
status = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG);
drivers/dma/qcom/hidma_ll.c
443
enable = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
drivers/dma/qcom/qcom_adm.c
575
srcs = readl_relaxed(adev->regs +
drivers/dma/qcom/qcom_adm.c
583
status = readl_relaxed(adev->regs +
drivers/dma/qcom/qcom_adm.c
590
result = readl_relaxed(adev->regs +
drivers/dma/sa11x0-dma.c
1009
dcsr = saved_dcsr = readl_relaxed(p->base + DMA_DCSR_R);
drivers/dma/sa11x0-dma.c
1012
dcsr = readl_relaxed(p->base + DMA_DCSR_R);
drivers/dma/sa11x0-dma.c
1017
p->dbs[0] = readl_relaxed(p->base + DMA_DBSB);
drivers/dma/sa11x0-dma.c
1018
p->dbt[0] = readl_relaxed(p->base + DMA_DBTB);
drivers/dma/sa11x0-dma.c
1019
p->dbs[1] = readl_relaxed(p->base + DMA_DBSA);
drivers/dma/sa11x0-dma.c
1020
p->dbt[1] = readl_relaxed(p->base + DMA_DBTA);
drivers/dma/sa11x0-dma.c
1024
p->dbs[0] = readl_relaxed(p->base + DMA_DBSA);
drivers/dma/sa11x0-dma.c
1025
p->dbt[0] = readl_relaxed(p->base + DMA_DBTA);
drivers/dma/sa11x0-dma.c
1026
p->dbs[1] = readl_relaxed(p->base + DMA_DBSB);
drivers/dma/sa11x0-dma.c
1027
p->dbt[1] = readl_relaxed(p->base + DMA_DBTB);
drivers/dma/sa11x0-dma.c
1046
u32 dcsr = readl_relaxed(p->base + DMA_DCSR_R);
drivers/dma/sa11x0-dma.c
170
dcsr = readl_relaxed(base + DMA_DCSR_R);
drivers/dma/sa11x0-dma.c
255
dcsr = readl_relaxed(p->base + DMA_DCSR_R);
drivers/dma/sa11x0-dma.c
268
readl_relaxed(p->base + DMA_DDAR),
drivers/dma/sa11x0-dma.c
269
readl_relaxed(p->base + DMA_DBSA),
drivers/dma/sa11x0-dma.c
270
readl_relaxed(p->base + DMA_DBTA),
drivers/dma/sa11x0-dma.c
271
readl_relaxed(p->base + DMA_DBSB),
drivers/dma/sa11x0-dma.c
272
readl_relaxed(p->base + DMA_DBTB));
drivers/dma/sa11x0-dma.c
312
WARN_ON(readl_relaxed(p->base + DMA_DCSR_R) &
drivers/dma/sa11x0-dma.c
406
dcsr = readl_relaxed(p->base + DMA_DCSR_R);
drivers/dma/sa11x0-dma.c
414
return readl_relaxed(p->base + reg);
drivers/dma/ste_dma40.c
2956
backup[i] = readl_relaxed(addr);
drivers/dma/stm32/stm32-dma.c
258
return readl_relaxed(dmadev->base + reg);
drivers/dma/stm32/stm32-dma3.c
1020
misr = readl_relaxed(ddata->base + STM32_DMA3_MISR);
drivers/dma/stm32/stm32-dma3.c
1026
csr = readl_relaxed(ddata->base + STM32_DMA3_CSR(chan->id));
drivers/dma/stm32/stm32-dma3.c
1027
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & CCR_ALLIE;
drivers/dma/stm32/stm32-dma3.c
1077
csemcr = readl_relaxed(ddata->base + STM32_DMA3_CSEMCR(chan->id));
drivers/dma/stm32/stm32-dma3.c
1081
csemcr = readl_relaxed(ddata->base + STM32_DMA3_CSEMCR(chan->id));
drivers/dma/stm32/stm32-dma3.c
1124
readl_relaxed(ddata->base + STM32_DMA3_CSEMCR(chan->id)) & CSEMCR_SEM_MUTEX) {
drivers/dma/stm32/stm32-dma3.c
1621
semcr = readl_relaxed(ddata->base + STM32_DMA3_CSEMCR(chan->id));
drivers/dma/stm32/stm32-dma3.c
1677
chan_reserved = readl_relaxed(ddata->base + STM32_DMA3_SECCFGR);
drivers/dma/stm32/stm32-dma3.c
1689
ccidcfgr = readl_relaxed(ddata->base + STM32_DMA3_CCIDCFGR(i));
drivers/dma/stm32/stm32-dma3.c
1807
hwcfgr = readl_relaxed(ddata->base + STM32_DMA3_HWCFGR1);
drivers/dma/stm32/stm32-dma3.c
1813
hwcfgr = readl_relaxed(ddata->base + STM32_DMA3_HWCFGR2);
drivers/dma/stm32/stm32-dma3.c
1818
hwcfgr = readl_relaxed(ddata->base + STM32_DMA3_HWCFGR1);
drivers/dma/stm32/stm32-dma3.c
1853
hwcfgr = readl_relaxed(ddata->base + STM32_DMA3_HWCFGR3);
drivers/dma/stm32/stm32-dma3.c
1854
hwcfgr |= ((u64)readl_relaxed(ddata->base + STM32_DMA3_HWCFGR4)) << 32;
drivers/dma/stm32/stm32-dma3.c
1909
verr = readl_relaxed(ddata->base + STM32_DMA3_VERR);
drivers/dma/stm32/stm32-dma3.c
1967
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id));
drivers/dma/stm32/stm32-dma3.c
348
dev_dbg(dev, "SECCFGR(0x%03x): %08x\n", offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
350
dev_dbg(dev, "PRIVCFGR(0x%03x): %08x\n", offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
352
dev_dbg(dev, "C%dCIDCFGR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
354
dev_dbg(dev, "C%dSEMCR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
356
dev_dbg(dev, "C%dSR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
358
dev_dbg(dev, "C%dCR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
360
dev_dbg(dev, "C%dTR1(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
362
dev_dbg(dev, "C%dTR2(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
364
dev_dbg(dev, "C%dBR1(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
366
dev_dbg(dev, "C%dSAR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
368
dev_dbg(dev, "C%dDAR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
370
dev_dbg(dev, "C%dLLR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
372
dev_dbg(dev, "C%dLBAR(0x%03x): %08x\n", id, offset, readl_relaxed(ddata->base + offset));
drivers/dma/stm32/stm32-dma3.c
472
u32 ctr1 = readl_relaxed(ddata->base + STM32_DMA3_CTR1(chan->id));
drivers/dma/stm32/stm32-dma3.c
473
u32 cbr1 = readl_relaxed(ddata->base + STM32_DMA3_CBR1(chan->id));
drivers/dma/stm32/stm32-dma3.c
474
u32 csar = readl_relaxed(ddata->base + STM32_DMA3_CSAR(chan->id));
drivers/dma/stm32/stm32-dma3.c
475
u32 cdar = readl_relaxed(ddata->base + STM32_DMA3_CDAR(chan->id));
drivers/dma/stm32/stm32-dma3.c
476
u32 cllr = readl_relaxed(ddata->base + STM32_DMA3_CLLR(chan->id));
drivers/dma/stm32/stm32-dma3.c
799
csr = readl_relaxed(ddata->base + STM32_DMA3_CSR(id));
drivers/dma/stm32/stm32-dma3.c
805
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(id));
drivers/dma/stm32/stm32-dma3.c
816
u32 csr, ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN;
drivers/dma/stm32/stm32-dma3.c
841
u32 ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN;
drivers/dma/stm32/stm32-dma3.c
880
csr = readl_relaxed(ddata->base + STM32_DMA3_CSR(chan->id));
drivers/dma/stm32/stm32-dma3.c
907
cllr = readl_relaxed(ddata->base + STM32_DMA3_CLLR(chan->id));
drivers/dma/stm32/stm32-dma3.c
908
cbr1 = readl_relaxed(ddata->base + STM32_DMA3_CBR1(chan->id));
drivers/dma/stm32/stm32-dma3.c
909
cdar = readl_relaxed(ddata->base + STM32_DMA3_CDAR(chan->id));
drivers/dma/stm32/stm32-dma3.c
983
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id));
drivers/dma/stm32/stm32-dmamux.c
56
return readl_relaxed(iomem + reg);
drivers/dma/stm32/stm32-mdma.c
1406
status = readl_relaxed(dmadev->base + STM32_MDMA_GISR0);
drivers/dma/stm32/stm32-mdma.c
1437
readl_relaxed(dmadev->base + STM32_MDMA_CESR(id)));
drivers/dma/stm32/stm32-mdma.c
291
return readl_relaxed(dmadev->base + reg);
drivers/dma/stm32/stm32-mdma.c
304
writel_relaxed(readl_relaxed(addr) | mask, addr);
drivers/dma/stm32/stm32-mdma.c
312
writel_relaxed(readl_relaxed(addr) & ~mask, addr);
drivers/dma/sun4i-dma.c
1127
pendirq = readl_relaxed(priv->base + SUN4I_DMA_IRQ_PENDING_STATUS_REG);
drivers/dma/sun4i-dma.c
1194
irqs = readl_relaxed(priv->base + SUN4I_DMA_IRQ_ENABLE_REG);
drivers/dma/sun4i-dma.c
1220
pendirq = readl_relaxed(priv->base +
drivers/dma/sun4i-dma.c
384
reg = readl_relaxed(priv->base + SUN4I_DMA_IRQ_ENABLE_REG);
drivers/dma/tegra186-gpc-dma.c
254
return readl_relaxed(tdc->tdma->base_addr + tdc->chan_base_offset + reg);
drivers/dma/ti/omap-dma.c
341
val = readl_relaxed(addr);
drivers/edac/al_mc_edac.c
128
eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT);
drivers/edac/al_mc_edac.c
133
eccuaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR0);
drivers/edac/al_mc_edac.c
134
eccuaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR1);
drivers/edac/al_mc_edac.c
135
eccusyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND0);
drivers/edac/al_mc_edac.c
136
eccusyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND1);
drivers/edac/al_mc_edac.c
137
eccusyn2 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND2);
drivers/edac/al_mc_edac.c
83
eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT);
drivers/edac/al_mc_edac.c
88
ecccaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR0);
drivers/edac/al_mc_edac.c
89
ecccaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR1);
drivers/edac/al_mc_edac.c
90
ecccsyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND0);
drivers/edac/al_mc_edac.c
91
ecccsyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND1);
drivers/edac/al_mc_edac.c
92
ecccsyn2 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND2);
drivers/edac/ti_edac.c
84
return readl_relaxed(edac->reg + offset);
drivers/gpio/gpio-amd-fch.c
108
mask = readl_relaxed(ptr);
drivers/gpio/gpio-amd-fch.c
129
val = readl_relaxed(ptr);
drivers/gpio/gpio-amd-fch.c
56
writel_relaxed(readl_relaxed(ptr) & ~AMD_FCH_GPIO_FLAG_DIRECTION, ptr);
drivers/gpio/gpio-amd-fch.c
72
val = readl_relaxed(ptr);
drivers/gpio/gpio-amd-fch.c
93
ret = (readl_relaxed(ptr) & AMD_FCH_GPIO_FLAG_DIRECTION);
drivers/gpio/gpio-blzp1600.c
56
return readl_relaxed(chip->base + offset);
drivers/gpio/gpio-blzp1600.c
66
u32 val = readl_relaxed(reg);
drivers/gpio/gpio-davinci.c
124
val = readl_relaxed(&g->dir);
drivers/gpio/gpio-davinci.c
144
return !!(__gpio_mask(offset) & readl_relaxed(&g->in_data));
drivers/gpio/gpio-davinci.c
340
status = readl_relaxed(&g->intstat) & mask;
drivers/gpio/gpio-davinci.c
605
chips->binten_context = readl_relaxed(base + BINTEN);
drivers/gpio/gpio-davinci.c
610
context->dir = readl_relaxed(&g->dir);
drivers/gpio/gpio-davinci.c
611
context->set_data = readl_relaxed(&g->set_data);
drivers/gpio/gpio-davinci.c
612
context->set_rising = readl_relaxed(&g->set_rising);
drivers/gpio/gpio-davinci.c
613
context->set_falling = readl_relaxed(&g->set_falling);
drivers/gpio/gpio-davinci.c
630
if (readl_relaxed(base + BINTEN) != chips->binten_context)
drivers/gpio/gpio-davinci.c
636
if (readl_relaxed(&g->dir) != context->dir)
drivers/gpio/gpio-davinci.c
638
if (readl_relaxed(&g->set_data) != context->set_data)
drivers/gpio/gpio-davinci.c
640
if (readl_relaxed(&g->set_rising) != context->set_rising)
drivers/gpio/gpio-davinci.c
642
if (readl_relaxed(&g->set_falling) != context->set_falling)
drivers/gpio/gpio-davinci.c
89
temp = readl_relaxed(&g->dir);
drivers/gpio/gpio-eic-sprd.c
153
tmp = readl_relaxed(base + reg);
drivers/gpio/gpio-eic-sprd.c
170
return !!(readl_relaxed(base + reg) & BIT(SPRD_EIC_BIT(offset)));
drivers/gpio/gpio-eic-sprd.c
219
u32 value = readl_relaxed(base + reg) & ~SPRD_EIC_DBNC_MASK;
drivers/gpio/gpio-eic-sprd.c
537
reg = readl_relaxed(base + SPRD_EIC_DBNC_MIS) &
drivers/gpio/gpio-eic-sprd.c
541
reg = readl_relaxed(base + SPRD_EIC_LATCH_INTMSK) &
drivers/gpio/gpio-eic-sprd.c
545
reg = readl_relaxed(base + SPRD_EIC_ASYNC_INTMSK) &
drivers/gpio/gpio-eic-sprd.c
549
reg = readl_relaxed(base + SPRD_EIC_SYNC_INTMSK) &
drivers/gpio/gpio-lpc18xx.c
58
u32 val = readl_relaxed(ic->base + LPC18XX_GPIO_PIN_IC_ISEL);
drivers/gpio/gpio-nomadik.c
702
nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI);
drivers/gpio/gpio-omap.c
1027
bank->context.oe = readl_relaxed(bank->base + bank->regs->direction);
drivers/gpio/gpio-omap.c
1101
p->context.sysconfig = readl_relaxed(base + regs->sysconfig);
drivers/gpio/gpio-omap.c
1102
p->context.ctrl = readl_relaxed(base + regs->ctrl);
drivers/gpio/gpio-omap.c
1103
p->context.oe = readl_relaxed(base + regs->direction);
drivers/gpio/gpio-omap.c
1104
p->context.wake_en = readl_relaxed(base + regs->wkup_en);
drivers/gpio/gpio-omap.c
1105
p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0);
drivers/gpio/gpio-omap.c
1106
p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1);
drivers/gpio/gpio-omap.c
1107
p->context.risingdetect = readl_relaxed(base + regs->risingdetect);
drivers/gpio/gpio-omap.c
1108
p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect);
drivers/gpio/gpio-omap.c
1109
p->context.irqenable1 = readl_relaxed(base + regs->irqenable);
drivers/gpio/gpio-omap.c
1110
p->context.irqenable2 = readl_relaxed(base + regs->irqenable2);
drivers/gpio/gpio-omap.c
1111
p->context.dataout = readl_relaxed(base + regs->dataout);
drivers/gpio/gpio-omap.c
1147
bank->saved_datain = readl_relaxed(base + bank->regs->datain);
drivers/gpio/gpio-omap.c
1151
bank->context.sysconfig = readl_relaxed(base + bank->regs->sysconfig);
drivers/gpio/gpio-omap.c
1228
l = readl_relaxed(bank->base + bank->regs->datain);
drivers/gpio/gpio-omap.c
1258
old0 = readl_relaxed(bank->base + bank->regs->leveldetect0);
drivers/gpio/gpio-omap.c
1259
old1 = readl_relaxed(bank->base + bank->regs->leveldetect1);
drivers/gpio/gpio-omap.c
1296
isr = readl_relaxed(bank->base + bank->regs->irqstatus) & mask;
drivers/gpio/gpio-omap.c
295
readl_relaxed(bank->base + bank->regs->leveldetect0);
drivers/gpio/gpio-omap.c
297
readl_relaxed(bank->base + bank->regs->leveldetect1);
drivers/gpio/gpio-omap.c
299
readl_relaxed(bank->base + bank->regs->risingdetect);
drivers/gpio/gpio-omap.c
301
readl_relaxed(bank->base + bank->regs->fallingdetect);
drivers/gpio/gpio-omap.c
330
writel_relaxed(readl_relaxed(reg) ^ BIT(gpio), reg);
drivers/gpio/gpio-omap.c
345
l = readl_relaxed(reg);
drivers/gpio/gpio-omap.c
363
l = readl_relaxed(reg);
drivers/gpio/gpio-omap.c
380
writel_relaxed(readl_relaxed(reg) | (BIT(offset)), reg);
drivers/gpio/gpio-omap.c
387
ctrl = readl_relaxed(reg);
drivers/gpio/gpio-omap.c
401
ctrl = readl_relaxed(reg);
drivers/gpio/gpio-omap.c
413
return readl_relaxed(reg) & BIT(offset);
drivers/gpio/gpio-omap.c
484
readl_relaxed(reg);
drivers/gpio/gpio-omap.c
500
l = readl_relaxed(reg);
drivers/gpio/gpio-omap.c
580
isr = readl_relaxed(isr_reg) & enabled;
drivers/gpio/gpio-omap.c
849
if (readl_relaxed(bank->base + bank->regs->direction) & BIT(offset))
drivers/gpio/gpio-omap.c
877
return (readl_relaxed(reg) & BIT(offset)) != 0;
drivers/gpio/gpio-omap.c
900
direction = readl_relaxed(base + bank->regs->direction);
drivers/gpio/gpio-omap.c
904
val |= readl_relaxed(base + bank->regs->datain) & m;
drivers/gpio/gpio-omap.c
908
val |= readl_relaxed(base + bank->regs->dataout) & m;
drivers/gpio/gpio-omap.c
97
u32 val = readl_relaxed(reg);
drivers/gpio/gpio-omap.c
981
l = (readl_relaxed(reg) & ~*mask) | (*bits & *mask);
drivers/gpio/gpio-pxa.c
201
gpdr = readl_relaxed(base + GPDR_OFFSET);
drivers/gpio/gpio-pxa.c
207
gafr = readl_relaxed(base + GAFR_OFFSET);
drivers/gpio/gpio-pxa.c
270
value = readl_relaxed(base + GPDR_OFFSET);
drivers/gpio/gpio-pxa.c
299
tmp = readl_relaxed(base + GPDR_OFFSET);
drivers/gpio/gpio-pxa.c
313
u32 gplr = readl_relaxed(base + GPLR_OFFSET);
drivers/gpio/gpio-pxa.c
384
grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask;
drivers/gpio/gpio-pxa.c
385
gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask;
drivers/gpio/gpio-pxa.c
412
gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
drivers/gpio/gpio-pxa.c
447
gedr = readl_relaxed(c->regbase + GEDR_OFFSET);
drivers/gpio/gpio-pxa.c
498
grer = readl_relaxed(base + GRER_OFFSET) & ~GPIO_bit(gpio);
drivers/gpio/gpio-pxa.c
499
gfer = readl_relaxed(base + GFER_OFFSET) & ~GPIO_bit(gpio);
drivers/gpio/gpio-pxa.c
760
c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET);
drivers/gpio/gpio-pxa.c
761
c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
drivers/gpio/gpio-pxa.c
762
c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET);
drivers/gpio/gpio-pxa.c
763
c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET);
drivers/gpio/gpio-rda.c
190
status = readl_relaxed(rda_gpio->base + RDA_GPIO_INT_STATUS);
drivers/gpio/gpio-rda.c
54
tmp = readl_relaxed(base + reg);
drivers/gpio/gpio-reg.c
89
readl_relaxed(r->reg);
drivers/gpio/gpio-reg.c
90
val = readl_relaxed(r->reg);
drivers/gpio/gpio-rockchip.c
344
pending = readl_relaxed(bank->reg_base + bank->gpio_regs->int_status);
drivers/gpio/gpio-rockchip.c
356
data = readl_relaxed(bank->reg_base +
drivers/gpio/gpio-rockchip.c
361
polarity = readl_relaxed(bank->reg_base +
drivers/gpio/gpio-rockchip.c
374
data = readl_relaxed(bank->reg_base +
drivers/gpio/gpio-rtd.c
289
val = readl_relaxed(data->base + dato_reg_offset);
drivers/gpio/gpio-rtd.c
310
val = readl_relaxed(data->base + dir_reg_offset);
drivers/gpio/gpio-rtd.c
312
val = readl_relaxed(data->base + dat_reg_offset);
drivers/gpio/gpio-rtd.c
324
val = readl_relaxed(data->base + reg_offset);
drivers/gpio/gpio-rtd.c
342
val = readl_relaxed(data->base + reg_offset);
drivers/gpio/gpio-rtd.c
371
enable = readl_relaxed(data->base + ie_reg_offset);
drivers/gpio/gpio-rtd.c
403
status = readl_relaxed(data->irq_base + reg_offset);
drivers/gpio/gpio-rtd.c
449
val = readl_relaxed(data->base + ie_reg_offset);
drivers/gpio/gpio-rtd.c
466
val = readl_relaxed(data->base + ie_reg_offset);
drivers/gpio/gpio-rtd.c
504
val = readl_relaxed(data->base + dp_reg_offset);
drivers/gpio/gpio-sa1100.c
239
mask = readl_relaxed(gedr);
drivers/gpio/gpio-sa1100.c
255
mask = readl_relaxed(gedr);
drivers/gpio/gpio-sa1100.c
272
writel_relaxed(readl_relaxed(sgc->membase + R_GEDR),
drivers/gpio/gpio-sa1100.c
42
return readl_relaxed(sa1100_gpio_chip(chip)->membase + R_GPLR) &
drivers/gpio/gpio-sa1100.c
60
if (readl_relaxed(gpdr) & BIT(offset))
drivers/gpio/gpio-sa1100.c
72
writel_relaxed(readl_relaxed(gpdr) & ~BIT(offset), gpdr);
drivers/gpio/gpio-sa1100.c
85
writel_relaxed(readl_relaxed(gpdr) | BIT(offset), gpdr);
drivers/gpio/gpio-spear-spics.c
103
tmp = readl_relaxed(spics->base + spics->perip_cfg);
drivers/gpio/gpio-spear-spics.c
61
tmp = readl_relaxed(spics->base + spics->perip_cfg);
drivers/gpio/gpio-spear-spics.c
88
tmp = readl_relaxed(spics->base + spics->perip_cfg);
drivers/gpio/gpio-sprd.c
201
unsigned long reg = readl_relaxed(base + SPRD_GPIO_MIS) &
drivers/gpio/gpio-sprd.c
57
tmp = readl_relaxed(base + reg);
drivers/gpio/gpio-sprd.c
74
return !!(readl_relaxed(base + reg) & BIT(SPRD_GPIO_BIT(offset)));
drivers/gpio/gpio-tegra.c
111
return readl_relaxed(tgi->regs + reg);
drivers/gpio/gpio-vf610.c
94
return readl_relaxed(reg);
drivers/gpio/gpio-xgs-iproc.c
102
event_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
drivers/gpio/gpio-xgs-iproc.c
103
int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
drivers/gpio/gpio-xgs-iproc.c
131
event_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EDGE);
drivers/gpio/gpio-xgs-iproc.c
136
event_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EDGE);
drivers/gpio/gpio-xgs-iproc.c
141
int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL);
drivers/gpio/gpio-xgs-iproc.c
146
int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL);
drivers/gpio/gpio-xgs-iproc.c
176
int_status = readl_relaxed(chip->intr + IPROC_CCA_INT_STS);
drivers/gpio/gpio-xgs-iproc.c
182
readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
drivers/gpio/gpio-xgs-iproc.c
183
event &= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT);
drivers/gpio/gpio-xgs-iproc.c
184
level = readl_relaxed(chip->base + IPROC_GPIO_CCA_DIN);
drivers/gpio/gpio-xgs-iproc.c
185
level ^= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL);
drivers/gpio/gpio-xgs-iproc.c
187
readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
drivers/gpio/gpio-xgs-iproc.c
264
val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK);
drivers/gpio/gpio-xgs-iproc.c
305
val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK);
drivers/gpio/gpio-xgs-iproc.c
76
event_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
drivers/gpio/gpio-xgs-iproc.c
77
int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
drivers/gpio/gpio-zynq.c
237
data = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
240
data = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
245
data = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
248
data = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
253
data = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
327
reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
drivers/gpio/gpio-zynq.c
359
reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
drivers/gpio/gpio-zynq.c
364
reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
drivers/gpio/gpio-zynq.c
391
reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
drivers/gpio/gpio-zynq.c
514
int_type = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
516
int_pol = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
518
int_any = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
665
int_sts = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
667
int_enb = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
683
readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
686
readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
688
gpio->context.dirm[bank_num] = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
690
gpio->context.int_en[bank_num] = readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
693
readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
696
readl_relaxed(gpio->base_addr +
drivers/gpio/gpio-zynq.c
699
readl_relaxed(gpio->base_addr +
drivers/gpu/drm/armada/armada_crtc.c
152
readl_relaxed(base + LCD_SPU_HWC_OVSA_HPXL_VLN);
drivers/gpu/drm/armada/armada_crtc.c
157
readl_relaxed(base + LCD_SPU_HWC_OVSA_HPXL_VLN);
drivers/gpu/drm/armada/armada_crtc.c
162
readl_relaxed(base + LCD_SPU_HWC_OVSA_HPXL_VLN);
drivers/gpu/drm/armada/armada_crtc.c
242
if (readl_relaxed(dcrtc->base + LCD_SPU_IRQ_ISR) & mask)
drivers/gpu/drm/armada/armada_crtc.c
269
val = readl_relaxed(base + LCD_SPU_ADV_REG);
drivers/gpu/drm/armada/armada_crtc.c
309
u32 v, stat = readl_relaxed(dcrtc->base + LCD_SPU_IRQ_ISR);
drivers/gpu/drm/armada/armada_crtc.c
581
readl_relaxed(base + LCD_SPU_HWC_OVSA_HPXL_VLN);
drivers/gpu/drm/armada/armada_crtc.c
656
para1 = readl_relaxed(dcrtc->base + LCD_SPU_SRAM_PARA1);
drivers/gpu/drm/armada/armada_crtc.c
91
val &= readl_relaxed(reg);
drivers/gpu/drm/armada/armada_crtc.c
952
readl_relaxed(dcrtc->base + LCD_SPU_IRQ_ISR);
drivers/gpu/drm/armada/armada_debugfs.c
40
u32 v = readl_relaxed(dcrtc->base + i);
drivers/gpu/drm/armada/armada_drm.h
27
ov = v = readl_relaxed(ptr);
drivers/gpu/drm/bridge/inno-hdmi.c
473
return readl_relaxed(hdmi->regs + (offset) * 0x04);
drivers/gpu/drm/bridge/microchip-lvds.c
72
return readl_relaxed(lvds->regs + offset);
drivers/gpu/drm/exynos/exynos_drm_g2d.c
939
pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
drivers/gpu/drm/exynos/exynos_drm_g2d.c
944
u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
drivers/gpu/drm/meson/meson_drv.c
76
(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
drivers/gpu/drm/meson/meson_dw_hdmi.c
366
readl_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING));
drivers/gpu/drm/meson/meson_registers.h
15
writel_relaxed((readl_relaxed(addr) & ~(mask)) | ((val) & (mask)), addr)
drivers/gpu/drm/meson/meson_venc.c
1158
de_h_begin = modulo(readl_relaxed(priv->io_base +
drivers/gpu/drm/meson/meson_venc.c
1170
de_v_begin_even = readl_relaxed(priv->io_base +
drivers/gpu/drm/meson/meson_venc.c
1173
de_v_begin_odd = readl_relaxed(priv->io_base +
drivers/gpu/drm/meson/meson_venc.c
1405
de_h_begin = modulo(readl_relaxed(priv->io_base +
drivers/gpu/drm/meson/meson_venc.c
1418
de_v_begin_even = readl_relaxed(priv->io_base
drivers/gpu/drm/meson/meson_venc.c
1434
readl_relaxed(priv->io_base +
drivers/gpu/drm/meson/meson_venc.c
1946
return readl_relaxed(priv->io_base + _REG(ENCI_INFO_READ)) & BIT(29);
drivers/gpu/drm/meson/meson_viu.c
320
osd1_fifo_ctrl_stat = readl_relaxed(
drivers/gpu/drm/meson/meson_viu.c
322
osd1_ctrl_stat2 = readl_relaxed(
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
111
return readl_relaxed(c->blk_addr + reg_off);
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
1166
core_rev = readl_relaxed(dpu_kms->mmio + 0x0);
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
228
seq_printf(s, " %08x", readl_relaxed(base + i));
drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
34
x0 = (addr < end_addr) ? readl_relaxed(addr + 0x0) : 0;
drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
35
x4 = (addr + 0x4 < end_addr) ? readl_relaxed(addr + 0x4) : 0;
drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
36
x8 = (addr + 0x8 < end_addr) ? readl_relaxed(addr + 0x8) : 0;
drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
37
xc = (addr + 0xc < end_addr) ? readl_relaxed(addr + 0xc) : 0;
drivers/gpu/drm/msm/dp/dp_audio.c
33
return readl_relaxed(audio->link_base + offset);
drivers/gpu/drm/msm/dp/dp_aux.c
51
return readl_relaxed(aux->aux_base + offset);
drivers/gpu/drm/msm/dp/dp_ctrl.c
147
return readl_relaxed(ctrl->ahb_base + offset);
drivers/gpu/drm/msm/dp/dp_ctrl.c
162
return readl_relaxed(ctrl->link_base + offset);
drivers/gpu/drm/msm/dp/dp_panel.c
34
return readl_relaxed(panel->link_base + offset);
drivers/gpu/drm/msm/dp/dp_panel.c
64
return readl_relaxed(panel->p0_base + offset);
drivers/gpu/drm/msm/msm_mdss.c
268
hw_rev = readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_VERSION);
drivers/gpu/drm/msm/msm_mdss.c
84
interrupts = readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_INTR_STATUS);
drivers/gpu/drm/omapdrm/dss/pll.c
338
if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value)
drivers/gpu/drm/omapdrm/dss/pll.c
345
if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value)
drivers/gpu/drm/omapdrm/dss/pll.c
371
u32 v = readl_relaxed(pll->base + PLL_STATUS);
drivers/gpu/drm/omapdrm/dss/pll.c
426
l = readl_relaxed(base + PLL_CONFIGURATION2);
drivers/gpu/drm/omapdrm/dss/pll.c
469
readl_relaxed(base + PLL_GO);
drivers/gpu/drm/omapdrm/dss/pll.c
472
l = readl_relaxed(base + PLL_STATUS);
drivers/gpu/drm/omapdrm/dss/pll.c
475
!(readl_relaxed(base + PLL_GO) & 0x1))
drivers/gpu/drm/omapdrm/dss/pll.c
501
l = readl_relaxed(base + PLL_CONFIGURATION2);
drivers/gpu/drm/omapdrm/dss/pll.c
536
l = readl_relaxed(base + PLL_CONFIGURATION2);
drivers/gpu/drm/omapdrm/dss/pll.c
550
l = readl_relaxed(base + PLL_CONFIGURATION3);
drivers/gpu/drm/omapdrm/dss/pll.c
554
l = readl_relaxed(base + PLL_CONFIGURATION4);
drivers/gpu/drm/omapdrm/dss/video-pll.c
26
writel_relaxed(FLD_MOD(readl_relaxed(reg), val, start, end), reg)
drivers/gpu/drm/panthor/panthor_device.h
647
return readl_relaxed(iomem + reg);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
71
return readl_relaxed(hdmi->regs + offset);
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
2064
vop->regsbak[i / 4] = readl_relaxed(vop->regs + i);
drivers/gpu/drm/sprd/sprd_dpu.h
77
u32 bits = readl_relaxed(ctx->base + offset);
drivers/gpu/drm/sprd/sprd_dpu.h
85
u32 bits = readl_relaxed(ctx->base + offset);
drivers/gpu/drm/stm/ltdc.c
746
ldev->irq_status = readl_relaxed(ldev->regs + LTDC_ISR);
drivers/gpu/ipu-v3/ipu-pre.c
301
return !!(readl_relaxed(pre->regs + IPU_PRE_CTRL) &
drivers/hsi/controllers/omap_ssi_port.c
737
tmp = readl_relaxed(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
drivers/hwmon/as370-hwmon.c
54
val = readl_relaxed(hwmon->base + STS) & BN_MASK;
drivers/hwmon/sparx5-temp.c
49
stat = readl_relaxed(hwmon->base + TEMP_STAT);
drivers/hwtracing/coresight/coresight-catu.c
542
dma_mask = readl_relaxed(base + CORESIGHT_DEVID) & 0x3f;
drivers/hwtracing/coresight/coresight-cpu-debug.c
160
edprcr = readl_relaxed(drvdata->base + EDPRCR);
drivers/hwtracing/coresight/coresight-cpu-debug.c
165
if (readx_poll_timeout_atomic(readl_relaxed, drvdata->base + EDPRSR,
drivers/hwtracing/coresight/coresight-cpu-debug.c
183
edprcr = readl_relaxed(drvdata->base + EDPRCR);
drivers/hwtracing/coresight/coresight-cpu-debug.c
187
drvdata->edprsr = readl_relaxed(drvdata->base + EDPRSR);
drivers/hwtracing/coresight/coresight-cpu-debug.c
204
save_edprcr = readl_relaxed(drvdata->base + EDPRCR);
drivers/hwtracing/coresight/coresight-cpu-debug.c
215
drvdata->edpcsr = readl_relaxed(drvdata->base + EDPCSR);
drivers/hwtracing/coresight/coresight-cpu-debug.c
233
drvdata->edpcsr_hi = readl_relaxed(drvdata->base + EDPCSR_HI);
drivers/hwtracing/coresight/coresight-cpu-debug.c
236
drvdata->edcidsr = readl_relaxed(drvdata->base + EDCIDSR);
drivers/hwtracing/coresight/coresight-cpu-debug.c
239
drvdata->edvidsr = readl_relaxed(drvdata->base + EDVIDSR);
drivers/hwtracing/coresight/coresight-cpu-debug.c
336
eddevid = readl_relaxed(drvdata->base + EDDEVID);
drivers/hwtracing/coresight/coresight-cpu-debug.c
337
eddevid1 = readl_relaxed(drvdata->base + EDDEVID1);
drivers/hwtracing/coresight/coresight-cti-core.c
130
val = readl_relaxed(drvdata->base + offset);
drivers/hwtracing/coresight/coresight-cti-core.c
170
devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
drivers/hwtracing/coresight/coresight-etb10.c
256
ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
drivers/hwtracing/coresight/coresight-etb10.c
292
read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
drivers/hwtracing/coresight/coresight-etb10.c
293
write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
drivers/hwtracing/coresight/coresight-etb10.c
306
if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
drivers/hwtracing/coresight/coresight-etb10.c
317
read_data = readl_relaxed(drvdata->base +
drivers/hwtracing/coresight/coresight-etb10.c
454
read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
drivers/hwtracing/coresight/coresight-etb10.c
455
write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
drivers/hwtracing/coresight/coresight-etb10.c
477
status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
drivers/hwtracing/coresight/coresight-etb10.c
533
read_data = readl_relaxed(drvdata->base +
drivers/hwtracing/coresight/coresight-etb10.c
98
return readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
drivers/hwtracing/coresight/coresight-etm.h
277
val = readl_relaxed(drvdata->csa.base + off);
drivers/hwtracing/coresight/coresight-etm3x-core.c
105
etmpdcr = readl_relaxed(drvdata->csa.base + ETMPDCR);
drivers/hwtracing/coresight/coresight-etm3x-core.c
90
etmpdcr = readl_relaxed(drvdata->csa.base + ETMPDCR);
drivers/hwtracing/coresight/coresight-etm4x-core.c
1262
u32 devarch = readl_relaxed(drvdata->base + TRCDEVARCH);
drivers/hwtracing/coresight/coresight-etm4x.h
560
readl_relaxed((csa)->base + (offset)) : \
drivers/hwtracing/coresight/coresight-funnel.c
111
functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL);
drivers/hwtracing/coresight/coresight-funnel.c
183
functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL);
drivers/hwtracing/coresight/coresight-funnel.c
59
functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL);
drivers/hwtracing/coresight/coresight-replicator.c
166
if ((readl_relaxed(drvdata->base + REPLICATOR_IDFILTER0) == 0xff) &&
drivers/hwtracing/coresight/coresight-replicator.c
167
(readl_relaxed(drvdata->base + REPLICATOR_IDFILTER1) == 0xff))
drivers/hwtracing/coresight/coresight-replicator.c
79
id0val = readl_relaxed(drvdata->base + REPLICATOR_IDFILTER0);
drivers/hwtracing/coresight/coresight-replicator.c
80
id1val = readl_relaxed(drvdata->base + REPLICATOR_IDFILTER1);
drivers/hwtracing/coresight/coresight-stm.c
245
val = readl_relaxed(drvdata->base + STMTCSR);
drivers/hwtracing/coresight/coresight-stm.c
531
val = readl_relaxed(drvdata->base + STMSPSCR);
drivers/hwtracing/coresight/coresight-stm.c
556
stmsper = readl_relaxed(drvdata->base + STMSPER);
drivers/hwtracing/coresight/coresight-stm.c
578
val = readl_relaxed(drvdata->base + STMSPER);
drivers/hwtracing/coresight/coresight-stm.c
755
stmspfeat2r = readl_relaxed(drvdata->base + STMSPFEAT2R);
drivers/hwtracing/coresight/coresight-stm.c
769
numsp = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
drivers/hwtracing/coresight/coresight-tmc-core.c
55
ffcr = readl_relaxed(drvdata->base + TMC_FFCR);
drivers/hwtracing/coresight/coresight-tmc-core.c
622
u32 auth = readl_relaxed(drvdata->base + TMC_AUTHSTATUS);
drivers/hwtracing/coresight/coresight-tmc-core.c
801
devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
drivers/hwtracing/coresight/coresight-tmc-core.c
812
drvdata->size = readl_relaxed(drvdata->base + TMC_RSZ) * 4;
drivers/hwtracing/coresight/coresight-tmc-etf.c
513
status = readl_relaxed(drvdata->base + TMC_STS);
drivers/hwtracing/coresight/coresight-tmc-etf.c
562
*buf_ptr = readl_relaxed(drvdata->base + TMC_RRD);
drivers/hwtracing/coresight/coresight-tmc-etf.c
69
lost = readl_relaxed(drvdata->base + TMC_STS) & TMC_STS_FULL;
drivers/hwtracing/coresight/coresight-tmc-etf.c
73
read_data = readl_relaxed(drvdata->base + TMC_RRD);
drivers/hwtracing/coresight/coresight-tmc-etf.c
741
mode = readl_relaxed(drvdata->base + TMC_MODE);
drivers/hwtracing/coresight/coresight-tmc-etf.c
772
mode = readl_relaxed(drvdata->base + TMC_MODE);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1036
status = readl_relaxed(drvdata->base + TMC_STS);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1077
axictl = readl_relaxed(drvdata->base + TMC_AXICTL);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1101
sts = readl_relaxed(drvdata->base + TMC_STS) & ~TMC_STS_FULL;
drivers/hwtracing/coresight/coresight-tnoc.c
72
val = readl_relaxed(drvdata->base + TRACE_NOC_CTRL);
drivers/hwtracing/coresight/coresight-tpda.c
185
val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
drivers/hwtracing/coresight/coresight-tpda.c
250
val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
drivers/hwtracing/coresight/coresight-tpda.c
367
val = readl_relaxed(drvdata->base + TPDA_CR);
drivers/hwtracing/coresight/coresight-tpda.c
389
val = readl_relaxed(drvdata->base + TPDA_CR);
drivers/hwtracing/coresight/coresight-tpda.c
411
syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
drivers/hwtracing/coresight/coresight-tpda.c
447
val = readl_relaxed(drvdata->base + TPDA_SYNCR);
drivers/hwtracing/coresight/coresight-tpda.c
485
val = readl_relaxed(drvdata->base + TPDA_FLUSH_CR);
drivers/hwtracing/coresight/coresight-tpdm.c
303
val = readl_relaxed(drvdata->base + TPDM_DSB_TIER);
drivers/hwtracing/coresight/coresight-tpdm.c
365
val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
drivers/hwtracing/coresight/coresight-tpdm.c
382
val = readl_relaxed(drvdata->base + TPDM_CMB_TIER);
drivers/hwtracing/coresight/coresight-tpdm.c
434
val = readl_relaxed(drvdata->base + TPDM_CMB_CR);
drivers/hwtracing/coresight/coresight-tpdm.c
516
val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
drivers/hwtracing/coresight/coresight-tpdm.c
528
val = readl_relaxed(drvdata->base + TPDM_CMB_CR);
drivers/hwtracing/coresight/coresight-tpdm.c
581
pidr = readl_relaxed(drvdata->base + CORESIGHT_PERIPHIDR0);
drivers/i2c/busses/i2c-at91-core.c
30
return readl_relaxed(dev->base + reg);
drivers/i2c/busses/i2c-cadence.c
135
#define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
drivers/i2c/busses/i2c-hix5hd2.c
126
val = readl_relaxed(priv->regs + HIX5I2C_CTRL);
drivers/i2c/busses/i2c-hix5hd2.c
231
data = readl_relaxed(priv->regs + HIX5I2C_RXR);
drivers/i2c/busses/i2c-hix5hd2.c
97
u32 val = readl_relaxed(priv->regs + HIX5I2C_SR);
drivers/i2c/busses/i2c-mt7621.c
114
u32 ack = readl_relaxed(i2c->base + REG_SM0CTL1_REG);
drivers/i2c/busses/i2c-qcom-geni.c
1101
fifo_disable = readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE;
drivers/i2c/busses/i2c-qcom-geni.c
223
u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0);
drivers/i2c/busses/i2c-qcom-geni.c
224
u32 m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS);
drivers/i2c/busses/i2c-qcom-geni.c
225
u32 geni_s = readl_relaxed(gi2c->se.base + SE_GENI_STATUS);
drivers/i2c/busses/i2c-qcom-geni.c
226
u32 geni_ios = readl_relaxed(gi2c->se.base + SE_GENI_IOS);
drivers/i2c/busses/i2c-qcom-geni.c
227
u32 dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN);
drivers/i2c/busses/i2c-qcom-geni.c
231
rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
drivers/i2c/busses/i2c-qcom-geni.c
232
tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
drivers/i2c/busses/i2c-qcom-geni.c
234
rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS);
drivers/i2c/busses/i2c-qcom-geni.c
235
tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS);
drivers/i2c/busses/i2c-qcom-geni.c
280
m_stat = readl_relaxed(base + SE_GENI_M_IRQ_STATUS);
drivers/i2c/busses/i2c-qcom-geni.c
281
rx_st = readl_relaxed(base + SE_GENI_RX_FIFO_STATUS);
drivers/i2c/busses/i2c-qcom-geni.c
282
dm_tx_st = readl_relaxed(base + SE_DMA_TX_IRQ_STAT);
drivers/i2c/busses/i2c-qcom-geni.c
283
dm_rx_st = readl_relaxed(base + SE_DMA_RX_IRQ_STAT);
drivers/i2c/busses/i2c-qcom-geni.c
284
dma = readl_relaxed(base + SE_GENI_DMA_MODE_EN);
drivers/i2c/busses/i2c-qcom-geni.c
317
val = readl_relaxed(base + SE_GENI_RX_FIFOn);
drivers/i2c/busses/i2c-qcom-geni.c
394
val = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
drivers/i2c/busses/i2c-qcom-geni.c
409
val = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
drivers/i2c/busses/i2c-st.c
201
writel_relaxed(readl_relaxed(reg) | mask, reg);
drivers/i2c/busses/i2c-st.c
206
writel_relaxed(readl_relaxed(reg) & ~mask, reg);
drivers/i2c/busses/i2c-st.c
246
if (readl_relaxed(i2c_dev->base + SSC_STA) & SSC_STA_RIR)
drivers/i2c/busses/i2c-st.c
249
count = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT) &
drivers/i2c/busses/i2c-st.c
253
readl_relaxed(i2c_dev->base + SSC_RBUF);
drivers/i2c/busses/i2c-st.c
377
sta = readl_relaxed(i2c_dev->base + SSC_STA);
drivers/i2c/busses/i2c-st.c
420
sta = readl_relaxed(i2c_dev->base + SSC_STA);
drivers/i2c/busses/i2c-st.c
424
tx_fstat = readl_relaxed(i2c_dev->base + SSC_TX_FSTAT);
drivers/i2c/busses/i2c-st.c
446
sta = readl_relaxed(i2c_dev->base + SSC_STA);
drivers/i2c/busses/i2c-st.c
450
tx_fstat = readl_relaxed(i2c_dev->base + SSC_TX_FSTAT);
drivers/i2c/busses/i2c-st.c
464
sta = readl_relaxed(i2c_dev->base + SSC_STA);
drivers/i2c/busses/i2c-st.c
468
i = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT);
drivers/i2c/busses/i2c-st.c
473
rbuf = readl_relaxed(i2c_dev->base + SSC_RBUF) >> 1;
drivers/i2c/busses/i2c-st.c
531
readl_relaxed(i2c_dev->base + SSC_RBUF);
drivers/i2c/busses/i2c-st.c
566
ien = readl_relaxed(i2c_dev->base + SSC_IEN);
drivers/i2c/busses/i2c-st.c
567
sta = readl_relaxed(i2c_dev->base + SSC_STA);
drivers/i2c/busses/i2c-stm32f4.c
136
writel_relaxed(readl_relaxed(reg) | mask, reg);
drivers/i2c/busses/i2c-stm32f4.c
141
writel_relaxed(readl_relaxed(reg) & ~mask, reg);
drivers/i2c/busses/i2c-stm32f4.c
340
rbuf = readl_relaxed(i2c_dev->base + STM32F4_I2C_DR);
drivers/i2c/busses/i2c-stm32f4.c
492
readl_relaxed(i2c_dev->base + STM32F4_I2C_SR2);
drivers/i2c/busses/i2c-stm32f4.c
502
cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1);
drivers/i2c/busses/i2c-stm32f4.c
506
readl_relaxed(i2c_dev->base + STM32F4_I2C_SR2);
drivers/i2c/busses/i2c-stm32f4.c
522
cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1);
drivers/i2c/busses/i2c-stm32f4.c
527
readl_relaxed(i2c_dev->base + STM32F4_I2C_SR2);
drivers/i2c/busses/i2c-stm32f4.c
537
cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1);
drivers/i2c/busses/i2c-stm32f4.c
542
readl_relaxed(i2c_dev->base + STM32F4_I2C_SR2);
drivers/i2c/busses/i2c-stm32f4.c
559
cr2 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR2);
drivers/i2c/busses/i2c-stm32f4.c
566
status = readl_relaxed(i2c_dev->base + STM32F4_I2C_SR1);
drivers/i2c/busses/i2c-stm32f4.c
584
readl_relaxed(i2c_dev->base + STM32F4_I2C_SR2);
drivers/i2c/busses/i2c-stm32f4.c
631
status = readl_relaxed(i2c_dev->base + STM32F4_I2C_SR1);
drivers/i2c/busses/i2c-stm32f7.c
1147
cr2 = readl_relaxed(base + STM32F7_I2C_CR2);
drivers/i2c/busses/i2c-stm32f7.c
1148
cr1 = readl_relaxed(base + STM32F7_I2C_CR1);
drivers/i2c/busses/i2c-stm32f7.c
1229
internal_pec = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR);
drivers/i2c/busses/i2c-stm32f7.c
1339
isr = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
drivers/i2c/busses/i2c-stm32f7.c
1463
cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
drivers/i2c/busses/i2c-stm32f7.c
1570
status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
drivers/i2c/busses/i2c-stm32f7.c
1605
status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
drivers/i2c/busses/i2c-stm32f7.c
1678
status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
drivers/i2c/busses/i2c-stm32f7.c
1922
oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
drivers/i2c/busses/i2c-stm32f7.c
1937
oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2);
drivers/i2c/busses/i2c-stm32f7.c
2415
backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
drivers/i2c/busses/i2c-stm32f7.c
2416
backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
drivers/i2c/busses/i2c-stm32f7.c
2417
backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
drivers/i2c/busses/i2c-stm32f7.c
2418
backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2);
drivers/i2c/busses/i2c-stm32f7.c
2419
backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR);
drivers/i2c/busses/i2c-stm32f7.c
2437
cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
drivers/i2c/busses/i2c-stm32f7.c
436
writel_relaxed(readl_relaxed(reg) | mask, reg);
drivers/i2c/busses/i2c-stm32f7.c
441
writel_relaxed(readl_relaxed(reg) & ~mask, reg);
drivers/i2c/busses/i2c-stm32f7.c
811
cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
drivers/i2c/busses/i2c-stm32f7.c
841
cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
drivers/i2c/busses/i2c-stm32f7.c
889
cr1 = readl_relaxed(base + STM32F7_I2C_CR1);
drivers/i2c/busses/i2c-stm32f7.c
890
cr2 = readl_relaxed(base + STM32F7_I2C_CR2);
drivers/i2c/busses/i2c-stm32f7.c
984
cr2 = readl_relaxed(base + STM32F7_I2C_CR2);
drivers/i2c/busses/i2c-stm32f7.c
985
cr1 = readl_relaxed(base + STM32F7_I2C_CR1);
drivers/i2c/busses/i2c-tegra.c
504
return readl_relaxed(i2c_dev->base + reg);
drivers/i2c/busses/i2c-tegra.c
513
readl_relaxed(i2c_dev->base + reg);
drivers/i2c/busses/i2c-tegra.c
515
readl_relaxed(i2c_dev->base + i2c_dev->hw->regs->int_status);
drivers/i2c/busses/i2c-tegra.c
520
return readl_relaxed(i2c_dev->base + reg);
drivers/iio/adc/at91-sama5d2_adc.c
2457
readl_relaxed(st->base + st->soc_info.platform->layout->VERSION));
drivers/iio/adc/at91-sama5d2_adc.c
441
readl_relaxed((st)->base + (st)->soc_info.platform->layout->reg)
drivers/iio/adc/at91-sama5d2_adc.c
443
readl_relaxed((st)->base + reg)
drivers/iio/adc/at91_adc.c
139
(readl_relaxed(st->reg_base + reg))
drivers/iio/adc/ep93xx_adc.c
108
readl_relaxed(priv->base + EP93XX_ADC_RESULT);
drivers/iio/adc/ep93xx_adc.c
118
t = readl_relaxed(priv->base + EP93XX_ADC_RESULT);
drivers/iio/adc/imx8qxp-adc.c
275
readl_relaxed(adc->regs + IMX8QXP_ADR_ADC_RESFIFO));
drivers/iio/adc/rockchip_saradc.c
121
return readl_relaxed(info->regs + SARADC_DATA);
drivers/iio/adc/rockchip_saradc.c
133
return readl_relaxed(info->regs + offset);
drivers/iio/adc/stm32-adc-core.c
166
val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR);
drivers/iio/adc/stm32-adc-core.c
297
val = readl_relaxed(priv->common.base + STM32H7_ADC_CCR);
drivers/iio/adc/stm32-adc-core.c
348
ier = readl_relaxed(priv->common.base + offset + priv->cfg->regs->ier);
drivers/iio/adc/stm32-adc-core.c
362
status = readl_relaxed(priv->common.base + priv->cfg->regs->csr);
drivers/iio/adc/stm32-adc-core.c
592
priv->ccr_bak = readl_relaxed(priv->common.base + priv->cfg->regs->ccr);
drivers/iio/adc/stm32-adc-core.c
674
readl_relaxed(priv->common.base + STM32MP1_ADC_IPDR));
drivers/iio/adc/stm32-adc-core.c
689
val = readl_relaxed(priv->common.base + STM32MP1_ADC_HWCFGR0);
drivers/iio/adc/stm32-adc-core.c
696
val = readl_relaxed(priv->common.base + STM32MP1_ADC_VERR);
drivers/iio/adc/stm32-adc.c
602
return readl_relaxed(adc->common->base + adc->offset + reg);
drivers/iio/adc/stm32-adc.c
633
writel_relaxed(readl_relaxed(adc->common->base + reg) | bits,
drivers/iio/adc/stm32-adc.c
650
writel_relaxed(readl_relaxed(adc->common->base + reg) & ~bits,
drivers/input/keyboard/spear-keyboard.c
123
val = readl_relaxed(kbd->io_base + MODE_CTL_REG);
drivers/input/keyboard/spear-keyboard.c
136
val = readl_relaxed(kbd->io_base + MODE_CTL_REG);
drivers/input/keyboard/spear-keyboard.c
240
mode_ctl_reg = readl_relaxed(kbd->io_base + MODE_CTL_REG);
drivers/input/keyboard/spear-keyboard.c
74
sts = readl_relaxed(kbd->io_base + STATUS_REG);
drivers/input/keyboard/spear-keyboard.c
84
val = readl_relaxed(kbd->io_base + DATA_REG) &
drivers/input/serio/sa1111ps2.c
123
if (readl_relaxed(ps2if->base + PS2STAT) & PS2STAT_TXE) {
drivers/input/serio/sa1111ps2.c
198
if ((readl_relaxed(ps2if->base + PS2DATA) & 0xff) == 0xff)
drivers/input/serio/sa1111ps2.c
212
val = readl_relaxed(ps2if->base + PS2STAT);
drivers/input/serio/sa1111ps2.c
66
status = readl_relaxed(ps2if->base + PS2STAT);
drivers/input/serio/sa1111ps2.c
74
scancode = readl_relaxed(ps2if->base + PS2DATA) & 0xff;
drivers/input/serio/sa1111ps2.c
81
status = readl_relaxed(ps2if->base + PS2STAT);
drivers/input/serio/sa1111ps2.c
97
status = readl_relaxed(ps2if->base + PS2STAT);
drivers/interconnect/qcom/osm-l3.c
181
if (!(readl_relaxed(qp->base + REG_ENABLE) & 0x1)) {
drivers/interconnect/qcom/osm-l3.c
193
info = readl_relaxed(qp->base + desc->reg_freq_lut +
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
32
info->idr[i] = readl_relaxed(base_idr + i);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
33
info->iidr = readl_relaxed(master->smmu->base + ARM_SMMU_IIDR);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
34
info->aidr = readl_relaxed(master->smmu->base + ARM_SMMU_AIDR);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
2243
gerror = readl_relaxed(smmu->base + ARM_SMMU_GERROR);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
2244
gerrorn = readl_relaxed(smmu->base + ARM_SMMU_GERRORN);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
328
u32 cons = readl_relaxed(q->cons_reg);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
4749
reg = readl_relaxed(smmu->base + ARM_SMMU_CR0);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
4885
reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
4950
reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
5044
reg = readl_relaxed(smmu->base + ARM_SMMU_IDR1);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
5086
reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
5096
reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
561
WRITE_ONCE(cmdq->q.llq.cons, readl_relaxed(cmdq->q.cons_reg));
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
805
readl_relaxed(cmdq->q.prod_reg),
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
806
readl_relaxed(cmdq->q.cons_reg));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
1090
readl_relaxed(smmu->base + ARM_SMMU_IDR1));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
322
u32 gerror = readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, GERROR));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
339
vintf_map = (u64)readl_relaxed(reg_vintf_map + 0x4) << 32 |
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
340
(u64)readl_relaxed(reg_vintf_map);
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
344
readl_relaxed(REG_CMDQV(cmdqv, CMDQ_ERR_MAP(3))),
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
345
readl_relaxed(REG_CMDQV(cmdqv, CMDQ_ERR_MAP(2))),
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
346
readl_relaxed(REG_CMDQV(cmdqv, CMDQ_ERR_MAP(1))),
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
347
readl_relaxed(REG_CMDQV(cmdqv, CMDQ_ERR_MAP(0))));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
451
readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, GERRORN)),
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
452
readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, GERROR)),
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
453
readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, CONS)));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
462
gerrorn = readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, GERRORN));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
463
gerror = readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, GERROR));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
493
readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, GERRORN)),
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
494
readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, GERROR)),
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
495
readl_relaxed(REG_VCMDQ_PAGE0(vcmdq, CONS)));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
596
regval = readl_relaxed(REG_CMDQV(cmdqv, CONFIG));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
631
regval = readl_relaxed(smmu->base + ARM_SMMU_IDR1);
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
826
regval = readl_relaxed(REG_CMDQV(cmdqv, PARAM));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
943
regval = readl_relaxed(REG_CMDQV(cmdqv, PARAM));
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
33
return readl_relaxed(arm_smmu_page(smmu, page) + offset);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
116
val |= readl_relaxed(reg);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
143
val = readl_relaxed(reg);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
157
gfsr = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSR);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
161
gfsynr0 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR0);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
162
gfsynr1 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR1);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
163
gfsynr2 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR2);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
202
fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
206
fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0);
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
208
cbfrsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(idx));
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
60
return readl_relaxed(reg);
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
138
val = readl_relaxed(tbu->base + DEBUG_SID_HALT_REG);
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
166
val = readl_relaxed(tbu->base + DEBUG_SID_HALT_REG);
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
193
val = readl_relaxed(tbu->base + DEBUG_SID_HALT_REG);
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
231
val = readl_relaxed(tbu->base + DEBUG_SR_HALT_ACK_REG);
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
234
val = readl_relaxed(tbu->base + DEBUG_PAR_REG);
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
255
val = readl_relaxed(tbu->base + DEBUG_SID_HALT_REG);
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
337
readl_relaxed(tbu->base + DEBUG_SR_HALT_ACK_REG);
drivers/iommu/arm/arm-smmu/arm-smmu.h
488
return readl_relaxed(arm_smmu_page(smmu, page) + offset);
drivers/iommu/arm/arm-smmu/qcom_iommu.c
105
return readl_relaxed(ctx->base + reg);
drivers/iommu/mtk_iommu.c
1092
regval = readl_relaxed(bank0->base + REG_MMU_CTRL_REG);
drivers/iommu/mtk_iommu.c
1113
regval = readl_relaxed(bank0->base + REG_MMU_WR_LEN_CTRL);
drivers/iommu/mtk_iommu.c
1122
regval = readl_relaxed(bank0->base + REG_MMU_MISC_CTRL);
drivers/iommu/mtk_iommu.c
1497
reg->wr_len_ctrl = readl_relaxed(base + REG_MMU_WR_LEN_CTRL);
drivers/iommu/mtk_iommu.c
1498
reg->misc_ctrl = readl_relaxed(base + REG_MMU_MISC_CTRL);
drivers/iommu/mtk_iommu.c
1499
reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM_DIS);
drivers/iommu/mtk_iommu.c
1500
reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG);
drivers/iommu/mtk_iommu.c
1501
reg->vld_pa_rng = readl_relaxed(base + REG_MMU_VLD_PA_RNG);
drivers/iommu/mtk_iommu.c
1506
reg->int_control[i] = readl_relaxed(base + REG_MMU_INT_CONTROL0);
drivers/iommu/mtk_iommu.c
1507
reg->int_main_control[i] = readl_relaxed(base + REG_MMU_INT_MAIN_CONTROL);
drivers/iommu/mtk_iommu.c
1508
reg->ivrp_paddr[i] = readl_relaxed(base + REG_MMU_IVRP_PADDR);
drivers/iommu/mtk_iommu.c
483
int_state = readl_relaxed(base + REG_MMU_FAULT_ST1);
drivers/iommu/mtk_iommu.c
485
regval = readl_relaxed(base + REG_MMU0_INT_ID);
drivers/iommu/mtk_iommu.c
486
fault_iova = readl_relaxed(base + REG_MMU0_FAULT_VA);
drivers/iommu/mtk_iommu.c
487
fault_pa = readl_relaxed(base + REG_MMU0_INVLD_PA);
drivers/iommu/mtk_iommu.c
489
regval = readl_relaxed(base + REG_MMU1_INT_ID);
drivers/iommu/mtk_iommu.c
490
fault_iova = readl_relaxed(base + REG_MMU1_FAULT_VA);
drivers/iommu/mtk_iommu.c
491
fault_pa = readl_relaxed(base + REG_MMU1_INVLD_PA);
drivers/iommu/mtk_iommu.c
532
regval = readl_relaxed(base + REG_MMU_INT_CONTROL0);
drivers/iommu/mtk_iommu_v1.c
212
int_state = readl_relaxed(data->base + REG_MMU_FAULT_ST);
drivers/iommu/mtk_iommu_v1.c
213
fault_iova = readl_relaxed(data->base + REG_MMU_FAULT_VA);
drivers/iommu/mtk_iommu_v1.c
216
fault_pa = readl_relaxed(data->base + REG_MMU_INVLD_PA);
drivers/iommu/mtk_iommu_v1.c
217
regval = readl_relaxed(data->base + REG_MMU_INT_ID);
drivers/iommu/mtk_iommu_v1.c
233
regval = readl_relaxed(data->base + REG_MMU_INT_CONTROL);
drivers/iommu/mtk_iommu_v1.c
740
reg->standard_axi_mode = readl_relaxed(base +
drivers/iommu/mtk_iommu_v1.c
742
reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM);
drivers/iommu/mtk_iommu_v1.c
743
reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG);
drivers/iommu/mtk_iommu_v1.c
744
reg->int_control0 = readl_relaxed(base + REG_MMU_INT_CONTROL);
drivers/iommu/riscv/iommu.h
70
readl_relaxed((iommu)->reg + (addr))
drivers/iommu/riscv/iommu.h
86
readx_poll_timeout(readl_relaxed, (iommu)->reg + (addr), val, cond, \
drivers/iommu/sprd-iommu.c
100
return readl_relaxed(sdev->base + reg);
drivers/irqchip/exynos-combiner.c
211
readl_relaxed(combiner_data[i].base + COMBINER_ENABLE_SET);
drivers/irqchip/exynos-combiner.c
73
status = readl_relaxed(chip_data->base + COMBINER_INT_STATUS);
drivers/irqchip/irq-al-fic.c
109
pending = readl_relaxed(fic->base + AL_FIC_CAUSE);
drivers/irqchip/irq-al-fic.c
49
u32 control = readl_relaxed(fic->base + AL_FIC_CONTROL);
drivers/irqchip/irq-apple-aic.c
357
return readl_relaxed(ic->base + reg);
drivers/irqchip/irq-armada-370-xp.c
643
cause = readl_relaxed(mpic->per_cpu + MPIC_IN_DRBEL_CAUSE);
drivers/irqchip/irq-armada-370-xp.c
660
cause = readl_relaxed(mpic->per_cpu + MPIC_IN_DRBEL_CAUSE);
drivers/irqchip/irq-armada-370-xp.c
680
cause = readl_relaxed(mpic->per_cpu + MPIC_PPI_CAUSE);
drivers/irqchip/irq-armada-370-xp.c
684
irqsrc = readl_relaxed(mpic->base + MPIC_INT_SOURCE_CTL(i));
drivers/irqchip/irq-armada-370-xp.c
710
irqstat = readl_relaxed(mpic->per_cpu + MPIC_CPU_INTACK);
drivers/irqchip/irq-aspeed-vic.c
95
stat = readl_relaxed(vic->base + AVIC_IRQ_STATUS);
drivers/irqchip/irq-aspeed-vic.c
97
stat = readl_relaxed(vic->base + AVIC_IRQ_STATUS + 4);
drivers/irqchip/irq-bcm2835.c
165
reg = readl_relaxed(intc.enable[b]);
drivers/irqchip/irq-bcm2835.c
173
reg = readl_relaxed(base + REG_FIQ_CONTROL);
drivers/irqchip/irq-bcm2835.c
215
u32 stat = readl_relaxed(intc.pending[bank]);
drivers/irqchip/irq-bcm2835.c
227
u32 stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK;
drivers/irqchip/irq-bcm2836.c
145
stat = readl_relaxed(intc.base + LOCAL_IRQ_PENDING0 + 4 * cpu);
drivers/irqchip/irq-bcm2836.c
164
mbox_val = readl_relaxed(intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu);
drivers/irqchip/irq-clps711x.c
104
tmp = readl_relaxed(intmr);
drivers/irqchip/irq-clps711x.c
115
tmp = readl_relaxed(intmr);
drivers/irqchip/irq-csky-mpintc.c
66
tmp = readl_relaxed(TRIG_BASE(irq)) & TRIG_VAL_MSK(irq);
drivers/irqchip/irq-csky-mpintc.c
78
readl_relaxed(reg_base + INTCL_RDYIR));
drivers/irqchip/irq-davinci-cp-intc.c
45
return readl_relaxed(davinci_cp_intc_base + offset);
drivers/irqchip/irq-dw-apb-ictl.c
169
reg = readl_relaxed(iobase + APB_INT_ENABLE_H);
drivers/irqchip/irq-dw-apb-ictl.c
173
nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L));
drivers/irqchip/irq-dw-apb-ictl.c
40
u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L);
drivers/irqchip/irq-dw-apb-ictl.c
61
u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L);
drivers/irqchip/irq-gic-common.c
62
val = oldval = readl_relaxed(base + confoff);
drivers/irqchip/irq-gic-common.c
83
if (readl_relaxed(base + confoff) != val)
drivers/irqchip/irq-gic-v2m.c
324
typer = readl_relaxed(v2m->base + V2M_MSI_TYPER);
drivers/irqchip/irq-gic-v2m.c
349
switch (readl_relaxed(v2m->base + V2M_MSI_IIDR)) {
drivers/irqchip/irq-gic-v3-its.c
1106
ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block);
drivers/irqchip/irq-gic-v3-its.c
1183
rd_idx = readl_relaxed(its->base + GITS_CREADR);
drivers/irqchip/irq-gic-v3-its.c
1242
rd_idx = readl_relaxed(its->base + GITS_CREADR); \
drivers/irqchip/irq-gic-v3-its.c
1545
while (readl_relaxed(rdbase + GICR_SYNCR) & 1)
drivers/irqchip/irq-gic-v3-its.c
3082
val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR);
drivers/irqchip/irq-gic-v3-its.c
3163
val = readl_relaxed(rbase + GICR_CTLR);
drivers/irqchip/irq-gic-v3-its.c
3238
val = readl_relaxed(rbase + GICR_CTLR);
drivers/irqchip/irq-gic-v3-its.c
4433
status = readl_relaxed(base + GICR_VSGIPENDR);
drivers/irqchip/irq-gic-v3-its.c
4752
val = readl_relaxed(base + GITS_CTLR);
drivers/irqchip/irq-gic-v3-its.c
4767
val = readl_relaxed(base + GITS_CTLR);
drivers/irqchip/irq-gic-v3-its.c
4983
u32 iidr = readl_relaxed(its->base + GITS_IIDR);
drivers/irqchip/irq-gic-v3-its.c
5002
its->ctlr_save = readl_relaxed(base + GITS_CTLR);
drivers/irqchip/irq-gic-v3-its.c
5048
WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE);
drivers/irqchip/irq-gic-v3-its.c
5109
val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK;
drivers/irqchip/irq-gic-v3-its.c
5210
ctlr = readl_relaxed(its->base + GITS_CTLR);
drivers/irqchip/irq-gic-v3-its.c
5214
ctlr = readl_relaxed(its->base + GITS_CTLR);
drivers/irqchip/irq-gic-v3-its.c
5261
its->mpidr = readl_relaxed(its->base + GITS_MPIDR);
drivers/irqchip/irq-gic-v3-its.c
5315
ctlr = readl_relaxed(its->base + GITS_CTLR);
drivers/irqchip/irq-gic-v3-its.c
5359
val = readl_relaxed(rbase + GICR_CTLR);
drivers/irqchip/irq-gic-v3-its.c
5393
while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) {
drivers/irqchip/irq-gic-v3-its.c
5408
if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) {
drivers/irqchip/irq-gic-v3.c
1074
u32 ctlr = readl_relaxed(ptr + GICR_CTLR);
drivers/irqchip/irq-gic-v3.c
1270
!!(readl_relaxed(gic_data.dist_base + GICD_TYPER) & GICD_TYPER_LPIS) &&
drivers/irqchip/irq-gic-v3.c
162
return readl_relaxed(gic_data.dist_base + GICD_CTLR) & GICD_CTLR_DS;
drivers/irqchip/irq-gic-v3.c
179
val = readl_relaxed(gic_data.dist_base + GICD_CTLR);
drivers/irqchip/irq-gic-v3.c
2003
typer = readl_relaxed(gic_data.dist_base + GICD_TYPER);
drivers/irqchip/irq-gic-v3.c
2006
gic_enable_quirks(readl_relaxed(gic_data.dist_base + GICD_IIDR),
drivers/irqchip/irq-gic-v3.c
2017
gic_data.rdists.gicd_typer2 = readl_relaxed(gic_data.dist_base + GICD_TYPER2);
drivers/irqchip/irq-gic-v3.c
2077
u32 reg = readl_relaxed(dist_base + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK;
drivers/irqchip/irq-gic-v3.c
2327
u32 reg = readl_relaxed(acpi_data.dist_base + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK;
drivers/irqchip/irq-gic-v3.c
378
val = readl_relaxed(rbase + GICR_WAKER);
drivers/irqchip/irq-gic-v3.c
387
val = readl_relaxed(rbase + GICR_WAKER);
drivers/irqchip/irq-gic-v3.c
467
return !!(readl_relaxed(base + offset + (index / 32) * 4) & mask);
drivers/irqchip/irq-gic-v3.c
994
reg = readl_relaxed(ptr + GICR_PIDR2) & GIC_PIDR2_ARCH_MASK;
drivers/irqchip/irq-gic-v5-irs.c
32
return readl_relaxed(irs_data->irs_base + reg_offset);
drivers/irqchip/irq-gic-v5-its.c
49
return readl_relaxed(its_node->its_base + reg_offset);
drivers/irqchip/irq-gic-v5-iwb.c
25
return readl_relaxed(iwb_node->iwb_base + reg_offset);
drivers/irqchip/irq-gic.c
1011
val = readl_relaxed(dist_base + GIC_DIST_SGI_PENDING_SET + i);
drivers/irqchip/irq-gic.c
1204
gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f;
drivers/irqchip/irq-gic.c
190
return !!(readl_relaxed(gic_dist_base(d) + offset + (irqd_to_hwirq(d) / 32) * 4) & mask);
drivers/irqchip/irq-gic.c
341
irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
drivers/irqchip/irq-gic.c
384
status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK);
drivers/irqchip/irq-gic.c
421
mask = readl_relaxed(base + GIC_DIST_TARGET + i);
drivers/irqchip/irq-gic.c
436
u32 val = readl_relaxed(base + GIC_CPU_IDENT);
drivers/irqchip/irq-gic.c
567
readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);
drivers/irqchip/irq-gic.c
571
readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4);
drivers/irqchip/irq-gic.c
575
readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
drivers/irqchip/irq-gic.c
579
readl_relaxed(dist_base + GIC_DIST_ACTIVE_SET + i * 4);
drivers/irqchip/irq-gic.c
653
ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
drivers/irqchip/irq-gic.c
657
ptr[i] = readl_relaxed(dist_base + GIC_DIST_ACTIVE_SET + i * 4);
drivers/irqchip/irq-gic.c
661
ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);
drivers/irqchip/irq-gic.c
785
val = readl_relaxed(addr);
drivers/irqchip/irq-gic.c
988
val = readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4);
drivers/irqchip/irq-hip04.c
166
val = readl_relaxed(reg) & ~mask;
drivers/irqchip/irq-hip04.c
205
irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
drivers/irqchip/irq-hip04.c
234
mask = readl_relaxed(base + GIC_DIST_TARGET + i * 2);
drivers/irqchip/irq-hip04.c
377
nr_irqs = readl_relaxed(hip04_data.dist_base + GIC_DIST_CTR) & 0x1f;
drivers/irqchip/irq-imx-gpcv2.c
107
val = readl_relaxed(reg);
drivers/irqchip/irq-imx-gpcv2.c
123
val = readl_relaxed(reg);
drivers/irqchip/irq-imx-gpcv2.c
48
cd->saved_irq_mask[i] = readl_relaxed(reg);
drivers/irqchip/irq-imx-intmux.c
109
val = readl_relaxed(reg);
drivers/irqchip/irq-imx-intmux.c
193
irqstat = readl_relaxed(data->regs + CHANIPR(idx));
drivers/irqchip/irq-imx-intmux.c
315
irqchip_data->saved_reg = readl_relaxed(data->regs + CHANIER(i));
drivers/irqchip/irq-imx-intmux.c
90
val = readl_relaxed(reg);
drivers/irqchip/irq-imx-irqsteer.c
168
irqmap = readl_relaxed(data->regs +
drivers/irqchip/irq-imx-irqsteer.c
298
data->saved_reg[i] = readl_relaxed(data->regs +
drivers/irqchip/irq-imx-irqsteer.c
75
val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
drivers/irqchip/irq-imx-irqsteer.c
89
val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
drivers/irqchip/irq-lpc32xx.c
37
return readl_relaxed(ic->base + reg);
drivers/irqchip/irq-mbigen.c
138
val = readl_relaxed(base + addr);
drivers/irqchip/irq-mbigen.c
159
val = readl_relaxed(base);
drivers/irqchip/irq-mchp-eic.c
117
eic->scfg[hwirq] = readl_relaxed(eic->base +
drivers/irqchip/irq-mchp-eic.c
51
tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq));
drivers/irqchip/irq-mchp-eic.c
62
tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq));
drivers/irqchip/irq-mchp-eic.c
74
tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq));
drivers/irqchip/irq-meson-gpio.c
258
tmp = readl_relaxed(ctl->base + reg);
drivers/irqchip/irq-mmp.c
100
r = readl_relaxed(mmp_icu_base + (hwirq << 2));
drivers/irqchip/irq-mmp.c
110
r = readl_relaxed(mmp_icu2_base + (hwirq << 2));
drivers/irqchip/irq-mmp.c
115
r = readl_relaxed(data->reg_mask) | (1 << hwirq);
drivers/irqchip/irq-mmp.c
129
r = readl_relaxed(mmp_icu_base + (hwirq << 2));
drivers/irqchip/irq-mmp.c
134
r = readl_relaxed(data->reg_mask) & ~(1 << hwirq);
drivers/irqchip/irq-mmp.c
169
mask = readl_relaxed(data->reg_mask);
drivers/irqchip/irq-mmp.c
171
status = readl_relaxed(data->reg_status) & ~mask;
drivers/irqchip/irq-mmp.c
229
hwirq = readl_relaxed(mmp_icu_base + PJ1_INT_SEL);
drivers/irqchip/irq-mmp.c
240
hwirq = readl_relaxed(mmp_icu_base + PJ4_INT_SEL);
drivers/irqchip/irq-mmp.c
76
r = readl_relaxed(mmp_icu_base + (hwirq << 2));
drivers/irqchip/irq-mmp.c
86
r = readl_relaxed(data->reg_mask) | (1 << hwirq);
drivers/irqchip/irq-mtk-cirq.c
253
value = readl_relaxed(reg);
drivers/irqchip/irq-mtk-cirq.c
266
value = readl_relaxed(reg);
drivers/irqchip/irq-mtk-cirq.c
270
value = readl_relaxed(reg);
drivers/irqchip/irq-mtk-sysirq.c
41
value = readl_relaxed(base + reg_index * 4);
drivers/irqchip/irq-mvebu-icu.c
340
icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i));
drivers/irqchip/irq-mvebu-pic.c
109
irqmap = readl_relaxed(pic->base + PIC_CAUSE);
drivers/irqchip/irq-mvebu-sei.c
325
irqmap = readl_relaxed(sei->base + GICP_SECR(idx));
drivers/irqchip/irq-mvebu-sei.c
75
reg = readl_relaxed(sei->base + GICP_SEMR(reg_idx));
drivers/irqchip/irq-mvebu-sei.c
89
reg = readl_relaxed(sei->base + GICP_SEMR(reg_idx));
drivers/irqchip/irq-nvic.c
42
unsigned long icsr = readl_relaxed(BASEADDR_V7M_SCB + V7M_SCB_ICSR);
drivers/irqchip/irq-nvic.c
80
numbanks = (readl_relaxed(V7M_SCS_ICTR) &
drivers/irqchip/irq-omap-intc.c
79
return readl_relaxed(omap_irq_base + reg);
drivers/irqchip/irq-orion.c
113
u32 stat = readl_relaxed(gc->reg_base + ORION_BRIDGE_IRQ_CAUSE) &
drivers/irqchip/irq-orion.c
41
u32 stat = readl_relaxed(gc->reg_base + ORION_IRQ_CAUSE) &
drivers/irqchip/irq-owl-sirq.c
111
val = readl_relaxed(data->base + data->params->reg_offset[index]);
drivers/irqchip/irq-owl-sirq.c
98
val = readl_relaxed(data->base + data->params->reg_offset[index]);
drivers/irqchip/irq-pruss-intc.c
128
return readl_relaxed(intc->base + reg);
drivers/irqchip/irq-qcom-mpm.c
95
return readl_relaxed(priv->base + offset);
drivers/irqchip/irq-rda-intc.c
51
u32 stat = readl_relaxed(rda_intc_base + RDA_INTC_FINALSTATUS);
drivers/irqchip/irq-renesas-rzg2l.c
139
reg = readl_relaxed(priv->base + NSCR);
drivers/irqchip/irq-renesas-rzg2l.c
146
readl_relaxed(priv->base + NSCR);
drivers/irqchip/irq-renesas-rzg2l.c
156
iscr = readl_relaxed(priv->base + ISCR);
drivers/irqchip/irq-renesas-rzg2l.c
157
iitsr = readl_relaxed(priv->base + IITSR);
drivers/irqchip/irq-renesas-rzg2l.c
169
readl_relaxed(priv->base + ISCR);
drivers/irqchip/irq-renesas-rzg2l.c
178
reg = readl_relaxed(priv->base + TSCR);
drivers/irqchip/irq-renesas-rzg2l.c
185
readl_relaxed(priv->base + TSCR);
drivers/irqchip/irq-renesas-rzg2l.c
224
writel_relaxed(readl_relaxed(priv->base + IMSK) | bit, priv->base + IMSK);
drivers/irqchip/irq-renesas-rzg2l.c
232
writel_relaxed(readl_relaxed(priv->base + IMSK) & ~bit, priv->base + IMSK);
drivers/irqchip/irq-renesas-rzg2l.c
240
writel_relaxed(readl_relaxed(priv->base + TMSK) | bit, priv->base + TMSK);
drivers/irqchip/irq-renesas-rzg2l.c
248
writel_relaxed(readl_relaxed(priv->base + TMSK) & ~bit, priv->base + TMSK);
drivers/irqchip/irq-renesas-rzg2l.c
321
reg = readl_relaxed(priv->base + TSSR(tssr_index));
drivers/irqchip/irq-renesas-rzg2l.c
363
reg = readl_relaxed(priv->base + TSSR(tssr_index));
drivers/irqchip/irq-renesas-rzg2l.c
436
tmp = readl_relaxed(priv->base + IITSR);
drivers/irqchip/irq-renesas-rzg2l.c
496
tssr = readl_relaxed(priv->base + TSSR(tssr_index));
drivers/irqchip/irq-renesas-rzg2l.c
498
reg = readl_relaxed(priv->base + TITSR(index));
drivers/irqchip/irq-renesas-rzg2l.c
545
cache->nitsr = readl_relaxed(base + NITSR);
drivers/irqchip/irq-renesas-rzg2l.c
546
cache->iitsr = readl_relaxed(base + IITSR);
drivers/irqchip/irq-renesas-rzg2l.c
548
cache->inttsel = readl_relaxed(base + INTTSEL);
drivers/irqchip/irq-renesas-rzg2l.c
550
cache->titsr[i] = readl_relaxed(base + TITSR(i));
drivers/irqchip/irq-renesas-rzg2l.c
699
reg = readl_relaxed(priv->base + INTTSEL);
drivers/irqchip/irq-renesas-rzt2h.c
200
val = readl_relaxed(base + RZT2H_ICU_PORTNF_MD);
drivers/irqchip/irq-renesas-rzv2h.c
290
tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(k));
drivers/irqchip/irq-renesas-rzv2h.c
347
isctr = readl_relaxed(priv->base + ICU_ISCTR);
drivers/irqchip/irq-renesas-rzv2h.c
348
iitsr = readl_relaxed(priv->base + ICU_IITSR);
drivers/irqchip/irq-renesas-rzv2h.c
389
iitsr = readl_relaxed(priv->base + ICU_IITSR);
drivers/irqchip/irq-renesas-rzv2h.c
407
tsctr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSCTR);
drivers/irqchip/irq-renesas-rzv2h.c
408
titsr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(k));
drivers/irqchip/irq-renesas-rzv2h.c
472
tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(tssr_k));
drivers/irqchip/irq-renesas-rzv2h.c
473
titsr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(titsr_k));
drivers/irqchip/irq-renesas-rzv2h.c
554
cache->nitsr = readl_relaxed(base + ICU_NITSR);
drivers/irqchip/irq-renesas-rzv2h.c
555
cache->iitsr = readl_relaxed(base + ICU_IITSR);
drivers/irqchip/irq-renesas-rzv2h.c
557
cache->titsr[i] = readl_relaxed(base + rzv2h_icu_data->info->t_offs + ICU_TITSR(i));
drivers/irqchip/irq-sa11x0.c
139
icip = readl_relaxed(iobase + ICIP);
drivers/irqchip/irq-sa11x0.c
140
icmr = readl_relaxed(iobase + ICMR);
drivers/irqchip/irq-sa11x0.c
38
reg = readl_relaxed(iobase + ICMR);
drivers/irqchip/irq-sa11x0.c
47
reg = readl_relaxed(iobase + ICMR);
drivers/irqchip/irq-sa11x0.c
93
st->icmr = readl_relaxed(iobase + ICMR);
drivers/irqchip/irq-sa11x0.c
94
st->iclr = readl_relaxed(iobase + ICLR);
drivers/irqchip/irq-sa11x0.c
95
st->iccr = readl_relaxed(iobase + ICCR);
drivers/irqchip/irq-sifive-plic.c
418
pending_irqs = handler->enable_save[i] & readl_relaxed(pending + i);
drivers/irqchip/irq-sni-exiu.c
101
val = readl_relaxed(data->base + EILVL);
drivers/irqchip/irq-sni-exiu.c
108
val = readl_relaxed(data->base + EIEDG);
drivers/irqchip/irq-sni-exiu.c
68
val = readl_relaxed(data->base + EIMASK) | BIT(d->hwirq);
drivers/irqchip/irq-sni-exiu.c
78
val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq);
drivers/irqchip/irq-sni-exiu.c
91
val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq);
drivers/irqchip/irq-sp7021-intc.c
154
groups = readl_relaxed(REG_INTR_GROUP);
drivers/irqchip/irq-sp7021-intc.c
160
pending_irq = readl_relaxed(base + group * 4);
drivers/irqchip/irq-sp7021-intc.c
91
mask = readl_relaxed(reg);
drivers/irqchip/irq-stm32-exti.c
193
chip_data->rtsr_cache = readl_relaxed(base + stm32_bank->rtsr_ofst);
drivers/irqchip/irq-stm32-exti.c
194
chip_data->ftsr_cache = readl_relaxed(base + stm32_bank->ftsr_ofst);
drivers/irqchip/irq-stm32mp-exti.c
271
chip_data->rtsr_cache = readl_relaxed(base + bank->rtsr_ofst);
drivers/irqchip/irq-stm32mp-exti.c
272
chip_data->ftsr_cache = readl_relaxed(base + bank->ftsr_ofst);
drivers/irqchip/irq-stm32mp-exti.c
305
val = readl_relaxed(base + reg);
drivers/irqchip/irq-stm32mp-exti.c
318
val = readl_relaxed(base + reg);
drivers/irqchip/irq-stm32mp-exti.c
386
rtsr = readl_relaxed(base + bank->rtsr_ofst);
drivers/irqchip/irq-stm32mp-exti.c
387
ftsr = readl_relaxed(base + bank->ftsr_ofst);
drivers/irqchip/irq-stm32mp-exti.c
519
event_trg = readl_relaxed(host_data->base + chip_data->reg_bank->trg_ofst);
drivers/irqchip/irq-stm32mp-exti.c
580
chip_data->event_reserved = readl_relaxed(base + bank->seccfgr_ofst);
drivers/irqchip/irq-stm32mp-exti.c
599
hwcfgr1 = readl_relaxed(host_data->base + EXTI_HWCFGR1);
drivers/irqchip/irq-stm32mp-exti.c
606
cidcfgr = readl_relaxed(host_data->base + EXTI_EnCIDCFGR(event));
drivers/irqchip/irq-tegra.c
145
lic->cpu_ier[i] = readl_relaxed(ictlr + ICTLR_CPU_IER);
drivers/irqchip/irq-tegra.c
146
lic->cpu_iep[i] = readl_relaxed(ictlr + ICTLR_CPU_IEP_CLASS);
drivers/irqchip/irq-tegra.c
147
lic->cop_ier[i] = readl_relaxed(ictlr + ICTLR_COP_IER);
drivers/irqchip/irq-tegra.c
148
lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
drivers/irqchip/irq-uniphier-aidet.c
207
priv->saved_vals[i] = readl_relaxed(
drivers/irqchip/irq-uniphier-aidet.c
37
tmp = readl_relaxed(priv->reg_base + reg);
drivers/irqchip/irq-vic.c
212
while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
drivers/irqchip/irq-vic.c
229
while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
drivers/irqchip/irq-vt8500.c
168
unsigned long irqnr = readl_relaxed(intc->base) & 0x3F;
drivers/irqchip/irq-vt8500.c
176
stat = readl_relaxed(intc->base + VT8500_ICIS + 4);
drivers/irqchip/qcom-irq-combiner.c
60
bit = readl_relaxed(combiner->regs[reg].addr);
drivers/irqchip/qcom-pdc.c
78
return readl_relaxed(pdc_base + reg + i * sizeof(u32));
drivers/mailbox/arm_mhu.c
47
val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
drivers/mailbox/arm_mhu.c
61
u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
drivers/mailbox/arm_mhu.c
82
val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
drivers/mailbox/arm_mhu_db.c
102
bits = readl_relaxed(base + INTR_STAT_OFS);
drivers/mailbox/arm_mhu_db.c
142
if (readl_relaxed(base + INTR_STAT_OFS) & BIT(chan_info->doorbell))
drivers/mailbox/arm_mhuv2.c
1014
while (!readl_relaxed(&mhu->send->access_ready))
drivers/mailbox/arm_mhuv2.c
245
_regval = readl_relaxed((_regptr)); \
drivers/mailbox/arm_mhuv2.c
253
_regval = readl_relaxed(_regptr); \
drivers/mailbox/arm_mhuv2.c
293
return !(readl_relaxed(&mhu->send->ch_wn[priv->ch_wn_idx].stat) &
drivers/mailbox/arm_mhuv2.c
378
data[windows - 1 - i] = readl_relaxed(&mhu->recv->ch_wn[idx].stat);
drivers/mailbox/arm_mhuv2.c
415
return !readl_relaxed(&mhu->send->ch_wn[i].stat);
drivers/mailbox/arm_mhuv2.c
507
stat = readl_relaxed(reg + i);
drivers/mailbox/arm_mhuv2.c
584
stat = readl_relaxed(&mhu->send->ch_wn[priv->ch_wn_idx].stat);
drivers/mailbox/arm_mhuv2.c
639
stat = readl_relaxed(&mhu->recv->ch_wn[priv->ch_wn_idx].stat_masked);
drivers/mailbox/arm_mhuv2.c
654
stat = readl_relaxed(&mhu->recv->ch_wn[priv->ch_wn_idx].stat_masked);
drivers/mailbox/arm_mhuv3.c
208
_rval = readl_relaxed(_regptr); \
drivers/mailbox/arm_mhuv3.c
218
_rval = readl_relaxed(_rptr); \
drivers/mailbox/arm_mhuv3.c
427
done = !(readl_relaxed(&mhu->pbx->dbcw[priv->ch_idx].st) &
drivers/mailbox/arm_mhuv3.c
641
active_dbs = readl_relaxed(&mhu->pbx->dbcw[channel].st);
drivers/mailbox/arm_mhuv3.c
657
st = readl_relaxed(&mhu->mbx->dbcw[channel].st_msk);
drivers/mailbox/arm_mhuv3.c
683
cmb_st = readl_relaxed(&mhu->ctrl->dbch_int_st[i]);
drivers/mailbox/bcm-flexrm-mailbox.c
1010
read_offset = readl_relaxed(ring->regs + RING_BD_READ_PTR);
drivers/mailbox/bcm-flexrm-mailbox.c
1011
val = readl_relaxed(ring->regs + RING_BD_START_ADDR);
drivers/mailbox/bcm-flexrm-mailbox.c
1092
cmpl_write_offset = readl_relaxed(ring->regs + RING_CMPL_WRITE_PTR);
drivers/mailbox/bcm-flexrm-mailbox.c
1297
readl_relaxed(ring->regs + RING_BD_WRITE_PTR);
drivers/mailbox/bcm-flexrm-mailbox.c
1306
readl_relaxed(ring->regs + RING_CMPL_WRITE_PTR);
drivers/mailbox/bcm-flexrm-mailbox.c
1310
readl_relaxed(ring->regs + RING_NUM_REQ_RECV_LS);
drivers/mailbox/bcm-flexrm-mailbox.c
1311
readl_relaxed(ring->regs + RING_NUM_REQ_RECV_MS);
drivers/mailbox/bcm-flexrm-mailbox.c
1312
readl_relaxed(ring->regs + RING_NUM_REQ_TRANS_LS);
drivers/mailbox/bcm-flexrm-mailbox.c
1313
readl_relaxed(ring->regs + RING_NUM_REQ_TRANS_MS);
drivers/mailbox/bcm-flexrm-mailbox.c
1314
readl_relaxed(ring->regs + RING_NUM_REQ_OUTSTAND);
drivers/mailbox/bcm-flexrm-mailbox.c
1363
if (readl_relaxed(ring->regs + RING_FLUSH_DONE) &
drivers/mailbox/bcm-flexrm-mailbox.c
1376
if (!(readl_relaxed(ring->regs + RING_FLUSH_DONE) &
drivers/mailbox/bcm-flexrm-mailbox.c
1507
if (readl_relaxed(regs + RING_VER) == RING_VER_MAGIC)
drivers/mailbox/bcm-flexrm-mailbox.c
1530
(readl_relaxed(regs + RING_VER) != RING_VER_MAGIC))
drivers/mailbox/bcm-flexrm-mailbox.c
959
bd_read_offset = readl_relaxed(ring->regs + RING_BD_READ_PTR);
drivers/mailbox/bcm-flexrm-mailbox.c
960
val = readl_relaxed(ring->regs + RING_BD_START_ADDR);
drivers/mailbox/bcm74110-mailbox.c
127
return readl_relaxed(mbox->base + offset_base + off); \
drivers/mailbox/mailbox-altera.c
108
reg = readl_relaxed(mbox->mbox_base + MAILBOX_PTR_REG);
drivers/mailbox/mailbox-altera.c
124
readl_relaxed(mbox->mbox_base + MAILBOX_PTR_REG);
drivers/mailbox/mailbox-altera.c
126
readl_relaxed(mbox->mbox_base + MAILBOX_CMD_REG);
drivers/mailbox/mailbox-altera.c
64
status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG);
drivers/mailbox/mailbox-altera.c
72
status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG);
drivers/mailbox/mailbox-altera.c
80
mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG);
drivers/mailbox/mailbox-altera.c
92
mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG);
drivers/mailbox/mailbox-mpfs.c
107
val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
drivers/mailbox/mailbox-mpfs.c
141
val = readl_relaxed(mbox->mbox_base + msg->mbox_offset + index * 0x4);
drivers/mailbox/mailbox-mpfs.c
191
readl_relaxed(mbox->mbox_base
drivers/mailbox/mailbox-mpfs.c
84
status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
drivers/mailbox/mailbox-sti.c
167
bits = readl_relaxed(base + STI_IRQ_VAL_OFFSET);
drivers/mailbox/mailbox-sti.c
257
if (!(readl_relaxed(base + STI_ENA_VAL_OFFSET) & BIT(channel))) {
drivers/mailbox/mailbox-sti.c
263
if (readl_relaxed(base + STI_IRQ_VAL_OFFSET) & BIT(channel)) {
drivers/mailbox/pl320-ipc.c
60
data[i] = readl_relaxed(ipc_base + IPCMxDR(mbox, i));
drivers/mailbox/pl320-ipc.c
92
irq_stat = readl_relaxed(ipc_base + IPCMMIS(1));
drivers/mailbox/platform_mhu.c
52
val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
drivers/mailbox/platform_mhu.c
66
u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
drivers/mailbox/platform_mhu.c
87
val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
drivers/mailbox/rockchip-mailbox.c
111
u32 status = readl_relaxed(mb->mbox_base + MAILBOX_B2A_STATUS);
drivers/mailbox/stm32-ipcc.c
122
tosr = readl_relaxed(ipcc->reg_proc + IPCC_XTOYSR);
drivers/mailbox/stm32-ipcc.c
123
mr = readl_relaxed(ipcc->reg_proc + IPCC_XMR);
drivers/mailbox/stm32-ipcc.c
290
ipcc->n_chans = readl_relaxed(ipcc->reg_base + IPCC_HWCFGR);
drivers/mailbox/stm32-ipcc.c
314
ip_ver = readl_relaxed(ipcc->reg_base + IPCC_VER);
drivers/mailbox/stm32-ipcc.c
349
ipcc->xmr = readl_relaxed(ipcc->reg_proc + IPCC_XMR);
drivers/mailbox/stm32-ipcc.c
350
ipcc->xcr = readl_relaxed(ipcc->reg_proc + IPCC_XCR);
drivers/mailbox/stm32-ipcc.c
68
writel_relaxed(readl_relaxed(reg) | mask, reg);
drivers/mailbox/stm32-ipcc.c
78
writel_relaxed(readl_relaxed(reg) & ~mask, reg);
drivers/mailbox/stm32-ipcc.c
92
tosr = readl_relaxed(ipcc->reg_proc + proc_offset + IPCC_XTOYSR);
drivers/mailbox/stm32-ipcc.c
93
mr = readl_relaxed(ipcc->reg_proc + IPCC_XMR);
drivers/media/cec/platform/meson/ao-cec.c
229
writel_relaxed((readl_relaxed(addr) & ~(mask)) | (val), addr)
drivers/media/cec/platform/meson/ao-cec.c
235
while (readl_relaxed(ao_cec->base + CEC_RW_REG) & CEC_RW_BUS_BUSY) {
drivers/media/cec/platform/meson/ao-cec.c
267
readl_relaxed(ao_cec->base + CEC_RW_REG));
drivers/media/cec/platform/meson/ao-cec.c
374
u32 stat = readl_relaxed(ao_cec->base + CEC_INTR_STAT_REG);
drivers/media/cec/platform/meson/ao-cec.c
474
u32 stat = readl_relaxed(ao_cec->base + CEC_INTR_STAT_REG);
drivers/media/pci/hws/hws_irq.c
204
int_state = readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);
drivers/media/pci/hws/hws_irq.c
207
(void)readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);
drivers/media/pci/hws/hws_irq.c
211
int_state = readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);
drivers/media/pci/hws/hws_irq.c
232
readl_relaxed(pdx->bar0_base +
drivers/media/pci/hws/hws_irq.c
254
(void)readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);
drivers/media/pci/hws/hws_irq.c
258
int_state = readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);
drivers/media/pci/hws/hws_video.c
130
readl_relaxed(hws->bar0_base + HWS_HALF_SZ_OFF(ch));
drivers/media/platform/microchip/microchip-csi2dc.c
94
#define csi2dc_readl(st, reg) readl_relaxed((st)->base + (reg))
drivers/media/platform/nvidia/tegra-vde/vde.c
40
u32 value = readl_relaxed(base + offset);
drivers/media/platform/qcom/camss/camss-csid-340.c
174
val = readl_relaxed(csid->base + CSID_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-4-1.c
110
val = readl_relaxed(csid->base + CAMSS_CSID_CID_LUT_VC_n(vc));
drivers/media/platform/qcom/camss/camss-csid-4-1.c
146
value = readl_relaxed(csid->base + CAMSS_CSID_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-4-7.c
112
val = readl_relaxed(csid->base + CAMSS_CSID_CID_LUT_VC_n(vc));
drivers/media/platform/qcom/camss/camss-csid-4-7.c
165
value = readl_relaxed(csid->base + CAMSS_CSID_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-gen2.c
320
val = readl_relaxed(csid->base + CSID_RDI_CFG0(port));
drivers/media/platform/qcom/camss/camss-csid-gen2.c
364
val = readl_relaxed(csid->base + CSID_TOP_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-gen2.c
368
val = readl_relaxed(csid->base + CSID_CSI2_RX_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-gen2.c
374
val = readl_relaxed(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(i));
drivers/media/platform/qcom/camss/camss-csid.c
614
hw_version = readl_relaxed(csid->base + CSID_HW_VERSION);
drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c
170
u8 val = readl_relaxed(csiphy->base +
drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c
46
u8 hw_version = readl_relaxed(csiphy->base +
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
933
hw_version = readl_relaxed(csiphy->base +
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
936
hw_version |= readl_relaxed(csiphy->base +
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
939
hw_version |= readl_relaxed(csiphy->base +
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
942
hw_version |= readl_relaxed(csiphy->base +
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
972
u8 val = readl_relaxed(csiphy->base +
drivers/media/platform/qcom/camss/camss-csiphy.c
284
val = readl_relaxed(csiphy->base_clk_mux);
drivers/media/platform/qcom/camss/camss-ispif.c
167
value0 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(0));
drivers/media/platform/qcom/camss/camss-ispif.c
168
value1 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(0));
drivers/media/platform/qcom/camss/camss-ispif.c
169
value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0));
drivers/media/platform/qcom/camss/camss-ispif.c
170
value3 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(1));
drivers/media/platform/qcom/camss/camss-ispif.c
171
value4 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(1));
drivers/media/platform/qcom/camss/camss-ispif.c
172
value5 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(1));
drivers/media/platform/qcom/camss/camss-ispif.c
235
value0 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(0));
drivers/media/platform/qcom/camss/camss-ispif.c
236
value1 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(0));
drivers/media/platform/qcom/camss/camss-ispif.c
237
value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0));
drivers/media/platform/qcom/camss/camss-ispif.c
430
val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);
drivers/media/platform/qcom/camss/camss-ispif.c
438
val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
drivers/media/platform/qcom/camss/camss-ispif.c
446
val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);
drivers/media/platform/qcom/camss/camss-ispif.c
454
val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
drivers/media/platform/qcom/camss/camss-ispif.c
462
val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
drivers/media/platform/qcom/camss/camss-ispif.c
489
val = readl_relaxed(ispif->base +
drivers/media/platform/qcom/camss/camss-ispif.c
493
val = readl_relaxed(ispif->base +
drivers/media/platform/qcom/camss/camss-ispif.c
497
val = readl_relaxed(ispif->base +
drivers/media/platform/qcom/camss/camss-ispif.c
501
val = readl_relaxed(ispif->base +
drivers/media/platform/qcom/camss/camss-ispif.c
505
val = readl_relaxed(ispif->base +
drivers/media/platform/qcom/camss/camss-ispif.c
577
val = readl_relaxed(ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe));
drivers/media/platform/qcom/camss/camss-ispif.c
642
val = readl_relaxed(ispif->base + addr);
drivers/media/platform/qcom/camss/camss-ispif.c
665
val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));
drivers/media/platform/qcom/camss/camss-ispif.c
674
val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));
drivers/media/platform/qcom/camss/camss-ispif.c
683
val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));
drivers/media/platform/qcom/camss/camss-ispif.c
692
val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));
drivers/media/platform/qcom/camss/camss-ispif.c
701
val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_2(vfe));
drivers/media/platform/qcom/camss/camss-vfe-17x.c
179
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-17x.c
303
*status0 = readl_relaxed(vfe->base + VFE_IRQ_STATUS_0);
drivers/media/platform/qcom/camss/camss-vfe-17x.c
304
*status1 = readl_relaxed(vfe->base + VFE_IRQ_STATUS_1);
drivers/media/platform/qcom/camss/camss-vfe-17x.c
316
u32 violation = readl_relaxed(vfe->base + VFE_VIOLATION_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-17x.c
334
status0 = readl_relaxed(vfe->base + VFE_IRQ_STATUS_0);
drivers/media/platform/qcom/camss/camss-vfe-17x.c
335
status1 = readl_relaxed(vfe->base + VFE_IRQ_STATUS_1);
drivers/media/platform/qcom/camss/camss-vfe-17x.c
341
vfe_bus_status[i] = readl_relaxed(vfe->base + VFE_BUS_IRQ_STATUS(i));
drivers/media/platform/qcom/camss/camss-vfe-340.c
185
status = readl_relaxed(vfe->base + TFE_IRQ_STATUS_0);
drivers/media/platform/qcom/camss/camss-vfe-340.c
195
u32 bus_status = readl_relaxed(vfe->base + TFE_BUS_IRQ_STATUS_0);
drivers/media/platform/qcom/camss/camss-vfe-340.c
223
status = readl_relaxed(vfe->base + TFE_BUS_OVERFLOW_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
224
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
231
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
334
reg = readl_relaxed(vfe->base +
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
386
reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
868
*value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
869
*value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
880
u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
1084
*value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
1085
*value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
1097
u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
267
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
274
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
424
reg = readl_relaxed(vfe->base +
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
480
reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
1074
*value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
1075
*value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
1087
u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
250
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
257
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
397
reg = readl_relaxed(vfe->base +
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
452
reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS);
drivers/media/platform/qcom/camss/camss-vfe-480.c
192
status = readl_relaxed(vfe->base + VFE_IRQ_STATUS(0));
drivers/media/platform/qcom/camss/camss-vfe-480.c
200
u32 status = readl_relaxed(vfe->base + VFE_BUS_IRQ_STATUS(0));
drivers/media/platform/qcom/camss/camss-vfe.c
433
u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION);
drivers/media/platform/st/sti/hva/hva-hw.c
106
hva->sts_reg = readl_relaxed(hva->regs + HVA_HIF_FIFO_STS);
drivers/media/platform/st/sti/hva/hva-hw.c
107
hva->sfl_reg = readl_relaxed(hva->regs + HVA_HIF_REG_SFL);
drivers/media/platform/st/sti/hva/hva-hw.c
204
hva->sts_reg = readl_relaxed(hva->regs + HVA_HIF_FIFO_STS);
drivers/media/platform/st/sti/hva/hva-hw.c
205
hva->sfl_reg = readl_relaxed(hva->regs + HVA_HIF_REG_SFL);
drivers/media/platform/st/sti/hva/hva-hw.c
208
hva->lmi_err_reg = readl_relaxed(hva->regs + HVA_HIF_REG_LMI_ERR);
drivers/media/platform/st/sti/hva/hva-hw.c
209
hva->emi_err_reg = readl_relaxed(hva->regs + HVA_HIF_REG_EMI_ERR);
drivers/media/platform/st/sti/hva/hva-hw.c
210
hva->hec_mif_err_reg = readl_relaxed(hva->regs +
drivers/media/platform/st/sti/hva/hva-hw.c
278
version = readl_relaxed(hva->regs + HVA_HIF_REG_VERSION) &
drivers/media/platform/st/sti/hva/hva-hw.c
478
reg = readl_relaxed(hva->regs + HVA_HIF_REG_CLK_GATING);
drivers/media/platform/st/sti/hva/hva-hw.c
548
#reg, readl_relaxed(hva->regs + reg))
drivers/media/platform/st/stm32/dma2d/dma2d-hw.c
21
return readl_relaxed(base + reg);
drivers/media/platform/st/stm32/stm32-csi.c
558
writel_relaxed(STM32_CSI_PFCR_DLD | readl_relaxed(csidev->base + STM32_CSI_PFCR),
drivers/media/platform/st/stm32/stm32-csi.c
857
sr0 = readl_relaxed(csidev->base + STM32_CSI_SR0);
drivers/media/platform/st/stm32/stm32-csi.c
858
sr1 = readl_relaxed(csidev->base + STM32_CSI_SR1);
drivers/media/platform/st/stm32/stm32-dcmi.c
191
return readl_relaxed(base + reg);
drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-common.h
174
u32 val = readl_relaxed(base + reg);
drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-common.h
191
__reg_write(dev, base, reg, readl_relaxed(base + reg) | mask);
drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-common.h
198
__reg_write(dev, base, reg, readl_relaxed(base + reg) & ~mask);
drivers/media/rc/ir-hix5hd2.c
136
while (readl_relaxed(priv->base + IR_BUSY)) {
drivers/media/rc/ir-hix5hd2.c
192
irq_sr = readl_relaxed(priv->base + IR_INTS);
drivers/media/rc/ir-hix5hd2.c
200
symb_num = readl_relaxed(priv->base + IR_DATAH);
drivers/media/rc/ir-hix5hd2.c
202
readl_relaxed(priv->base + IR_DATAL);
drivers/media/rc/ir-hix5hd2.c
212
symb_num = readl_relaxed(priv->base + IR_DATAH);
drivers/media/rc/ir-hix5hd2.c
214
symb_val = readl_relaxed(priv->base + IR_DATAL);
drivers/memory/brcmstb_dpfe.c
323
val = readl_relaxed(priv->regs + REG_DCPU_RESET);
drivers/memory/brcmstb_dpfe.c
339
val = readl_relaxed(priv->regs + REG_DCPU_RESET);
drivers/memory/brcmstb_dpfe.c
358
val = readl_relaxed(regs + REG_DCPU_RESET);
drivers/memory/brcmstb_dpfe.c
363
val = readl_relaxed(regs + REG_DCPU_RESET);
drivers/memory/brcmstb_dpfe.c
451
resp = readl_relaxed(regs + REG_TO_HOST_MBOX);
drivers/memory/brcmstb_dpfe.c
479
resp = readl_relaxed(regs + REG_TO_HOST_MBOX);
drivers/memory/brcmstb_dpfe.c
491
result[i] = readl_relaxed(regs + DCPU_MSG_RAM(i));
drivers/memory/brcmstb_dpfe.c
587
sum += readl_relaxed(dmem + i);
drivers/memory/brcmstb_dpfe.c
590
sum += readl_relaxed(imem + i);
drivers/memory/brcmstb_dpfe.c
754
mr4 = (readl_relaxed(info + DRAM_INFO_MR4) >> DRAM_INFO_MR4_SHIFT) &
drivers/memory/brcmstb_dpfe.c
764
readl_relaxed(info + DRAM_INFO_INTERVAL),
drivers/memory/brcmstb_dpfe.c
766
readl_relaxed(info + DRAM_INFO_ERROR));
drivers/memory/brcmstb_dpfe.c
813
mr5 = (readl_relaxed(info + DRAM_VENDOR_MR5) >> DRAM_VENDOR_SHIFT) &
drivers/memory/brcmstb_dpfe.c
815
mr6 = (readl_relaxed(info + DRAM_VENDOR_MR6) >> DRAM_VENDOR_SHIFT) &
drivers/memory/brcmstb_dpfe.c
817
mr7 = (readl_relaxed(info + DRAM_VENDOR_MR7) >> DRAM_VENDOR_SHIFT) &
drivers/memory/brcmstb_dpfe.c
819
mr8 = (readl_relaxed(info + DRAM_VENDOR_MR8) >> DRAM_VENDOR_SHIFT) &
drivers/memory/brcmstb_dpfe.c
821
err = readl_relaxed(info + DRAM_VENDOR_ERROR) & DRAM_VENDOR_MASK;
drivers/memory/brcmstb_memc.c
212
val = readl_relaxed(cfg);
drivers/memory/brcmstb_memc.c
216
(void)readl_relaxed(cfg);
drivers/memory/brcmstb_memc.c
43
reg = readl_relaxed(config) & CNTRLR_CONFIG_MASK;
drivers/memory/brcmstb_memc.c
67
(void)readl_relaxed(cfg);
drivers/memory/mtk-smi.c
251
reg = readl_relaxed(larb->base + SMI_LARB_CMD_THRT_CON);
drivers/memory/mtk-smi.c
278
reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
drivers/memory/omap-gpmc.c
275
return readl_relaxed(gpmc_base + idx);
drivers/memory/omap-gpmc.c
291
return readl_relaxed(reg_addr);
drivers/memory/samsung/exynos-srom.c
90
bw = readl_relaxed(srom->reg_base + EXYNOS_SROM_BW);
drivers/memory/stm32_omm.c
233
omm->cr = readl_relaxed(omm->io_base + OMM_CR);
drivers/memory/tegra/mc.h
177
return readl_relaxed(mc->bcast_ch_regs + offset);
drivers/memory/tegra/mc.h
179
return readl_relaxed(mc->ch_regs[ch] + offset);
drivers/memory/tegra/mc.h
196
return readl_relaxed(mc->regs + offset);
drivers/memory/tegra/tegra114-emc.c
422
status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask;
drivers/memory/tegra/tegra114-emc.c
779
emc_cfg = readl_relaxed(emc->regs + EMC_CFG_2);
drivers/memory/tegra/tegra114-emc.c
797
emc_dbg = readl_relaxed(emc->regs + EMC_DBG);
drivers/memory/tegra/tegra20-emc.c
1034
stat->busy_time = readl_relaxed(emc->regs + EMC_STAT_PWR_COUNT);
drivers/memory/tegra/tegra20-emc.c
1035
stat->total_time = readl_relaxed(emc->regs + EMC_STAT_PWR_CLOCKS);
drivers/memory/tegra/tegra20-emc.c
223
status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask;
drivers/memory/tegra/tegra20-emc.c
276
readl_relaxed(emc->regs + emc_timing_registers[i - 1]);
drivers/memory/tegra/tegra20-emc.c
547
val = readl_relaxed(emc->regs + EMC_MRR);
drivers/memory/tegra/tegra20-emc.c
584
emc_cfg = readl_relaxed(emc->regs + EMC_CFG_2);
drivers/memory/tegra/tegra20-emc.c
606
emc_dbg = readl_relaxed(emc->regs + EMC_DBG);
drivers/memory/tegra/tegra20-emc.c
613
emc_fbio = readl_relaxed(emc->regs + EMC_FBIO_CFG5);
drivers/memory/tegra/tegra20-emc.c
637
emc_adr_cfg = readl_relaxed(emc->regs + EMC_ADR_CFG_0);
drivers/memory/tegra/tegra210-emc.h
951
return readl_relaxed(emc->regs + offset);
drivers/memory/tegra/tegra210-emc.h
964
return readl_relaxed(emc->channel[channel] + offset);
drivers/memory/tegra/tegra30-emc.c
1069
val = readl_relaxed(emc->regs + EMC_MRR);
drivers/memory/tegra/tegra30-emc.c
1107
fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5);
drivers/memory/tegra/tegra30-emc.c
1110
emc_cfg = readl_relaxed(emc->regs + EMC_CFG_2);
drivers/memory/tegra/tegra30-emc.c
1135
emc_dbg = readl_relaxed(emc->regs + EMC_DBG);
drivers/memory/tegra/tegra30-emc.c
1157
emc_adr_cfg = readl_relaxed(emc->regs + EMC_ADR_CFG);
drivers/memory/tegra/tegra30-emc.c
405
status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask;
drivers/memory/tegra/tegra30-emc.c
448
val = readl_relaxed(emc->regs + EMC_XM2DQSPADCTRL2);
drivers/memory/tegra/tegra30-emc.c
459
val = readl_relaxed(emc->regs + EMC_XM2DQSPADCTRL3);
drivers/memory/tegra/tegra30-emc.c
470
val = readl_relaxed(emc->regs + EMC_XM2QUSEPADCTRL);
drivers/memory/tegra/tegra30-emc.c
537
emc->emc_cfg = readl_relaxed(emc->regs + EMC_CFG);
drivers/memory/tegra/tegra30-emc.c
538
emc_dbg = readl_relaxed(emc->regs + EMC_DBG);
drivers/memory/tegra/tegra30-emc.c
549
if (timing->data[80] && !readl_relaxed(emc->regs + EMC_ZCAL_INTERVAL))
drivers/memory/tegra/tegra30-emc.c
554
fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5);
drivers/memory/tegra/tegra30-emc.c
599
val = readl_relaxed(emc->regs + EMC_XM2COMPPADCTRL);
drivers/memory/tegra/tegra30-emc.c
649
val = readl_relaxed(emc->regs + EMC_SEL_DPD_CTRL);
drivers/message/fusion/mptbase.c
219
#define CHIPREG_READ32(addr) readl_relaxed(addr)
drivers/mfd/mcp-sa11x0.c
112
if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
drivers/mfd/mcp-sa11x0.c
113
ret = readl_relaxed(MCDR2(m)) & 0xffff;
drivers/mfd/mcp-sa11x0.c
85
if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
drivers/mfd/omap-usb-host.c
117
return readl_relaxed(base + reg);
drivers/mfd/omap-usb-tll.c
120
return readl_relaxed(base + reg);
drivers/mfd/qcom_rpm.c
501
ack = readl_relaxed(RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
drivers/misc/bcm-vk/bcm_vk_msg.c
1125
msgq_size = readl_relaxed(&msgq->size);
drivers/misc/bcm-vk/bcm_vk_msg.c
469
msgq_start = readl_relaxed(&msgq->start);
drivers/misc/bcm-vk/bcm_vk_msg.c
470
msgq_size = readl_relaxed(&msgq->size);
drivers/misc/bcm-vk/bcm_vk_msg.c
471
msgq_nxt = readl_relaxed(&msgq->nxt);
drivers/misc/bcm-vk/bcm_vk_msg.c
472
msgq_db_offset = readl_relaxed(&msgq->db_offset);
drivers/misc/bcm-vk/bcm_vk_msg.c
487
readl_relaxed(&msgq->rd_idx),
drivers/misc/bcm-vk/bcm_vk_msg.c
488
readl_relaxed(&msgq->wr_idx),
drivers/misc/bcm-vk/bcm_vk_msg.c
642
wr_idx = readl_relaxed(&msgq->wr_idx);
drivers/misc/bcm-vk/bcm_vk_msg.c
667
readl_relaxed(&msgq->num),
drivers/misc/bcm-vk/bcm_vk_msg.c
668
readl_relaxed(&msgq->rd_idx),
drivers/misc/bcm-vk/bcm_vk_msg.c
673
readl_relaxed(&msgq->size));
drivers/misc/bcm-vk/bcm_vk_msg.c
807
rd_idx = readl_relaxed(&msgq->rd_idx);
drivers/misc/bcm-vk/bcm_vk_msg.c
808
wr_idx = readl_relaxed(&msgq->wr_idx);
drivers/misc/bcm-vk/bcm_vk_msg.c
865
readl_relaxed(&msgq->num),
drivers/misc/bcm-vk/bcm_vk_msg.c
871
readl_relaxed(&msgq->size));
drivers/misc/bcm-vk/bcm_vk_msg.c
92
wr_idx = readl_relaxed(&msgq->wr_idx);
drivers/misc/bcm-vk/bcm_vk_msg.c
93
rd_idx = readl_relaxed(&msgq->rd_idx);
drivers/misc/pci_endpoint_test.c
403
val = readl_relaxed(test->bar[barno] + j);
drivers/mmc/host/cqhci.h
313
return readl_relaxed(host->mmio + reg);
drivers/mmc/host/dw_mmc.h
491
readl_relaxed((dev)->regs + SDMMC_##reg)
drivers/mmc/host/mmci.c
1772
u32 mask = readl_relaxed(base + MMCIMASK0);
drivers/mmc/host/mmci_qcom_dml.c
61
config = readl_relaxed(base + DML_CONFIG);
drivers/mmc/host/mmci_qcom_dml.c
73
config = readl_relaxed(base + DML_CONFIG);
drivers/mmc/host/mmci_qcom_dml.c
81
config = readl_relaxed(base + DML_CONFIG);
drivers/mmc/host/mmci_qcom_dml.c
86
config = readl_relaxed(base + DML_CONFIG);
drivers/mmc/host/mmci_stm32_sdmmc.c
444
mask = readl_relaxed(base + MMCIMASK0);
drivers/mmc/host/mmci_stm32_sdmmc.c
445
sdmmc_status = readl_relaxed(base + MMCISTATUS);
drivers/mmc/host/mmci_stm32_sdmmc.c
541
cr = readl_relaxed(dlyb->base + SYSCFG_DLYBSD_CR);
drivers/mmc/host/mmci_stm32_sdmmc.c
557
cr = readl_relaxed(dlyb->base + SYSCFG_DLYBSD_CR);
drivers/mmc/host/mmci_stm32_sdmmc.c
731
host->pwr_reg = readl_relaxed(host->base + MMCIPOWER);
drivers/mmc/host/mtk-sd.c
858
dma_ctrl = readl_relaxed(host->base + MSDC_DMA_CTRL);
drivers/mmc/host/sdhci-msm.c
1010
ret = readl_relaxed(host->ioaddr + CORE_CSR_CDC_STATUS0)
drivers/mmc/host/sdhci-msm.c
1019
config = readl_relaxed(host->ioaddr + msm_offset->core_ddr_200_cfg);
drivers/mmc/host/sdhci-msm.c
1054
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
1061
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config_2);
drivers/mmc/host/sdhci-msm.c
1086
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
1130
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
1196
u32 config, oldconfig = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
1243
config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec);
drivers/mmc/host/sdhci-msm.c
1404
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
1410
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
1796
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
2410
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
2505
readl_relaxed(host->ioaddr + msm_offset->core_dll_status),
drivers/mmc/host/sdhci-msm.c
2506
readl_relaxed(host->ioaddr + msm_offset->core_dll_config),
drivers/mmc/host/sdhci-msm.c
2507
readl_relaxed(host->ioaddr + msm_offset->core_dll_config_2));
drivers/mmc/host/sdhci-msm.c
2510
readl_relaxed(host->ioaddr + msm_offset->core_dll_config_3),
drivers/mmc/host/sdhci-msm.c
2511
readl_relaxed(host->ioaddr + msm_offset->core_dll_usr_ctl),
drivers/mmc/host/sdhci-msm.c
2512
readl_relaxed(host->ioaddr + msm_offset->core_ddr_config));
drivers/mmc/host/sdhci-msm.c
2515
readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec),
drivers/mmc/host/sdhci-msm.c
2516
readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
2518
readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3));
drivers/mmc/host/sdhci-msm.c
2821
config = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES);
drivers/mmc/host/sdhci-msm.c
2919
int dead = (readl_relaxed(host->ioaddr + SDHCI_INT_STATUS) ==
drivers/mmc/host/sdhci-msm.c
335
return readl_relaxed(msm_host->core_mem + offset);
drivers/mmc/host/sdhci-msm.c
341
return readl_relaxed(host->ioaddr + offset);
drivers/mmc/host/sdhci-msm.c
427
ck_out_en = !!(readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
438
ck_out_en = !!(readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
463
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
drivers/mmc/host/sdhci-msm.c
477
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
drivers/mmc/host/sdhci-msm.c
482
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
drivers/mmc/host/sdhci-msm.c
491
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
drivers/mmc/host/sdhci-msm.c
641
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
drivers/mmc/host/sdhci-msm.c
669
config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec);
drivers/mmc/host/sdhci-msm.c
678
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
684
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
691
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
697
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
710
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
720
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
731
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
737
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
746
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
763
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
774
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
780
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
787
while (!(readl_relaxed(host->ioaddr + msm_offset->core_dll_status) &
drivers/mmc/host/sdhci-msm.c
812
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
819
config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec);
drivers/mmc/host/sdhci-msm.c
831
config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec);
drivers/mmc/host/sdhci-msm.c
854
config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec);
drivers/mmc/host/sdhci-msm.c
865
config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-msm.c
949
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
drivers/mmc/host/sdhci-msm.c
953
config = readl_relaxed(host->ioaddr + msm_offset->core_ddr_200_cfg);
drivers/mmc/host/sdhci-msm.c
957
config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_GEN_CFG);
drivers/mmc/host/sdhci-msm.c
961
config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_GEN_CFG);
drivers/mmc/host/sdhci-msm.c
965
config = readl_relaxed(host->ioaddr + msm_offset->core_ddr_200_cfg);
drivers/mmc/host/sdhci-msm.c
983
config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);
drivers/mmc/host/sdhci-msm.c
987
config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);
drivers/mmc/host/sdhci-msm.c
991
config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);
drivers/mmc/host/sdhci-msm.c
995
config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_CAL_TIMER_CFG0);
drivers/mmc/host/sdhci-sprd.c
133
return readl_relaxed(host->ioaddr + reg);
drivers/mmc/host/sdhci-st.c
313
ret = readl_relaxed(host->ioaddr + reg);
drivers/mmc/host/sdhci-st.c
318
ret = readl_relaxed(host->ioaddr + reg);
drivers/mtd/nand/raw/arasan-nand-controller.c
265
readl_relaxed(nfc->base + READY_STS_REG));
drivers/mtd/nand/raw/arasan-nand-controller.c
712
remainder = readl_relaxed(nfc->base + DATA_PORT_REG);
drivers/mtd/nand/raw/arasan-nand-controller.c
827
tmp = readl_relaxed(nfc->base + FLASH_STS_REG);
drivers/mtd/nand/raw/atmel/pmecc.c
430
value = readl_relaxed(user->pmecc->regs.base +
drivers/mtd/nand/raw/atmel/pmecc.c
708
errpos = readl_relaxed(pmecc->regs.errloc +
drivers/mtd/nand/raw/atmel/pmecc.c
818
user->isr = readl_relaxed(pmecc->regs.base + ATMEL_PMECC_ISR);
drivers/mtd/nand/raw/brcmnand/brcmnand.h
64
return readl_relaxed(addr);
drivers/mtd/nand/raw/cadence-nand-controller.c
1133
reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_3);
drivers/mtd/nand/raw/cadence-nand-controller.c
1141
reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_0);
drivers/mtd/nand/raw/cadence-nand-controller.c
1147
reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_1);
drivers/mtd/nand/raw/cadence-nand-controller.c
1153
reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_2);
drivers/mtd/nand/raw/cadence-nand-controller.c
1219
reg = readl_relaxed(cdns_ctrl->reg + CTRL_VERSION);
drivers/mtd/nand/raw/cadence-nand-controller.c
1308
reg = readl_relaxed(cdns_ctrl->reg + CONTROL_DATA_CTRL);
drivers/mtd/nand/raw/cadence-nand-controller.c
2835
reg = readl_relaxed(cdns_ctrl->reg + DLL_PHY_CTRL);
drivers/mtd/nand/raw/cadence-nand-controller.c
640
reg = readl_relaxed(cdns_ctrl->reg + ECC_CONFIG_0);
drivers/mtd/nand/raw/cadence-nand-controller.c
660
reg = readl_relaxed(cdns_ctrl->reg + ECC_CONFIG_0);
drivers/mtd/nand/raw/cadence-nand-controller.c
693
reg = readl_relaxed(cdns_ctrl->reg + SKIP_BYTES_CONF);
drivers/mtd/nand/raw/cadence-nand-controller.c
720
reg = readl_relaxed(cdns_ctrl->reg + SKIP_BYTES_CONF);
drivers/mtd/nand/raw/cadence-nand-controller.c
740
reg = readl_relaxed(cdns_ctrl->reg + ECC_CONFIG_0);
drivers/mtd/nand/raw/cadence-nand-controller.c
761
reg = readl_relaxed(cdns_ctrl->reg + COMMON_SET);
drivers/mtd/nand/raw/cadence-nand-controller.c
787
irq_status->status = readl_relaxed(cdns_ctrl->reg + INTR_STATUS);
drivers/mtd/nand/raw/cadence-nand-controller.c
788
irq_status->trd_status = readl_relaxed(cdns_ctrl->reg
drivers/mtd/nand/raw/cadence-nand-controller.c
790
irq_status->trd_error = readl_relaxed(cdns_ctrl->reg
drivers/mtd/nand/raw/cadence-nand-controller.c
932
*out_sdma_size = readl_relaxed(cdns_ctrl->reg + SDMA_SIZE);
drivers/mtd/nand/raw/cadence-nand-controller.c
933
*out_sdma_trd = readl_relaxed(cdns_ctrl->reg + SDMA_TRD_NUM);
drivers/mtd/nand/raw/cadence-nand-controller.c
949
reg = readl_relaxed(cdns_ctrl->reg + CTRL_FEATURES);
drivers/mtd/nand/raw/fsmc_nand.c
399
if (readl_relaxed(host->regs_va + STS) & FSMC_CODE_RDY)
drivers/mtd/nand/raw/fsmc_nand.c
410
ecc_tmp = readl_relaxed(host->regs_va + ECC1);
drivers/mtd/nand/raw/fsmc_nand.c
416
ecc_tmp = readl_relaxed(host->regs_va + ECC2);
drivers/mtd/nand/raw/fsmc_nand.c
422
ecc_tmp = readl_relaxed(host->regs_va + ECC3);
drivers/mtd/nand/raw/fsmc_nand.c
428
ecc_tmp = readl_relaxed(host->regs_va + STS);
drivers/mtd/nand/raw/fsmc_nand.c
445
ecc_tmp = readl_relaxed(host->regs_va + ECC1);
drivers/mtd/nand/raw/fsmc_nand.c
595
p[i] = readl_relaxed(host->data_va);
drivers/mtd/nand/raw/fsmc_nand.c
789
num_err = (readl_relaxed(host->regs_va + STS) >> 10) & 0xF;
drivers/mtd/nand/raw/fsmc_nand.c
832
ecc1 = readl_relaxed(host->regs_va + ECC1);
drivers/mtd/nand/raw/fsmc_nand.c
833
ecc2 = readl_relaxed(host->regs_va + ECC2);
drivers/mtd/nand/raw/fsmc_nand.c
834
ecc3 = readl_relaxed(host->regs_va + ECC3);
drivers/mtd/nand/raw/fsmc_nand.c
835
ecc4 = readl_relaxed(host->regs_va + STS);
drivers/mtd/nand/raw/ingenic/jz4725b_bch.c
139
*dest32++ = readl_relaxed(bch->base + BCH_BHPAR0 + offset);
drivers/mtd/nand/raw/ingenic/jz4725b_bch.c
144
val = readl_relaxed(bch->base + BCH_BHPAR0 + offset);
drivers/mtd/nand/raw/marvell_nand.c
1003
ndsr = readl_relaxed(nfc->regs + NDSR);
drivers/mtd/nand/raw/marvell_nand.c
2732
marvell_nand->ndtr0 = readl_relaxed(nfc->regs + NDTR0);
drivers/mtd/nand/raw/marvell_nand.c
2733
marvell_nand->ndtr1 = readl_relaxed(nfc->regs + NDTR1);
drivers/mtd/nand/raw/marvell_nand.c
524
reg = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/marvell_nand.c
533
reg = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/marvell_nand.c
541
reg = readl_relaxed(nfc->regs + NDSR);
drivers/mtd/nand/raw/marvell_nand.c
562
ndcr = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/marvell_nand.c
623
ndcr = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/marvell_nand.c
650
(u32)readl_relaxed(nfc->regs + NDCR), nfc_op->ndcb[0],
drivers/mtd/nand/raw/marvell_nand.c
692
if (nfc->use_dma && (readl_relaxed(nfc->regs + NDCR) & NDCR_DMA_EN))
drivers/mtd/nand/raw/marvell_nand.c
716
st = readl_relaxed(nfc->regs + NDSR);
drivers/mtd/nand/raw/marvell_nand.c
777
ndcr_generic = readl_relaxed(nfc->regs + NDCR) &
drivers/mtd/nand/raw/marvell_nand.c
797
u32 st = readl_relaxed(nfc->regs + NDSR);
drivers/mtd/nand/raw/marvell_nand.c
798
u32 ien = (~readl_relaxed(nfc->regs + NDCR)) & NDCR_ALL_INT;
drivers/mtd/nand/raw/marvell_nand.c
822
u32 ndcr = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/marvell_nand.c
839
u32 ndcr = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/marvell_nand.c
853
reg = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/marvell_nand.c
861
reg = readl_relaxed(nfc->regs + NDCR);
drivers/mtd/nand/raw/mtk_nand.c
245
return readl_relaxed(nfc->regs + reg);
drivers/mtd/nand/raw/renesas-nand-controller.c
263
control = readl_relaxed(rnandc->regs + CONTROL_REG);
drivers/mtd/nand/raw/renesas-nand-controller.c
272
control = readl_relaxed(rnandc->regs + CONTROL_REG);
drivers/mtd/nand/raw/renesas-nand-controller.c
447
ecc_stat = readl_relaxed(rnandc->regs + ECC_STAT_REG);
drivers/mtd/nand/raw/renesas-nand-controller.c
476
bf = ECC_CNT(cs, readl_relaxed(rnandc->regs + ECC_CNT_REG));
drivers/mtd/nand/raw/renesas-nand-controller.c
543
ecc_stat = readl_relaxed(rnandc->regs + ECC_STAT_REG);
drivers/mtd/nand/raw/renesas-nand-controller.c
570
bf = ECC_CNT(cs, readl_relaxed(rnandc->regs + ECC_CNT_REG));
drivers/mtd/nand/raw/renesas-nand-controller.c
861
last_bytes = readl_relaxed(rnandc->regs + FIFO_DATA_REG);
drivers/mtd/nand/raw/rockchip-nand-controller.c
271
val = readl_relaxed(nfc->regs + NFC_FMCTL);
drivers/mtd/nand/raw/rockchip-nand-controller.c
280
val = readl_relaxed(nfc->regs + NFC_FMCTL);
drivers/mtd/nand/raw/rockchip-nand-controller.c
480
bch_reg = readl_relaxed(nfc->regs + nfc->cfg->bchctl_off);
drivers/mtd/nand/raw/rockchip-nand-controller.c
850
bch_st = readl_relaxed(nfc->regs +
drivers/mtd/nand/raw/rockchip-nand-controller.c
908
sta = readl_relaxed(nfc->regs + nfc->cfg->int_st_off);
drivers/mtd/nand/raw/rockchip-nand-controller.c
909
ien = readl_relaxed(nfc->regs + nfc->cfg->int_en_off);
drivers/mtd/nand/raw/stm32_fmc2_nand.c
1223
*(u32 *)buf = readl_relaxed(io_addr_r);
drivers/mtd/nand/raw/tegra_nand.c
256
isr = readl_relaxed(ctrl->regs + ISR);
drivers/mtd/nand/raw/tegra_nand.c
257
dma = readl_relaxed(ctrl->regs + DMA_MST_CTRL);
drivers/mtd/nand/raw/tegra_nand.c
323
reg = readl_relaxed(ctrl->regs + (i * 4));
drivers/mtd/nand/raw/tegra_nand.c
339
isr = readl_relaxed(ctrl->regs + ISR);
drivers/mtd/nand/raw/tegra_nand.c
341
dma = readl_relaxed(ctrl->regs + DMA_MST_CTRL);
drivers/mtd/nand/raw/tegra_nand.c
437
reg = readl_relaxed(ctrl->regs + RESP);
drivers/mtd/nand/raw/tegra_nand.c
686
dec_stat = readl_relaxed(ctrl->regs + DEC_STAT_BUF);
drivers/net/can/at91_can.c
287
return readl_relaxed(priv->reg_base + reg);
drivers/net/dsa/bcm_sf2.h
136
return readl_relaxed(priv->name + off); \
drivers/net/dsa/bcm_sf2.h
185
return readl_relaxed(priv->core + tmp);
drivers/net/dsa/bcm_sf2.h
196
return readl_relaxed(priv->reg + priv->reg_offsets[off]);
drivers/net/dsa/bcm_sf2.h
215
return readl_relaxed(priv->reg + priv->reg_offsets[off] + reg);
drivers/net/ethernet/broadcom/asp2/bcmasp.h
409
u32 reg = readl_relaxed(intf->m + off); \
drivers/net/ethernet/broadcom/asp2/bcmasp.h
482
u32 reg = readl_relaxed(priv->base + (offset) + off); \
drivers/net/ethernet/broadcom/asp2/bcmasp.h
504
u32 reg = readl_relaxed(priv->base + priv->name##_offset + \
drivers/net/ethernet/broadcom/bcmsysport.c
37
return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
drivers/net/ethernet/broadcom/bcmsysport.h
781
u32 reg = readl_relaxed(priv->base + (offset) + off); \
drivers/net/ethernet/broadcom/genet/bcmgenet.c
89
return readl_relaxed(offset);
drivers/net/ethernet/broadcom/genet/bcmgenet.h
706
return readl_relaxed(priv->base + offset + off); \
drivers/net/ethernet/cadence/macb_main.c
213
return readl_relaxed(bp->regs + offset);
drivers/net/ethernet/cadence/macb_main.c
245
id = readl_relaxed(addr + MACB_MID);
drivers/net/ethernet/cadence/macb_main.c
4627
queue_mask |= readl_relaxed(mem + GEM_DCFG6) & 0xFF;
drivers/net/ethernet/hisilicon/hip04_eth.c
316
val = readl_relaxed(priv->base + PPE_CFG_STS_MODE);
drivers/net/ethernet/hisilicon/hip04_eth.c
353
val = readl_relaxed(priv->base + GE_TRANSMIT_CONTROL_REG);
drivers/net/ethernet/hisilicon/hip04_eth.c
360
val = readl_relaxed(priv->base + GE_RECV_CONTROL_REG);
drivers/net/ethernet/hisilicon/hip04_eth.c
376
val = readl_relaxed(priv->base + GE_PORT_EN);
drivers/net/ethernet/hisilicon/hip04_eth.c
403
val = readl_relaxed(priv->base + GE_PORT_EN);
drivers/net/ethernet/hisilicon/hip04_eth.c
671
u32 ists = readl_relaxed(priv->base + PPE_INTSTS);
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
474
start = dma_cnt(readl_relaxed(priv->base + RX_FQ_WR_ADDR));
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
476
end = dma_cnt(readl_relaxed(priv->base + RX_FQ_RD_ADDR));
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
518
start = dma_cnt(readl_relaxed(priv->base + RX_BQ_RD_ADDR));
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
520
end = dma_cnt(readl_relaxed(priv->base + RX_BQ_WR_ADDR));
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
600
start = dma_cnt(readl_relaxed(priv->base + TX_RQ_RD_ADDR));
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
602
end = dma_cnt(readl_relaxed(priv->base + TX_RQ_WR_ADDR));
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
657
ints = readl_relaxed(priv->base + RAW_PMU_INT);
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
673
int ints = readl_relaxed(priv->base + RAW_PMU_INT);
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
746
pos = dma_cnt(readl_relaxed(priv->base + TX_BQ_WR_ADDR));
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
924
for (i = 0; readl_relaxed(base + MDIO_SINGLE_CMD) & MDIO_START; i++) {
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
948
val = readl_relaxed(base + MDIO_RDATA_STATUS);
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
955
val = readl_relaxed(priv->base + MDIO_SINGLE_DATA);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
1033
head = readl_relaxed(ring->io_base + RCB_REG_HEAD);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
1048
int head = readl_relaxed(ring->io_base + RCB_REG_HEAD);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
1665
head = readl_relaxed(ring->io_base + RCB_REG_HEAD);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
1666
tail = readl_relaxed(ring->io_base + RCB_REG_TAIL);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
853
num = readl_relaxed(ring->io_base + RCB_REG_FBDNUM);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
905
num = readl_relaxed(ring->io_base + RCB_REG_FBDNUM);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
928
num = readl_relaxed(ring->io_base + RCB_REG_FBDNUM);
drivers/net/ethernet/hisilicon/hns/hns_enet.c
981
head = readl_relaxed(ring->io_base + RCB_REG_HEAD);
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
474
readl_relaxed(base + HNS3_RING_RX_RING_BD_NUM_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
476
readl_relaxed(base + HNS3_RING_RX_RING_BD_LEN_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
478
readl_relaxed(base + HNS3_RING_RX_RING_TAIL_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
480
readl_relaxed(base + HNS3_RING_RX_RING_HEAD_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
482
readl_relaxed(base + HNS3_RING_RX_RING_FBDNUM_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
483
seq_printf(s, "%-11u", readl_relaxed(base +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
487
str_on_off(readl_relaxed(base + HNS3_RING_EN_REG)));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
490
seq_printf(s, "%-12s", str_on_off(readl_relaxed(base +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
495
base_add_h = readl_relaxed(base + HNS3_RING_RX_RING_BASEADDR_H_REG);
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
496
base_add_l = readl_relaxed(base + HNS3_RING_RX_RING_BASEADDR_L_REG);
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
540
readl_relaxed(base + HNS3_RING_TX_RING_BD_NUM_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
541
seq_printf(s, "%-4u", readl_relaxed(base + HNS3_RING_TX_RING_TC_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
542
seq_printf(s, "%-6u", readl_relaxed(base + HNS3_RING_TX_RING_TAIL_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
543
seq_printf(s, "%-6u", readl_relaxed(base + HNS3_RING_TX_RING_HEAD_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
545
readl_relaxed(base + HNS3_RING_TX_RING_FBDNUM_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
547
readl_relaxed(base + HNS3_RING_TX_RING_OFFSET_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
549
readl_relaxed(base + HNS3_RING_TX_RING_PKTNUM_RECORD_REG));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
551
str_on_off(readl_relaxed(base + HNS3_RING_EN_REG)));
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
555
str_on_off(readl_relaxed(base +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
560
base_add_h = readl_relaxed(base + HNS3_RING_TX_RING_BASEADDR_H_REG);
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
561
base_add_l = readl_relaxed(base + HNS3_RING_TX_RING_BASEADDR_L_REG);
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
640
return readl_relaxed(ring->tqp->io_base + reg);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.c
538
*reg++ = readl_relaxed(tqp->io_base -
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
152
*reg++ = readl_relaxed(tqp->io_base -
drivers/net/ethernet/hisilicon/hns_mdio.c
105
return readl_relaxed(base + reg);
drivers/net/ethernet/marvell/mvneta.c
4918
val = readl_relaxed(base + s->offset);
drivers/net/ethernet/marvell/mvneta.c
4923
low = readl_relaxed(base + s->offset);
drivers/net/ethernet/marvell/mvneta.c
4924
high = readl_relaxed(base + s->offset + 4);
drivers/net/ethernet/marvell/mvneta_bm.h
159
return readl_relaxed(priv->bppi_virt_addr +
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
179
return readl_relaxed(priv->swth_base[thread] + offset);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3388
r0 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R0) & 0xffff;
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3392
r1 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R1) & 0xffff;
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3393
r2 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R2) & 0xffff;
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
86
return readl_relaxed(priv->swth_base[0] + offset);
drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c
100
readl_relaxed(base + 20);
drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c
101
readl_relaxed(base + 24);
drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c
70
val = readl_relaxed(reg) & ~mask;
drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c
82
return readl_relaxed(reg) & 0xffff;
drivers/net/ethernet/marvell/prestera/prestera_pci.c
287
*buf32 = readl_relaxed(evtq_addr + idx);
drivers/net/ethernet/marvell/pxa168_eth.c
275
return readl_relaxed(pep->base + offset);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
1098
reg = readl_relaxed(adpt->base + rx_q->consume_reg);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
1181
u32 reg = readl_relaxed(adpt->base + tx_q->consume_reg);
drivers/net/ethernet/qualcomm/emac/emac.c
136
isr = readl_relaxed(adpt->base + EMAC_INT_STATUS);
drivers/net/ethernet/qualcomm/emac/emac.c
310
*stats_itr += readl_relaxed(base + addr);
drivers/net/ethernet/qualcomm/emac/emac.c
316
stats->rx_crc_align += readl_relaxed(base + EMAC_RXMAC_STATC_REG23);
drivers/net/ethernet/qualcomm/emac/emac.c
317
stats->rx_jabbers += readl_relaxed(base + EMAC_RXMAC_STATC_REG24);
drivers/net/ethernet/qualcomm/emac/emac.c
324
*stats_itr += readl_relaxed(base + addr);
drivers/net/ethernet/qualcomm/emac/emac.c
330
stats->tx_col += readl_relaxed(base + EMAC_TXMAC_STATC_REG25);
drivers/net/ethernet/qualcomm/emac/emac.c
694
reg = readl_relaxed(adpt->base + EMAC_DMA_MAS_CTRL);
drivers/net/ethernet/qualcomm/emac/emac.c
697
reg = readl_relaxed(adpt->base + EMAC_CORE_HW_VERSION);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
191
sec1 = readl_relaxed(ioaddr + PTP_STSR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
195
ns = readl_relaxed(ioaddr + PTP_STNSR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
197
sec1 = readl_relaxed(ioaddr + PTP_STSR);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
584
reg[pos++] = readl_relaxed(common->ss_base + j);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
652
*data++ = readl_relaxed(host_p->stat_base +
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
658
*data++ = readl_relaxed(port->stat_base +
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
673
s->FramesTransmittedOK = readl_relaxed(&stats->tx_good_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
674
s->SingleCollisionFrames = readl_relaxed(&stats->tx_single_coll_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
675
s->MultipleCollisionFrames = readl_relaxed(&stats->tx_mult_coll_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
676
s->FramesReceivedOK = readl_relaxed(&stats->rx_good_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
677
s->FrameCheckSequenceErrors = readl_relaxed(&stats->rx_crc_errors);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
678
s->AlignmentErrors = readl_relaxed(&stats->rx_align_code_errors);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
679
s->OctetsTransmittedOK = readl_relaxed(&stats->tx_octets);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
680
s->FramesWithDeferredXmissions = readl_relaxed(&stats->tx_deferred_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
681
s->LateCollisions = readl_relaxed(&stats->tx_late_collisions);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
682
s->CarrierSenseErrors = readl_relaxed(&stats->tx_carrier_sense_errors);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
683
s->OctetsReceivedOK = readl_relaxed(&stats->rx_octets);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
684
s->MulticastFramesXmittedOK = readl_relaxed(&stats->tx_multicast_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
685
s->BroadcastFramesXmittedOK = readl_relaxed(&stats->tx_broadcast_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
686
s->MulticastFramesReceivedOK = readl_relaxed(&stats->rx_multicast_frames);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
687
s->BroadcastFramesReceivedOK = readl_relaxed(&stats->rx_broadcast_frames);
drivers/net/ethernet/ti/cpsw_ale.c
1163
tmp = readl_relaxed(ale->params.ale_regs + offset);
drivers/net/ethernet/ti/cpsw_ale.c
1190
tmp = readl_relaxed(ale->params.ale_regs + offset) >> shift;
drivers/net/ethernet/ti/cpsw_ale.c
351
ale_entry[i] = readl_relaxed(ale->params.ale_regs +
drivers/net/ethernet/ti/cpsw_priv.c
298
} while ((readl_relaxed(reg) & 1) && time_after(timeout, jiffies));
drivers/net/ethernet/ti/cpsw_priv.c
300
WARN(readl_relaxed(reg) & 1, "failed to soft-reset %s\n", module);
drivers/net/ethernet/ti/cpsw_priv.c
799
val = readl_relaxed(&cpsw->regs->ptype);
drivers/net/ethernet/ti/cpsw_priv.c
816
val = readl_relaxed(&cpsw->regs->ptype);
drivers/net/ethernet/ti/cpsw_priv.h
318
return readl_relaxed(slave->regs + offset);
drivers/net/ethernet/ti/cpts.c
32
#define cpts_read32(c, r) readl_relaxed(&c->reg->r)
drivers/net/fddi/defza.c
79
#define readl_o readl_relaxed
drivers/net/fddi/defza.c
88
#define readl_u readl_relaxed
drivers/net/mdio/mdio-bcm-unimac.c
55
return readl_relaxed(priv->base + offset);
drivers/net/wireless/ath/wil6210/debugfs.c
213
v = readl_relaxed(x);
drivers/net/wireless/ath/wil6210/debugfs.c
221
v = readl_relaxed(x);
drivers/net/wireless/ath/wil6210/debugfs.c
98
v = readl_relaxed(x);
drivers/nvmem/apple-efuses.c
24
*dst++ = readl_relaxed(priv->fuses + offset);
drivers/nvmem/imx-ocotp-ele.c
101
*buf++ = readl_relaxed(reg + (i << 2)) & GENMASK(15, 0);
drivers/nvmem/imx-ocotp-ele.c
103
*buf++ = readl_relaxed(reg + (i << 2));
drivers/nvmem/microchip-otpc.c
173
*buf++ = readl_relaxed(otpc->base + MCHP_OTPC_HR);
drivers/nvmem/microchip-otpc.c
183
*buf++ = readl_relaxed(otpc->base + MCHP_OTPC_DR);
drivers/nvmem/microchip-otpc.c
207
word = readl_relaxed(otpc->base + MCHP_OTPC_HR);
drivers/nvmem/microchip-otpc.c
79
tmp = readl_relaxed(otpc->base + MCHP_OTPC_MR);
drivers/nvmem/microchip-otpc.c
85
tmp = readl_relaxed(otpc->base + MCHP_OTPC_CR);
drivers/nvmem/microchip-otpc.c
90
return read_poll_timeout(readl_relaxed, tmp, !(tmp & MCHP_OTPC_SR_READ),
drivers/nvmem/stm32-romem.c
96
val = readl_relaxed(
drivers/nvmem/sunxi_sid.c
56
word = readl_relaxed(sid->base + sid->value_offset + offset);
drivers/pci/controller/dwc/pcie-al.c
144
return readl_relaxed(pcie->controller_base + offset);
drivers/pci/controller/dwc/pcie-amd-mdb.c
151
val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);
drivers/pci/controller/dwc/pcie-amd-mdb.c
231
val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);
drivers/pci/controller/dwc/pcie-amd-mdb.c
232
val &= ~readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_MASK_MISC);
drivers/pci/controller/dwc/pcie-amd-mdb.c
262
val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);
drivers/pci/controller/dwc/pcie-dw-rockchip.c
127
return readl_relaxed(rockchip->apb_base + reg);
drivers/pci/controller/dwc/pcie-eswin.c
213
val = readl_relaxed(pci->elbi_base + PCIEELBI_CTRL0_OFFSET);
drivers/pci/controller/dwc/pcie-eswin.c
224
val = readl_relaxed(pci->elbi_base + PCIEELBI_CTRL0_OFFSET);
drivers/pci/controller/dwc/pcie-eswin.c
78
val = readl_relaxed(pci->elbi_base + PCIEELBI_CTRL0_OFFSET);
drivers/pci/controller/dwc/pcie-qcom-ep.c
272
reg = readl_relaxed(pci->elbi_base + ELBI_SYS_STTS);
drivers/pci/controller/dwc/pcie-qcom-ep.c
433
val = readl_relaxed(pcie_ep->parf + PARF_BDF_TO_SID_CFG);
drivers/pci/controller/dwc/pcie-qcom-ep.c
438
val = readl_relaxed(pcie_ep->parf + PARF_DEBUG_INT_EN);
drivers/pci/controller/dwc/pcie-qcom-ep.c
448
val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
drivers/pci/controller/dwc/pcie-qcom-ep.c
453
val = readl_relaxed(pcie_ep->parf + PARF_AXI_MSTR_RD_HALT_NO_WRITES);
drivers/pci/controller/dwc/pcie-qcom-ep.c
458
val = readl_relaxed(pcie_ep->parf + PARF_AXI_MSTR_WR_ADDR_HALT);
drivers/pci/controller/dwc/pcie-qcom-ep.c
463
val = readl_relaxed(pcie_ep->parf + PARF_Q2A_FLUSH);
drivers/pci/controller/dwc/pcie-qcom-ep.c
473
val = readl_relaxed(pcie_ep->parf + PARF_SYS_CTRL);
drivers/pci/controller/dwc/pcie-qcom-ep.c
481
val = readl_relaxed(pcie_ep->parf + PARF_DB_CTRL);
drivers/pci/controller/dwc/pcie-qcom-ep.c
488
val = readl_relaxed(pcie_ep->parf + PARF_CFG_BITS);
drivers/pci/controller/dwc/pcie-qcom-ep.c
515
val = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_5_MASK);
drivers/pci/controller/dwc/pcie-qcom-ep.c
520
val = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_3_MASK);
drivers/pci/controller/dwc/pcie-qcom-ep.c
544
val = readl_relaxed(pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL);
drivers/pci/controller/dwc/pcie-qcom-ep.c
551
val = readl_relaxed(pcie_ep->parf + PARF_LTSSM);
drivers/pci/controller/dwc/pcie-qcom-ep.c
691
u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS);
drivers/pci/controller/dwc/pcie-qcom-ep.c
707
val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
drivers/pci/controller/dwc/pcie-qcom-ep.c
715
val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
drivers/pci/controller/dwc/pcie-qcom-ep.c
820
readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_PM_LINKST_IN_L0S));
drivers/pci/controller/dwc/pcie-qcom-ep.c
823
readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_PM_LINKST_IN_L1));
drivers/pci/controller/dwc/pcie-qcom-ep.c
826
readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L1));
drivers/pci/controller/dwc/pcie-qcom-ep.c
829
readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L2));
drivers/pci/controller/dwc/pcie-qcom-ep.c
832
readl_relaxed(pcie_ep->mmio + PARF_DEBUG_CNT_PM_LINKST_IN_L2));
drivers/pci/controller/dwc/pcie-qcom.c
1742
readl_relaxed(pcie->mhi + PARF_DEBUG_CNT_PM_LINKST_IN_L0S));
drivers/pci/controller/dwc/pcie-qcom.c
1745
readl_relaxed(pcie->mhi + PARF_DEBUG_CNT_PM_LINKST_IN_L1));
drivers/pci/controller/dwc/pcie-qcom.c
1748
readl_relaxed(pcie->mhi + PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L1));
drivers/pci/controller/dwc/pcie-qcom.c
1751
readl_relaxed(pcie->mhi + PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L2));
drivers/pci/controller/dwc/pcie-qcom.c
1754
readl_relaxed(pcie->mhi + PARF_DEBUG_CNT_PM_LINKST_IN_L2));
drivers/pci/controller/dwc/pcie-sophgo.c
36
return readl_relaxed(sophgo->app_base + reg);
drivers/pci/controller/dwc/pcie-spacemit-k1.c
207
val = readl_relaxed(k1->link + K1_PHY_AHB_LINK_STS);
drivers/pci/controller/dwc/pcie-spacemit-k1.c
225
val = readl_relaxed(k1->link + K1_PHY_AHB_IRQ_EN);
drivers/pci/controller/dwc/pcie-spacemit-k1.c
238
val = readl_relaxed(k1->link + K1_PHY_AHB_IRQ_EN);
drivers/pci/controller/dwc/pcie-tegra194.c
308
return readl_relaxed(pcie->appl_base + reg);
drivers/pci/controller/dwc/pcie-visconti.c
103
return readl_relaxed(pcie->ulreg_base + reg);
drivers/pci/controller/dwc/pcie-visconti.c
120
return readl_relaxed(pcie->mpu_base + reg);
drivers/pci/controller/dwc/pcie-visconti.c
127
u32 val = readl_relaxed(addr + PCIE_UL_REG_V_PHY_ST_02);
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
136
msi_status = readl_relaxed(pcie->apb_csr_base + MSI_STATUS_OFFSET);
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
140
msi_data = readl_relaxed(pcie->apb_csr_base + MSI_DATA_OFFSET);
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
148
msi_addr_lo = readl_relaxed(pcie->apb_csr_base +
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
150
msi_addr_hi = readl_relaxed(pcie->apb_csr_base +
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
157
msi_status = readl_relaxed(pcie->apb_csr_base +
drivers/pci/controller/pci-mvebu.c
374
*val = readl_relaxed(conf_data);
drivers/pci/controller/pci-xgene-msi.c
102
return readl_relaxed(msi->msi_regs + MSI_INT0 +
drivers/pci/controller/pci-xgene-msi.c
94
return readl_relaxed(msi->msi_regs + MSI_IR0 +
drivers/pci/controller/pcie-altera-msi.c
49
return readl_relaxed(msi->csr_base + reg);
drivers/pci/controller/pcie-altera-msi.c
66
readl_relaxed(msi->vector_base + (bit * sizeof(u32)));
drivers/pci/controller/pcie-altera.c
156
return readl_relaxed(pcie->cra_base + reg);
drivers/pci/controller/pcie-altera.c
497
*value = readl_relaxed(addr);
drivers/pci/controller/pcie-apple.c
210
writel_relaxed(readl_relaxed(addr) | set, addr);
drivers/pci/controller/pcie-apple.c
215
writel_relaxed(readl_relaxed(addr) & ~clr, addr);
drivers/pci/controller/pcie-apple.c
391
stat = readl_relaxed(port->base + PORT_INTSTAT);
drivers/pci/controller/pcie-apple.c
550
return readl_relaxed(port_rid2sid_addr(port, idx));
drivers/pci/controller/pcie-apple.c
806
val = readl_relaxed(port_rid2sid_addr(port, idx));
drivers/pci/controller/pcie-iproc-msi.c
133
return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]);
drivers/pci/controller/pcie-mediatek-gen3.c
1170
val = readl_relaxed(pcie->base + PCIE_BASE_CFG_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
1305
pcie->saved_irq_state = readl_relaxed(pcie->base + PCIE_INT_ENABLE_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
1310
msi_set->saved_irq_state = readl_relaxed(msi_set->base +
drivers/pci/controller/pcie-mediatek-gen3.c
1339
val = readl_relaxed(pcie->base + PCIE_ICMD_PM_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
405
val = readl_relaxed(pcie->base + PCIE_MSI_SET_ENABLE_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
409
val = readl_relaxed(pcie->base + PCIE_INT_ENABLE_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
428
val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
478
val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
495
val = readl_relaxed(pcie->base + PCIE_SETTING_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
517
val = readl_relaxed(pcie->base + PCIE_CONF_LINK2_CTL_STS);
drivers/pci/controller/pcie-mediatek-gen3.c
524
val = readl_relaxed(pcie->base + PCIE_RESOURCE_CTRL_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
531
val = readl_relaxed(pcie->base + PCIE_PCI_IDS_1);
drivers/pci/controller/pcie-mediatek-gen3.c
537
val = readl_relaxed(pcie->base + PCIE_INT_ENABLE_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
542
val = readl_relaxed(pcie->base + PCIE_MISC_CTRL_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
583
val = readl_relaxed(pcie->base + PCIE_LTSSM_STATUS_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
655
val = readl_relaxed(msi_set->base + PCIE_MSI_SET_ENABLE_OFFSET);
drivers/pci/controller/pcie-mediatek-gen3.c
671
val = readl_relaxed(msi_set->base + PCIE_MSI_SET_ENABLE_OFFSET);
drivers/pci/controller/pcie-mediatek-gen3.c
742
val = readl_relaxed(pcie->base + PCIE_INT_ENABLE_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
755
val = readl_relaxed(pcie->base + PCIE_INT_ENABLE_REG);
drivers/pci/controller/pcie-mediatek-gen3.c
867
msi_enable = readl_relaxed(msi_set->base + PCIE_MSI_SET_ENABLE_OFFSET);
drivers/pci/controller/pcie-mediatek-gen3.c
870
msi_status = readl_relaxed(msi_set->base +
drivers/pci/controller/pcie-mediatek-gen3.c
892
status = readl_relaxed(pcie->base + PCIE_INT_STATUS_REG);
drivers/pci/controller/pcie-mt7621.c
107
return readl_relaxed(pcie->base + reg);
drivers/pci/controller/pcie-mt7621.c
117
return readl_relaxed(port->base + reg);
drivers/pci/controller/pcie-rzg3s-host.c
1041
cs2 = readl_relaxed(host->axi + RZG3S_PCI_PCSTAT2);
drivers/pci/controller/pcie-rzg3s-host.c
1044
lnkcap = readl_relaxed(host->pcie + pcie_cap + PCI_EXP_LNKCAP);
drivers/pci/controller/pcie-rzg3s-host.c
1191
readl_relaxed(host->axi + RZG3S_PCI_RESET);
drivers/pci/controller/pcie-rzg3s-host.c
1391
val = readl_relaxed(host->axi + RZG3S_PCI_PCSTAT2);
drivers/pci/controller/pcie-rzg3s-host.c
341
tmp = readl_relaxed(base + offset);
drivers/pci/controller/pcie-rzg3s-host.c
406
*data = readl_relaxed(host->axi + RZG3S_PCI_REQRCVDAT);
drivers/pci/controller/pcie-rzg3s-host.c
545
status = readl_relaxed(host->axi + RZG3S_PCI_PINTRCVIS);
drivers/pci/controller/pcie-rzg3s-host.c
557
status = readl_relaxed(host->axi + RZG3S_PCI_MSIRS(reg_id));
drivers/pci/controller/pcie-rzg3s-host.c
626
lo = readl_relaxed(host->axi + RZG3S_PCI_MSIRCVWADRL) &
drivers/pci/controller/pcie-rzg3s-host.c
628
hi = readl_relaxed(host->axi + RZG3S_PCI_MSIRCVWADRU);
drivers/pci/controller/pcie-rzg3s-host.c
788
basel = readl_relaxed(host->axi + RZG3S_PCI_AWBASEL(id));
drivers/pci/controller/pcie-rzg3s-host.c
793
baseu = readl_relaxed(host->axi + RZG3S_PCI_AWBASEU(id));
drivers/pci/controller/pcie-rzg3s-host.c
796
maskl = readl_relaxed(host->axi + RZG3S_PCI_AWMASKL(id));
drivers/pci/controller/pcie-rzg3s-host.c
797
masku = readl_relaxed(host->axi + RZG3S_PCI_AWMASKU(id));
drivers/pci/controller/pcie-xilinx-cpm.c
132
return readl_relaxed(port->reg_base + reg);
drivers/pci/controller/pcie-xilinx-cpm.c
295
val = readl_relaxed(port->cpm_base + variant->ir_status);
drivers/pci/controller/pcie-xilinx-cpm.c
305
val = readl_relaxed(port->cpm_base + XILINX_CPM_PCIE_MISC_IR_STATUS);
drivers/pci/controller/plda/pcie-microchip-host.c
329
u32 reg = readl_relaxed(port->ctrl_base_addr + PCIE_EVENT_INT);
drivers/pci/controller/plda/pcie-microchip-host.c
341
u32 reg = readl_relaxed(port->ctrl_base_addr + SEC_ERROR_INT);
drivers/pci/controller/plda/pcie-microchip-host.c
353
u32 reg = readl_relaxed(port->ctrl_base_addr + DED_ERROR_INT);
drivers/pci/controller/plda/pcie-microchip-host.c
365
u32 reg = readl_relaxed(port->bridge_base_addr + ISTATUS_LOCAL);
drivers/pci/controller/plda/pcie-microchip-host.c
449
val = readl_relaxed(addr);
drivers/pci/controller/plda/pcie-microchip-host.c
486
val = readl_relaxed(addr);
drivers/pci/controller/plda/pcie-microchip-host.c
792
plda->msi.vector_phy = readl_relaxed(port->bridge_base_addr + IMSI_ADDR);
drivers/pci/controller/plda/pcie-plda-host.c
188
status = readl_relaxed(bridge_base_addr + ISTATUS_LOCAL);
drivers/pci/controller/plda/pcie-plda-host.c
221
val = readl_relaxed(bridge_base_addr + IMASK_LOCAL);
drivers/pci/controller/plda/pcie-plda-host.c
236
val = readl_relaxed(bridge_base_addr + IMASK_LOCAL);
drivers/pci/controller/plda/pcie-plda-host.c
266
origin = readl_relaxed(port->bridge_addr + ISTATUS_LOCAL);
drivers/pci/controller/plda/pcie-plda-host.c
336
val = readl_relaxed(port->bridge_addr + IMASK_LOCAL);
drivers/pci/controller/plda/pcie-plda-host.c
350
val = readl_relaxed(port->bridge_addr + IMASK_LOCAL);
drivers/pci/controller/plda/pcie-plda-host.c
45
status = readl_relaxed(bridge_base_addr + ISTATUS_LOCAL);
drivers/pci/controller/plda/pcie-plda-host.c
49
status = readl_relaxed(bridge_base_addr + ISTATUS_MSI);
drivers/pci/controller/plda/pcie-plda.h
224
value = readl_relaxed(plda->bridge_addr + GEN_SETTINGS);
drivers/pci/controller/plda/pcie-plda.h
234
value = readl_relaxed(plda->bridge_addr + PCIE_PCI_IDS_DW1);
drivers/pci/controller/plda/pcie-plda.h
244
value = readl_relaxed(plda->bridge_addr + PCIE_WINROM);
drivers/pci/controller/plda/pcie-plda.h
253
value = readl_relaxed(plda->bridge_addr + PMSG_SUPPORT_RX);
drivers/pci/controller/plda/pcie-plda.h
262
value = readl_relaxed(plda->bridge_addr + PCI_MISC);
drivers/pcmcia/sa1111_generic.c
127
val = readl_relaxed(s->dev->mapbase + PCCR);
drivers/pcmcia/sa1111_generic.c
71
u32 status = readl_relaxed(s->dev->mapbase + PCSR);
drivers/perf/arm-cci.c
370
rev = readl_relaxed(cci_pmu->ctrl_base + CCI_PID2) & CCI_PID2_REV_MASK;
drivers/perf/arm-cci.c
668
val = readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) | CCI_PMCR_CEN;
drivers/perf/arm-cci.c
685
val = readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) & ~CCI_PMCR_CEN;
drivers/perf/arm-cci.c
706
return readl_relaxed(cci_pmu->base +
drivers/perf/arm-cci.c
782
return (readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) &
drivers/perf/arm-cmn.c
1480
u32 val = readl_relaxed(pmevcnt);
drivers/perf/arm-cmn.c
2061
u32 status = readl_relaxed(CMN_DT_PMOVSR(dtc));
drivers/perf/arm-cmn.c
2222
return FIELD_GET(CMN_DTM_UNIT_INFO_DTC_DOMAIN, readl_relaxed(xp_region + offset));
drivers/perf/arm-cmn.c
2291
reg = readl_relaxed(cfg_region + CMN_CFGM_PERIPH_ID_23);
drivers/perf/arm-cmn.c
456
return readl_relaxed(xp->pmu_base + offset);
drivers/perf/arm-ni.c
252
u32 reg = readl_relaxed(ni->base + NI_PERIPHERAL_ID2);
drivers/perf/arm-ni.c
364
u_new = readl_relaxed(pmccntr + 4);
drivers/perf/arm-ni.c
367
l = readl_relaxed(pmccntr);
drivers/perf/arm-ni.c
368
u_new = readl_relaxed(pmccntr + 4);
drivers/perf/arm-ni.c
386
count = readl_relaxed((void __iomem *)event->hw.event_base);
drivers/perf/arm-ni.c
481
u32 reg = readl_relaxed(cd->pmu_base + NI_PMOVSCLR);
drivers/perf/arm-ni.c
513
num = readl_relaxed(unit_base + NI_NUM_SUB_FEATURES);
drivers/perf/arm-ni.c
515
type = readl_relaxed(unit_base + NI_SUB_FEATURE_TYPE(i));
drivers/perf/arm-ni.c
518
ptr = readl_relaxed(unit_base + NI_SUB_FEATURE_PTR(i));
drivers/perf/arm-ni.c
537
u32 reg = readl_relaxed(node->base + NI_CHILD_PTR(i));
drivers/perf/arm-ni.c
541
reg = readl_relaxed(unit_base + NI_NODE_TYPE);
drivers/perf/arm-ni.c
547
reg = readl_relaxed(unit_base + NI_PMCFGR);
drivers/perf/arm-ni.c
566
if (readl_relaxed(unit->pmusela) != 1)
drivers/perf/arm-ni.c
635
u32 reg = readl_relaxed(base + NI_NODE_TYPE);
drivers/perf/arm-ni.c
640
node->num_components = readl_relaxed(base + NI_CHILD_NODE_INFO);
drivers/perf/arm-ni.c
695
reg = readl_relaxed(cfg.base + NI_PERIPHERAL_ID0);
drivers/perf/arm-ni.c
697
reg = readl_relaxed(cfg.base + NI_PERIPHERAL_ID1);
drivers/perf/arm-ni.c
713
reg = readl_relaxed(cfg.base + NI_CHILD_PTR(v));
drivers/perf/arm-ni.c
716
reg = readl_relaxed(vd.base + NI_CHILD_PTR(p));
drivers/perf/arm-ni.c
739
reg = readl_relaxed(cfg.base + NI_CHILD_PTR(v));
drivers/perf/arm-ni.c
742
reg = readl_relaxed(vd.base + NI_CHILD_PTR(p));
drivers/perf/arm-ni.c
745
reg = readl_relaxed(pd.base + NI_CHILD_PTR(c));
drivers/perf/arm_smmuv3_pmu.c
820
u32 iidr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_IIDR);
drivers/perf/arm_smmuv3_pmu.c
884
cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR);
drivers/perf/fsl_imx8_ddr_perf.c
437
return readl_relaxed(base + counter * 4);
drivers/perf/fsl_imx8_ddr_perf.c
517
val = readl_relaxed(pmu->base + reg) & CNTL_EN_MASK;
drivers/perf/fsl_imx8_ddr_perf.c
526
val = readl_relaxed(pmu->base + counter * 4 + COUNTER_CNTL);
drivers/perf/fsl_imx8_ddr_perf.c
536
val = readl_relaxed(pmu->base + reg);
drivers/perf/fsl_imx9_ddr_perf.c
387
val = readl_relaxed(pmu->base + PMC(counter));
drivers/perf/fsl_imx9_ddr_perf.c
393
val_upper = readl_relaxed(pmu->base + PMC(counter) + 0x4);
drivers/perf/fsl_imx9_ddr_perf.c
394
val_lower = readl_relaxed(pmu->base + PMC(counter));
drivers/perf/fsl_imx9_ddr_perf.c
395
} while (val_upper != readl_relaxed(pmu->base + PMC(counter) + 0x4));
drivers/perf/fsl_imx9_ddr_perf.c
408
ctrl = readl_relaxed(pmu->base + PMGC0);
drivers/perf/fsl_imx9_ddr_perf.c
444
ctrl_a = readl_relaxed(pmu->base + PMLCA(counter));
drivers/perf/fsl_imx9_ddr_perf.c
476
pmcfg1 = readl_relaxed(pmu->base + PMCFG1);
drivers/perf/fsl_imx9_ddr_perf.c
486
pmcfg2 = readl_relaxed(pmu->base + PMCFG2);
drivers/perf/fsl_imx9_ddr_perf.c
497
pmcfg1 = readl_relaxed(pmu->base + PMCFG1);
drivers/perf/fsl_imx9_ddr_perf.c
534
pmcfg = readl_relaxed(pmu->base + offset);
drivers/perf/hisilicon/hisi_pcie_pmu.c
163
u32 val = readl_relaxed(pcie_pmu->base + reg_off);
drivers/perf/hisilicon/hisi_pcie_pmu.c
200
return readl_relaxed(pcie_pmu->base + offset);
drivers/perf/qcom_l3_pmu.c
201
gang = readl_relaxed(l3pmu->regs + L3_M_BC_GANG);
drivers/perf/qcom_l3_pmu.c
229
u32 gang = readl_relaxed(l3pmu->regs + L3_M_BC_GANG);
drivers/perf/qcom_l3_pmu.c
249
hi = readl_relaxed(l3pmu->regs + L3_HML3_PM_EVCNTR(idx + 1));
drivers/perf/qcom_l3_pmu.c
250
lo = readl_relaxed(l3pmu->regs + L3_HML3_PM_EVCNTR(idx));
drivers/perf/qcom_l3_pmu.c
251
} while (hi != readl_relaxed(l3pmu->regs + L3_HML3_PM_EVCNTR(idx + 1)));
drivers/perf/qcom_l3_pmu.c
279
u32 irqctl = readl_relaxed(l3pmu->regs + L3_M_BC_IRQCTL);
drivers/perf/qcom_l3_pmu.c
304
u32 irqctl = readl_relaxed(l3pmu->regs + L3_M_BC_IRQCTL);
drivers/perf/qcom_l3_pmu.c
324
new = readl_relaxed(l3pmu->regs + L3_HML3_PM_EVCNTR(idx));
drivers/perf/qcom_l3_pmu.c
392
long status = readl_relaxed(l3pmu->regs + L3_M_BC_OVSR);
drivers/phy/broadcom/phy-brcm-usb-init.h
94
return readl_relaxed(addr);
drivers/phy/hisilicon/phy-hix5hd2-sata.c
106
val = readl_relaxed(priv->base + SATA_PORT_PHYCTL);
drivers/phy/hisilicon/phy-hix5hd2-sata.c
82
val = readl_relaxed(priv->base + SATA_PHY0_CTLL);
drivers/phy/hisilicon/phy-hix5hd2-sata.c
91
val = readl_relaxed(priv->base + SATA_PORT_PHYCTL1);
drivers/phy/hisilicon/phy-hix5hd2-sata.c
98
val = readl_relaxed(priv->base + SATA_PORT_PHYCTL2);
drivers/phy/marvell/phy-armada38x-comphy.c
182
val = readl_relaxed(lane->priv->base + COMPHY_SELECTOR);
drivers/phy/marvell/phy-armada38x-comphy.c
70
conf = readl_relaxed(priv->conf);
drivers/phy/marvell/phy-armada38x-comphy.c
84
val = readl_relaxed(lane->base + offset) & ~mask;
drivers/phy/marvell/phy-mmp3-hsic.c
25
hsic_ctrl = readl_relaxed(mmp3->base + HSIC_CTRL);
drivers/phy/marvell/phy-mmp3-usb.c
115
return readl_relaxed(base + offset);
drivers/phy/marvell/phy-mmp3-usb.c
123
reg = readl_relaxed(base + offset);
drivers/phy/marvell/phy-mmp3-usb.c
126
readl_relaxed(base + offset);
drivers/phy/marvell/phy-mmp3-usb.c
134
reg = readl_relaxed(base + offset);
drivers/phy/marvell/phy-mmp3-usb.c
137
readl_relaxed(base + offset);
drivers/phy/marvell/phy-pxa-usb.c
127
return readl_relaxed(base + offset);
drivers/phy/marvell/phy-pxa-usb.c
135
reg = readl_relaxed(base + offset);
drivers/phy/marvell/phy-pxa-usb.c
138
readl_relaxed(base + offset);
drivers/phy/marvell/phy-pxa-usb.c
146
reg = readl_relaxed(base + offset);
drivers/phy/marvell/phy-pxa-usb.c
149
readl_relaxed(base + offset);
drivers/phy/marvell/phy-pxa-usb.c
156
readl_relaxed(base + offset);
drivers/phy/phy-snps-eusb2.c
193
reg = readl_relaxed(base + offset);
drivers/phy/phy-snps-eusb2.c
199
readl_relaxed(base + offset);
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
101
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4);
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
114
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4);
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
59
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM3);
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
63
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM0) &
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
70
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM1) &
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
79
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM2) &
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
85
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4);
drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c
90
reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4);
drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
174
reg = readl_relaxed(base + offset);
drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
180
readl_relaxed(base + offset);
drivers/phy/st/phy-stm32-combophy.c
307
val = readl_relaxed(combophy->base + COMBOPHY_SUP_ANA_MPLL_LOOP_CTL);
drivers/phy/st/phy-stm32-usbphyc.c
161
writel_relaxed(readl_relaxed(reg) | bits, reg);
drivers/phy/st/phy-stm32-usbphyc.c
166
writel_relaxed(readl_relaxed(reg) & ~bits, reg);
drivers/phy/st/phy-stm32-usbphyc.c
289
bool pllen = readl_relaxed(pll_reg) & PLLEN;
drivers/phy/st/phy-stm32-usbphyc.c
472
otpcomp = FIELD_GET(OTPCOMP, readl_relaxed(usbphyc->base + reg));
drivers/phy/st/phy-stm32-usbphyc.c
759
version = readl_relaxed(usbphyc->base + STM32_USBPHYC_VERSION);
drivers/phy/tegra/phy-tegra194-p2u.c
52
return readl_relaxed(phy->base + reg);
drivers/pinctrl/actions/pinctrl-owl.c
524
val = readl_relaxed(base);
drivers/pinctrl/actions/pinctrl-owl.c
595
val = readl_relaxed(gpio_base + port->dat);
drivers/pinctrl/actions/pinctrl-owl.c
62
reg_val = readl_relaxed(base);
drivers/pinctrl/actions/pinctrl-owl.c
715
value = readl_relaxed(gpio_base + port->intc_type + offset);
drivers/pinctrl/actions/pinctrl-owl.c
74
tmp = readl_relaxed(pctrl->base + reg);
drivers/pinctrl/actions/pinctrl-owl.c
745
val = readl_relaxed(gpio_base + port->intc_msk);
drivers/pinctrl/actions/pinctrl-owl.c
776
value = readl_relaxed(gpio_base + port->intc_ctl);
drivers/pinctrl/actions/pinctrl-owl.c
868
pending_irq = readl_relaxed(base + port->intc_pd);
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
55
return readl_relaxed(pctl->base[i] + reg);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
683
status = readl_relaxed(info->base + IRQ_STATUS + 4 * i);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
685
status &= readl_relaxed(info->base + IRQ_EN + 4 * i);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
714
status = readl_relaxed(info->base +
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
717
status &= readl_relaxed(info->base + IRQ_EN + 4 * i);
drivers/pinctrl/pinctrl-apple-gpio.c
223
reg = readl_relaxed(pctl->base + REG_GPIO(offset));
drivers/pinctrl/pinctrl-apple-gpio.c
356
pending = readl_relaxed(pctl->base + REG_IRQ(*grpp, pinh));
drivers/pinctrl/pinctrl-artpec6.c
717
val = readl_relaxed(pmx->base + reg);
drivers/pinctrl/pinctrl-artpec6.c
929
val = readl_relaxed(base + artpec6_pmx_reg_offset(i));
drivers/pinctrl/pinctrl-at91-pio4.c
164
return readl_relaxed(atmel_pioctrl->reg_base
drivers/pinctrl/pinctrl-at91-pio4.c
465
return readl_relaxed(addr + ATMEL_PIO_CFGR);
drivers/pinctrl/pinctrl-at91.c
1424
osr = readl_relaxed(pio + PIO_OSR);
drivers/pinctrl/pinctrl-at91.c
1448
pdsr = readl_relaxed(pio + PIO_PDSR);
drivers/pinctrl/pinctrl-at91.c
1511
readl_relaxed(pio + PIO_OSR) & mask ?
drivers/pinctrl/pinctrl-at91.c
1514
readl_relaxed(pio + PIO_PDSR) & mask ?
drivers/pinctrl/pinctrl-at91.c
1664
at91_chip->backups = readl_relaxed(pio + PIO_IMR);
drivers/pinctrl/pinctrl-at91.c
1706
isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR);
drivers/pinctrl/pinctrl-at91.c
410
return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1);
drivers/pinctrl/pinctrl-at91.c
423
*val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
drivers/pinctrl/pinctrl-at91.c
424
return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
drivers/pinctrl/pinctrl-at91.c
436
return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
drivers/pinctrl/pinctrl-at91.c
457
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask,
drivers/pinctrl/pinctrl-at91.c
459
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,
drivers/pinctrl/pinctrl-at91.c
465
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask,
drivers/pinctrl/pinctrl-at91.c
467
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,
drivers/pinctrl/pinctrl-at91.c
473
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
drivers/pinctrl/pinctrl-at91.c
474
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
drivers/pinctrl/pinctrl-at91.c
479
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
drivers/pinctrl/pinctrl-at91.c
480
writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
drivers/pinctrl/pinctrl-at91.c
487
if (readl_relaxed(pio + PIO_PSR) & mask)
drivers/pinctrl/pinctrl-at91.c
490
select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask);
drivers/pinctrl/pinctrl-at91.c
491
select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1);
drivers/pinctrl/pinctrl-at91.c
500
if (readl_relaxed(pio + PIO_PSR) & mask)
drivers/pinctrl/pinctrl-at91.c
503
select = readl_relaxed(pio + PIO_ABSR) & mask;
drivers/pinctrl/pinctrl-at91.c
510
return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1;
drivers/pinctrl/pinctrl-at91.c
520
if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1)
drivers/pinctrl/pinctrl-at91.c
521
return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
drivers/pinctrl/pinctrl-at91.c
535
*div = readl_relaxed(pio + PIO_SCDR);
drivers/pinctrl/pinctrl-at91.c
537
return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) &&
drivers/pinctrl/pinctrl-at91.c
538
((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
drivers/pinctrl/pinctrl-at91.c
554
return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1);
drivers/pinctrl/pinctrl-at91.c
567
writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
drivers/pinctrl/pinctrl-at91.c
572
return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1;
drivers/pinctrl/pinctrl-at91.c
577
unsigned tmp = readl_relaxed(reg);
drivers/pinctrl/pinctrl-at91.c
614
unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
drivers/pinctrl/pinctrl-at91.c
624
unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
drivers/pinctrl/pinctrl-at91.c
634
unsigned tmp = readl_relaxed(reg);
drivers/pinctrl/pinctrl-at91.c
679
tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
drivers/pinctrl/pinctrl-at91.c
698
tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
drivers/pinctrl/pinctrl-bm1880.c
1162
regval = readl_relaxed(pctrl->base + BM1880_REG_MUX + offset);
drivers/pinctrl/pinctrl-bm1880.c
1213
regval = readl_relaxed(pctrl->base + BM1880_REG_MUX + offset);
drivers/pinctrl/pinctrl-bm1880.c
996
u32 regval = readl_relaxed(pctrl->base + BM1880_REG_MUX +
drivers/pinctrl/pinctrl-eic7700.c
334
value = readl_relaxed(pc->base + EIC7700_PIN_REG(pin));
drivers/pinctrl/pinctrl-eic7700.c
378
value = readl_relaxed(pc->base + EIC7700_PIN_REG(pin));
drivers/pinctrl/pinctrl-eic7700.c
440
u32 value = readl_relaxed(pc->base + EIC7700_PIN_REG(pin)) & EIC7700_PINCONF;
drivers/pinctrl/pinctrl-eic7700.c
504
value = readl_relaxed(pc->base + EIC7700_PIN_REG(group_selector));
drivers/pinctrl/pinctrl-eic7700.c
531
value = readl_relaxed(pc->base + EIC7700_PIN_REG(offset));
drivers/pinctrl/pinctrl-eic7700.c
647
rgmii0_mode = readl_relaxed(pc->base + EIC7700_RGMII0_SEL_MODE);
drivers/pinctrl/pinctrl-eic7700.c
648
rgmii1_mode = readl_relaxed(pc->base + EIC7700_RGMII1_SEL_MODE);
drivers/pinctrl/pinctrl-th1520.c
394
pad = readl_relaxed(padcfg);
drivers/pinctrl/pinctrl-th1520.c
395
mux = readl_relaxed(muxcfg);
drivers/pinctrl/pinctrl-th1520.c
585
tmp = readl_relaxed(padcfg);
drivers/pinctrl/pinctrl-th1520.c
605
value = readl_relaxed(th1520_padcfg(thp, pin));
drivers/pinctrl/pinctrl-th1520.c
753
u32 value = readl_relaxed(th1520_padcfg(thp, pin));
drivers/pinctrl/pinctrl-th1520.c
793
tmp = readl_relaxed(muxcfg);
drivers/pinctrl/pxa/pinctrl-pxa2xx.c
162
val = readl_relaxed(gafr);
drivers/pinctrl/pxa/pinctrl-pxa2xx.c
166
val = readl_relaxed(gpdr);
drivers/pinctrl/pxa/pinctrl-pxa2xx.c
194
val = readl_relaxed(pgsr) & BIT(pin % 32);
drivers/pinctrl/pxa/pinctrl-pxa2xx.c
230
val = readl_relaxed(pgsr);
drivers/pinctrl/pxa/pinctrl-pxa2xx.c
99
val = readl_relaxed(gpdr);
drivers/pinctrl/realtek/pinctrl-rtd.c
93
val = readl_relaxed(data->base + mux->mux_offset);
drivers/pinctrl/spacemit/pinctrl-k1.c
471
value = readl_relaxed(reg) & ~PAD_MUX;
drivers/pinctrl/spacemit/pinctrl-k1.c
648
mux = readl_relaxed(reg) & PAD_MUX;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1067
value = readl_relaxed(ie) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1085
value = readl_relaxed(ie) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1103
value = readl_relaxed(ie) | mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1153
irq_type |= readl_relaxed(base + GPIOIS) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1155
edge_both |= readl_relaxed(base + GPIOIBE) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1157
polarity |= readl_relaxed(base + GPIOIEV) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1183
mis = readl_relaxed(sfp->base + GPIOMIS + 0);
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1187
mis = readl_relaxed(sfp->base + GPIOMIS + 4);
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
464
dout = readl_relaxed(reg + 0x000);
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
465
doen = readl_relaxed(reg + 0x004);
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
697
return readl_relaxed(reg) >> shift;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
713
value |= readl_relaxed(reg) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
918
if (readl_relaxed(doen) == GPO_ENABLE)
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
968
return !!(readl_relaxed(din) & BIT(gpio % 32));
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-aon.c
103
mis = readl_relaxed(sfp->base + JH7110_AON_GPIOMIS);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c
304
func |= readl_relaxed(reg) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c
326
grp |= readl_relaxed(reg) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c
367
mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS0);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c
371
mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS1);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
106
u32 dout = readl_relaxed(sfp->base + info->dout_reg_base + offset);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
107
u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
108
u32 gpi = readl_relaxed(sfp->base + info->gpi_reg_base + offset);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
281
dout |= readl_relaxed(reg_dout) & ~dout_mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
283
doen |= readl_relaxed(reg_doen) & ~done_mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
286
ival |= readl_relaxed(reg_din) & ~imask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
367
value |= readl_relaxed(reg) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
389
padcfg = readl_relaxed(sfp->base + padcfg_base + 4 * pin);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
530
value = readl_relaxed(sfp->base + padcfg_base + 4 * pin);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
553
u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset);
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
607
return !!(readl_relaxed(reg) & BIT(gpio % 32));
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
623
dout |= readl_relaxed(reg_dout) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
700
value = readl_relaxed(ic) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
718
value = readl_relaxed(ie) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
739
value = readl_relaxed(ie) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
742
value = readl_relaxed(ic) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
762
value = readl_relaxed(ie) | mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
813
irq_type |= readl_relaxed(base + irq_reg->is_reg_base) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
816
edge_both |= readl_relaxed(base + irq_reg->ibe_reg_base) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
819
polarity |= readl_relaxed(base + irq_reg->iev_reg_base) & ~mask;
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
976
sfp->saved_regs[i] = readl_relaxed(sfp->base + 4 * i);
drivers/pinctrl/stm32/pinctrl-stm32-hdp.c
564
mux = readl_relaxed(hdp->base + HDP_MUX);
drivers/pinctrl/stm32/pinctrl-stm32-hdp.c
674
version = readl_relaxed(hdp->base + HDP_VERR);
drivers/pinctrl/stm32/pinctrl-stm32-hdp.c
695
hdp->gposet_conf = readl_relaxed(hdp->base + HDP_GPOSET);
drivers/pinctrl/stm32/pinctrl-stm32.c
1099
val = readl_relaxed(bank->base + STM32_GPIO_TYPER);
drivers/pinctrl/stm32/pinctrl-stm32.c
1120
val = readl_relaxed(bank->base + STM32_GPIO_TYPER);
drivers/pinctrl/stm32/pinctrl-stm32.c
1145
val = readl_relaxed(bank->base + STM32_GPIO_SPEEDR);
drivers/pinctrl/stm32/pinctrl-stm32.c
1166
val = readl_relaxed(bank->base + STM32_GPIO_SPEEDR);
drivers/pinctrl/stm32/pinctrl-stm32.c
1191
val = readl_relaxed(bank->base + STM32_GPIO_PUPDR);
drivers/pinctrl/stm32/pinctrl-stm32.c
1212
val = readl_relaxed(bank->base + STM32_GPIO_PUPDR);
drivers/pinctrl/stm32/pinctrl-stm32.c
1225
val = readl_relaxed(bank->base + advcfgr_offset);
drivers/pinctrl/stm32/pinctrl-stm32.c
1272
val = readl_relaxed(bank->base + advcfgr_offset);
drivers/pinctrl/stm32/pinctrl-stm32.c
1330
val = readl_relaxed(bank->base + delay_offset);
drivers/pinctrl/stm32/pinctrl-stm32.c
1355
val = readl_relaxed(bank->base + delay_offset);
drivers/pinctrl/stm32/pinctrl-stm32.c
1373
val = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) &
drivers/pinctrl/stm32/pinctrl-stm32.c
1376
val = !!(readl_relaxed(bank->base + STM32_GPIO_ODR) &
drivers/pinctrl/stm32/pinctrl-stm32.c
271
cid = readl_relaxed(bank->base + STM32_GPIO_CIDCFGR(gpio_nr));
drivers/pinctrl/stm32/pinctrl-stm32.c
293
cid = readl_relaxed(bank->base + STM32_GPIO_CIDCFGR(gpio_nr));
drivers/pinctrl/stm32/pinctrl-stm32.c
308
sem = readl_relaxed(bank->base + STM32_GPIO_SEMCR(gpio_nr));
drivers/pinctrl/stm32/pinctrl-stm32.c
318
sem = readl_relaxed(bank->base + STM32_GPIO_SEMCR(gpio_nr));
drivers/pinctrl/stm32/pinctrl-stm32.c
330
cid = readl_relaxed(bank->base + STM32_GPIO_CIDCFGR(gpio_nr));
drivers/pinctrl/stm32/pinctrl-stm32.c
387
return !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset));
drivers/pinctrl/stm32/pinctrl-stm32.c
456
sec = readl_relaxed(bank->base + STM32_GPIO_SECCFGR);
drivers/pinctrl/stm32/pinctrl-stm32.c
956
val = readl_relaxed(bank->base + alt_offset);
drivers/pinctrl/stm32/pinctrl-stm32.c
961
val = readl_relaxed(bank->base + STM32_GPIO_MODER);
drivers/pinctrl/stm32/pinctrl-stm32.c
983
val = readl_relaxed(bank->base + alt_offset);
drivers/pinctrl/stm32/pinctrl-stm32.c
987
val = readl_relaxed(bank->base + STM32_GPIO_MODER);
drivers/pinctrl/tegra/pinctrl-tegra.c
780
*backup_regs++ = readl_relaxed(regs++);
drivers/pinctrl/tegra/pinctrl-tegra.c
802
readl_relaxed(pmx->regs[0]);
drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c
107
val = readl_relaxed(reg);
drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c
62
*conf = field_get(mask, readl_relaxed(pctrl->base + reg_offset));
drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c
88
val = readl_relaxed(reg);
drivers/pinctrl/vt8500/pinctrl-wmt.c
31
val = readl_relaxed(data->base + reg);
drivers/pinctrl/vt8500/pinctrl-wmt.c
41
val = readl_relaxed(data->base + reg);
drivers/pinctrl/vt8500/pinctrl-wmt.c
487
val = readl_relaxed(data->base + reg_dir);
drivers/pinctrl/vt8500/pinctrl-wmt.c
506
return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit));
drivers/pmdomain/qcom/cpr.c
265
return readl_relaxed(drv->base + offset);
drivers/pmdomain/qcom/cpr.c
273
val = readl_relaxed(drv->base + offset);
drivers/pmdomain/samsung/exynos-pm-domains.c
140
on = readl_relaxed(pd->base + 0x4) & pd->local_pwr_cfg;
drivers/pmdomain/samsung/exynos-pm-domains.c
52
while ((readl_relaxed(base + 0x4) & pd->local_pwr_cfg) != pwr) {
drivers/pmdomain/ti/omap_prm.c
512
readl_relaxed(prmd->prm->base + prmd->pwrstctrl),
drivers/pmdomain/ti/omap_prm.c
513
readl_relaxed(prmd->prm->base + prmd->pwrstst));
drivers/pmdomain/ti/omap_prm.c
537
v = readl_relaxed(prmd->prm->base + prmd->pwrstctrl);
drivers/pmdomain/ti/omap_prm.c
578
v = readl_relaxed(prmd->prm->base + prmd->pwrstctrl);
drivers/pmdomain/ti/omap_prm.c
766
v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl);
drivers/pmdomain/ti/omap_prm.c
774
v = readl_relaxed(reset->prm->base + reset->prm->data->rstst);
drivers/pmdomain/ti/omap_prm.c
790
v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl);
drivers/pmdomain/ti/omap_prm.c
829
v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl);
drivers/pmdomain/ti/omap_prm.c
934
v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl);
drivers/power/reset/at91-reset.c
264
val = readl_relaxed(reset->dev_base);
drivers/power/reset/at91-reset.c
293
val = readl_relaxed(reset->dev_base);
drivers/pwm/pwm-atmel.c
104
return readl_relaxed(chip->base + offset);
drivers/pwm/pwm-berlin.c
64
return readl_relaxed(bpc->base + channel * 0x10 + offset);
drivers/pwm/pwm-brcmstb.c
65
return readl_relaxed(p->base + offset);
drivers/pwm/pwm-imx27.c
325
val = FIELD_GET(MX3_PWMSR_FIFOAV, readl_relaxed(imx->mmio_base + MX3_PWMSR));
drivers/pwm/pwm-imx27.c
334
val = readl_relaxed(imx->mmio_base + MX3_PWMCNR);
drivers/pwm/pwm-rockchip.c
135
ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl);
drivers/pwm/pwm-rockchip.c
178
val = readl_relaxed(pc->base + pc->data->regs.ctrl);
drivers/pwm/pwm-rockchip.c
354
ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl);
drivers/pwm/pwm-rockchip.c
83
tmp = readl_relaxed(pc->base + pc->data->regs.period);
drivers/pwm/pwm-rockchip.c
87
tmp = readl_relaxed(pc->base + pc->data->regs.duty);
drivers/pwm/pwm-rockchip.c
91
val = readl_relaxed(pc->base + pc->data->regs.ctrl);
drivers/pwm/pwm-spear.c
226
val = readl_relaxed(pc->mmio_base + PWMMCR);
drivers/pwm/pwm-spear.c
65
return readl_relaxed(chip->mmio_base + (num << 4) + offset);
drivers/pwm/pwm-sprd.c
59
return readl_relaxed(spc->base + offset);
drivers/regulator/stm32-pwr.c
50
val = readl_relaxed(priv->base + REG_PWR_CR3);
drivers/regulator/stm32-pwr.c
60
val = readl_relaxed(priv->base + REG_PWR_CR3);
drivers/regulator/stm32-pwr.c
71
val = readl_relaxed(priv->base + REG_PWR_CR3);
drivers/regulator/stm32-pwr.c
90
val = readl_relaxed(priv->base + REG_PWR_CR3);
drivers/regulator/stm32-vrefbuf.c
103
ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
drivers/regulator/stm32-vrefbuf.c
121
val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
drivers/regulator/stm32-vrefbuf.c
140
val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
drivers/regulator/stm32-vrefbuf.c
51
val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
drivers/regulator/stm32-vrefbuf.c
65
val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
drivers/regulator/stm32-vrefbuf.c
85
val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
drivers/remoteproc/mtk_scp_ipi.c
104
val = readl_relaxed(dst + len - remain);
drivers/remoteproc/mtk_scp_ipi.c
95
val = readl_relaxed(ptr);
drivers/remoteproc/pru_rproc.c
137
return readl_relaxed(pru->mem_regions[PRU_IOMEM_CTRL].va + reg);
drivers/remoteproc/pru_rproc.c
375
return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg);
drivers/remoteproc/st_slim_rproc.c
140
hw_id = readl_relaxed(slim_rproc->slimcore + SLIM_ID_OFST);
drivers/remoteproc/st_slim_rproc.c
141
hw_ver = readl_relaxed(slim_rproc->slimcore + SLIM_VER_OFST);
drivers/resctrl/mpam_devices.c
184
return readl_relaxed(msc->mapped_hwpage + reg);
drivers/reset/reset-brcmstb.c
73
return readl_relaxed(priv->base + off + SW_INIT_STATUS) &
drivers/reset/reset-ma35d1.c
147
reg = readl_relaxed(data->base + ma35d1_reset_map[id].reg_ofs);
drivers/reset/reset-ma35d1.c
176
reg = readl_relaxed(data->base + ma35d1_reset_map[id].reg_ofs);
drivers/rtc/rtc-at91rm9200.c
87
readl_relaxed(at91_rtc_regs + field)
drivers/rtc/rtc-brcmstb-waketimer.c
140
t->sec = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER);
drivers/rtc/rtc-brcmstb-waketimer.c
141
tmp = readl_relaxed(timer->base + BRCMSTB_WKTMR_PRESCALER_VAL);
drivers/rtc/rtc-brcmstb-waketimer.c
231
if ((int)(readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER) -
drivers/rtc/rtc-brcmstb-waketimer.c
232
readl_relaxed(timer->base + BRCMSTB_WKTMR_ALARM)) >= 0 &&
drivers/rtc/rtc-brcmstb-waketimer.c
52
reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT);
drivers/rtc/rtc-brcmstb-waketimer.c
63
reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER);
drivers/rtc/rtc-brcmstb-waketimer.c
66
(void)readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT);
drivers/rtc/rtc-brcmstb-waketimer.c
85
now = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER);
drivers/rtc/rtc-brcmstb-waketimer.c
91
now = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER);
drivers/rtc/rtc-digicolor.c
119
alarm_reg = readl_relaxed(rtc->regs + DC_RTC_ALARM);
drivers/rtc/rtc-digicolor.c
120
reference = readl_relaxed(rtc->regs + DC_RTC_REFERENCE);
drivers/rtc/rtc-digicolor.c
128
alarm->enabled = readl_relaxed(rtc->regs + DC_RTC_INTENABLE);
drivers/rtc/rtc-digicolor.c
141
reference = readl_relaxed(rtc->regs + DC_RTC_REFERENCE);
drivers/rtc/rtc-digicolor.c
69
reference = readl_relaxed(rtc->regs + DC_RTC_REFERENCE);
drivers/rtc/rtc-digicolor.c
70
time1 = readl_relaxed(rtc->regs + DC_RTC_TIME);
drivers/rtc/rtc-digicolor.c
73
time2 = readl_relaxed(rtc->regs + DC_RTC_TIME);
drivers/rtc/rtc-mt7622.c
114
return readl_relaxed(rtc->base + reg);
drivers/rtc/rtc-rtd119x.c
193
val = readl_relaxed(data->base + RTD_RTCACR);
drivers/rtc/rtc-rtd119x.c
59
val = readl_relaxed(data->base + RTD_RTCCR);
drivers/rtc/rtc-rtd119x.c
72
val = readl_relaxed(data->base + RTD_RTCEN);
drivers/rtc/rtc-rtd119x.c
91
tm->tm_sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1;
drivers/rtc/rtc-rtd119x.c
92
tm->tm_min = readl_relaxed(data->base + RTD_RTCMIN) & RTD_RTCMIN_RTCMIN_MASK;
drivers/rtc/rtc-rtd119x.c
93
tm->tm_hour = readl_relaxed(data->base + RTD_RTCHR) & RTD_RTCHR_RTCHR_MASK;
drivers/rtc/rtc-rtd119x.c
94
day = readl_relaxed(data->base + RTD_RTCDATE1) & RTD_RTCDATE1_RTCDATE1_MASK;
drivers/rtc/rtc-rtd119x.c
95
day |= (readl_relaxed(data->base + RTD_RTCDATE2) & RTD_RTCDATE2_RTCDATE2_MASK) << 8;
drivers/rtc/rtc-rtd119x.c
96
sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1;
drivers/rtc/rtc-sa1100.c
112
rtc_time64_to_tm(readl_relaxed(info->rcnr), tm);
drivers/rtc/rtc-sa1100.c
130
rtsr = readl_relaxed(info->rtsr);
drivers/rtc/rtc-sa1100.c
141
writel_relaxed(readl_relaxed(info->rtsr) &
drivers/rtc/rtc-sa1100.c
145
writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr);
drivers/rtc/rtc-sa1100.c
147
writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr);
drivers/rtc/rtc-sa1100.c
157
seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr));
drivers/rtc/rtc-sa1100.c
158
seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr));
drivers/rtc/rtc-sa1100.c
194
if (readl_relaxed(info->rttr) == 0) {
drivers/rtc/rtc-sa1100.c
53
rtsr = readl_relaxed(info->rtsr);
drivers/rtc/rtc-sa1100.c
98
rtsr = readl_relaxed(info->rtsr);
drivers/rtc/rtc-st-lpc.c
89
lpt_msb = readl_relaxed(rtc->ioaddr + LPC_LPT_MSB_OFF);
drivers/rtc/rtc-st-lpc.c
90
lpt_lsb = readl_relaxed(rtc->ioaddr + LPC_LPT_LSB_OFF);
drivers/rtc/rtc-st-lpc.c
91
} while (readl_relaxed(rtc->ioaddr + LPC_LPT_MSB_OFF) != lpt_msb);
drivers/rtc/rtc-stm32.c
1018
cr = readl_relaxed(rtc->base + regs->cr);
drivers/rtc/rtc-stm32.c
1020
prer = readl_relaxed(rtc->base + regs->prer);
drivers/rtc/rtc-stm32.c
1189
if (!(readl_relaxed(rtc->base + regs->isr) & STM32_RTC_ISR_INITS))
drivers/rtc/rtc-stm32.c
1193
u32 ver = readl_relaxed(rtc->base + regs->verr);
drivers/rtc/rtc-stm32.c
1225
cr = readl_relaxed(rtc->base + regs->cr);
drivers/rtc/rtc-stm32.c
255
unsigned int cr = readl_relaxed(rtc->base + regs.cr);
drivers/rtc/rtc-stm32.c
256
unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr);
drivers/rtc/rtc-stm32.c
296
unsigned int cr = readl_relaxed(rtc->base + regs.cr);
drivers/rtc/rtc-stm32.c
297
unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr);
drivers/rtc/rtc-stm32.c
408
unsigned int isr = readl_relaxed(rtc->base + regs->isr);
drivers/rtc/rtc-stm32.c
431
unsigned int isr = readl_relaxed(rtc->base + regs->isr);
drivers/rtc/rtc-stm32.c
440
unsigned int isr = readl_relaxed(rtc->base + regs->isr);
drivers/rtc/rtc-stm32.c
470
status = readl_relaxed(rtc->base + regs->sr);
drivers/rtc/rtc-stm32.c
471
cr = readl_relaxed(rtc->base + regs->cr);
drivers/rtc/rtc-stm32.c
533
tr = readl_relaxed(rtc->base + regs->tr);
drivers/rtc/rtc-stm32.c
534
dr = readl_relaxed(rtc->base + regs->dr);
drivers/rtc/rtc-stm32.c
600
alrmar = readl_relaxed(rtc->base + regs->alrmar);
drivers/rtc/rtc-stm32.c
601
cr = readl_relaxed(rtc->base + regs->cr);
drivers/rtc/rtc-stm32.c
602
status = readl_relaxed(rtc->base + regs->sr);
drivers/rtc/rtc-stm32.c
667
cr = readl_relaxed(rtc->base + regs->cr);
drivers/rtc/rtc-stm32.c
759
cr = readl_relaxed(rtc->base + regs->cr);
drivers/rtc/rtc-stm32.c
801
writel_relaxed(readl_relaxed(rtc->base + regs->isr) & ~flags,
drivers/rtc/rtc-stm32.c
930
unsigned int cr = readl_relaxed(rtc->base + regs.cr);
drivers/rtc/rtc-stm32.c
943
unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr);
drivers/rtc/rtc-stm32.c
954
u32 rxcidcfgr = readl_relaxed(stm32_rtc->base + STM32_RTC_RXCIDCFGR(res.num));
drivers/rtc/rtc-stm32.c
963
seccfgr = readl_relaxed(stm32_rtc->base + STM32_RTC_SECCFGR);
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
740
return readl_relaxed(regs);
drivers/scsi/qla2xxx/qla_def.h
185
return readl_relaxed(addr);
drivers/slimbus/qcom-ngd-ctrl.c
1151
u32 cfg = readl_relaxed(ctrl->ngd->base);
drivers/slimbus/qcom-ngd-ctrl.c
1192
ctrl->ver = readl_relaxed(ctrl->base);
drivers/slimbus/qcom-ngd-ctrl.c
1196
laddr = readl_relaxed(ngd->base + NGD_STATUS);
drivers/slimbus/qcom-ngd-ctrl.c
1217
rx_msgq = readl_relaxed(ngd->base + NGD_RX_MSGQ_CFG);
drivers/soc/amlogic/meson-canvas.c
49
return readl_relaxed(canvas->reg_base + reg);
drivers/soc/apple/mailbox.c
111
mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->a2i_control);
drivers/soc/apple/mailbox.c
153
mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->a2i_control);
drivers/soc/apple/mailbox.c
190
u32 mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->i2a_control);
drivers/soc/apple/mailbox.c
200
mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->i2a_control);
drivers/soc/bcm/brcmstb/biuctrl.c
67
return readl_relaxed(cpubiuctrl_base + offset);
drivers/soc/dove/pmu.c
157
val &= readl_relaxed(pmu_base + PMU_ISO);
drivers/soc/dove/pmu.c
164
val &= readl_relaxed(pmc_base + PMC_SW_RST);
drivers/soc/dove/pmu.c
169
val = readl_relaxed(pmu_base + PMU_PWR) | pmu_dom->pwr_mask;
drivers/soc/dove/pmu.c
189
val = ~pmu_dom->pwr_mask & readl_relaxed(pmu_base + PMU_PWR);
drivers/soc/dove/pmu.c
195
val |= readl_relaxed(pmc_base + PMC_SW_RST);
drivers/soc/dove/pmu.c
202
val |= readl_relaxed(pmu_base + PMU_ISO);
drivers/soc/dove/pmu.c
214
unsigned int val = readl_relaxed(domain->pmu->pmu_base + PMU_PWR);
drivers/soc/dove/pmu.c
232
u32 stat = readl_relaxed(base + PMC_IRQ_CAUSE) & gc->mask_cache;
drivers/soc/dove/pmu.c
261
done &= readl_relaxed(base + PMC_IRQ_CAUSE);
drivers/soc/dove/pmu.c
55
val = readl_relaxed(pmu->pmc_base + PMC_SW_RST);
drivers/soc/dove/pmu.c
70
val &= readl_relaxed(pmu->pmc_base + PMC_SW_RST);
drivers/soc/dove/pmu.c
84
val |= readl_relaxed(pmu->pmc_base + PMC_SW_RST);
drivers/soc/fsl/dpio/qbman-portal.c
178
return readl_relaxed(p->addr_cinh + offset);
drivers/soc/imx/soc-imx8m.c
100
socuid[0] = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + IMX8MP_OCOTP_UID_OFFSET);
drivers/soc/imx/soc-imx8m.c
102
socuid[0] |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + IMX8MP_OCOTP_UID_OFFSET);
drivers/soc/imx/soc-imx8m.c
104
socuid[1] = readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_HIGH + 0x10);
drivers/soc/imx/soc-imx8m.c
106
socuid[1] |= readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_HIGH);
drivers/soc/imx/soc-imx8m.c
124
*socrev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM);
drivers/soc/imx/soc-imx8m.c
65
*socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
drivers/soc/imx/soc-imx8m.c
67
*socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
drivers/soc/imx/soc-imx8m.c
85
magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
drivers/soc/mediatek/mtk-mmsys.c
180
tmp = readl_relaxed(mmsys->regs + offset);
drivers/soc/mediatek/mtk-mutex.c
1061
reg = readl_relaxed(mtx->regs + offset);
drivers/soc/mediatek/mtk-mutex.c
929
reg = readl_relaxed(mtx->regs + offset);
drivers/soc/mediatek/mtk-mutex.c
969
reg = readl_relaxed(mtx->regs + offset);
drivers/soc/mediatek/mtk-svs.c
560
return readl_relaxed(svsp->base + svsp->regs[rg_i]);
drivers/soc/qcom/qcom-geni-se.c
301
return readl_relaxed(wrapper->base + QUPV3_HW_VER_REG);
drivers/soc/qcom/qcom-geni-se.c
309
val = readl_relaxed(base + SE_IRQ_EN);
drivers/soc/qcom/qcom-geni-se.c
314
val = readl_relaxed(base + SE_GENI_DMA_MODE_EN);
drivers/soc/qcom/qcom-geni-se.c
325
val = readl_relaxed(base + SE_GENI_CGC_CTRL);
drivers/soc/qcom/qcom-geni-se.c
329
val = readl_relaxed(base + SE_DMA_GENERAL_CFG);
drivers/soc/qcom/qcom-geni-se.c
368
val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
drivers/soc/qcom/qcom-geni-se.c
372
val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN);
drivers/soc/qcom/qcom-geni-se.c
388
val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
drivers/soc/qcom/qcom-geni-se.c
395
val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);
drivers/soc/qcom/qcom-geni-se.c
411
val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
drivers/soc/qcom/qcom-geni-se.c
418
val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);
drivers/soc/qcom/qcom_stats.c
196
entry_count = readl_relaxed(reg + DDR_STATS_NUM_MODES_ADDR);
drivers/soc/qcom/qcom_stats.c
237
key = readl_relaxed(reg + config->ddr_stats_offset + DDR_STATS_MAGIC_KEY_ADDR);
drivers/soc/qcom/rpmh-rsc.c
1066
rsc_id = readl_relaxed(drv->base + RSC_DRV_ID);
drivers/soc/qcom/rpmh-rsc.c
1100
solver_config = readl_relaxed(drv->base + drv->regs[DRV_SOLVER_CONFIG]);
drivers/soc/qcom/rpmh-rsc.c
210
return readl_relaxed(tcs_cmd_addr(drv, reg, tcs_id, cmd_id));
drivers/soc/qcom/rpmh-rsc.c
215
return readl_relaxed(tcs_reg_addr(drv, reg, tcs_id));
drivers/soc/qcom/rpmh-rsc.c
422
data = readl_relaxed(drv->tcs_base + reg);
drivers/soc/qcom/rpmh-rsc.c
447
irq_status = readl_relaxed(drv->tcs_base + drv->regs[RSC_DRV_IRQ_STATUS]);
drivers/soc/qcom/rpmh-rsc.c
976
config = readl_relaxed(drv->base + drv->regs[DRV_PRNT_CHLD_CONFIG]);
drivers/soc/qcom/smem.c
1208
size = readl_relaxed(&header->available) + readl_relaxed(&header->free_offset);
drivers/soc/qcom/spm.c
276
ret = readl_relaxed(drv->reg_base +
drivers/soc/qcom/spm.c
287
return readl_relaxed(drv->reg_base + drv->reg_data->reg_offset[reg]);
drivers/soc/samsung/exynos-pmu.c
55
return readl_relaxed(pmu_base_addr + offset);
drivers/soc/tegra/flowctrl.c
48
readl_relaxed(tegra_flowctrl_base + offset);
drivers/soc/tegra/fuse/fuse-tegra.c
370
reg = readl_relaxed(base + 0x48);
drivers/soc/tegra/fuse/fuse-tegra20.c
32
return readl_relaxed(fuse->base + FUSE_BEGIN + offset);
drivers/soc/tegra/fuse/fuse-tegra30.c
48
return readl_relaxed(fuse->base + FUSE_BEGIN + offset);
drivers/soc/tegra/fuse/fuse-tegra30.c
60
value = readl_relaxed(fuse->base + FUSE_BEGIN + offset);
drivers/soc/tegra/fuse/tegra-apbmisc.c
211
strapping = readl_relaxed(strapping_base);
drivers/soc/tegra/fuse/tegra-apbmisc.c
45
chipid = readl_relaxed(apbmisc_base + 4);
drivers/soc/ti/knav_dma.c
214
value = readl_relaxed(&chan->reg_chan->control);
drivers/soc/ti/knav_dma.c
219
if (readl_relaxed(&chan->reg_chan->control) & DMA_ENABLE) {
drivers/soc/ti/knav_dma.c
275
v = readl_relaxed(&dma->reg_global->perf_control);
drivers/soc/ti/knav_qmss_acc.c
121
notifies = readl_relaxed(pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
drivers/soc/ti/knav_qmss_acc.c
294
result = readl_relaxed(&pdsp->acc_command->command);
drivers/soc/ti/knav_qmss_queue.c
1540
val = readl_relaxed(&pdsp->regs->control) & ~PDSP_CTRL_ENABLE;
drivers/soc/ti/knav_qmss_queue.c
1600
while (readl_relaxed(pdsp->command) != 0xffffffff)
drivers/soc/ti/knav_qmss_queue.c
1604
val = readl_relaxed(&pdsp->regs->control);
drivers/soc/ti/knav_qmss_queue.c
1609
val = readl_relaxed(&pdsp->regs->control) | PDSP_CTRL_ENABLE;
drivers/soc/ti/knav_qmss_queue.c
421
return readl_relaxed(&qh->reg_peek[0].entry_count) +
drivers/soc/ti/knav_qmss_queue.c
488
val = readl_relaxed(addr);
drivers/soc/ti/knav_qmss_queue.c
668
val = readl_relaxed(&qh->reg_pop[0].ptr_size_thresh);
drivers/spi/atmel-quadspi.c
397
u32 value = readl_relaxed(aq->regs + offset);
drivers/spi/spi-apple.c
136
return readl_relaxed(spi->regs + offset);
drivers/spi/spi-at91-usart.c
68
readl_relaxed((port)->regs + US_##reg)
drivers/spi/spi-atmel.c
226
readl_relaxed((port)->regs + SPI_##reg)
drivers/spi/spi-axi-spi-engine.c
1035
reg = readl_relaxed(spi_engine->base +
drivers/spi/spi-axi-spi-engine.c
1049
reg = readl_relaxed(spi_engine->base +
drivers/spi/spi-axi-spi-engine.c
560
n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_CMD_FIFO_ROOM);
drivers/spi/spi-axi-spi-engine.c
581
n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_SDO_FIFO_ROOM);
drivers/spi/spi-axi-spi-engine.c
623
n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_SDI_FIFO_LEVEL);
drivers/spi/spi-axi-spi-engine.c
630
buf[i] = readl_relaxed(addr);
drivers/spi/spi-axi-spi-engine.c
638
buf[i] = readl_relaxed(addr);
drivers/spi/spi-axi-spi-engine.c
646
buf[i] = readl_relaxed(addr);
drivers/spi/spi-axi-spi-engine.c
667
pending = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_INT_PENDING);
drivers/spi/spi-axi-spi-engine.c
672
completed_id = readl_relaxed(
drivers/spi/spi-axiado.c
33
return readl_relaxed(xspi->regs + offset);
drivers/spi/spi-bcm-qspi.h
67
return readl_relaxed(addr);
drivers/spi/spi-cadence.c
145
return readl_relaxed(xspi->regs + offset);
drivers/spi/spi-dw-core.c
592
entries = readl_relaxed(dws->regs + DW_SPI_TXFLR);
drivers/spi/spi-dw-core.c
610
entries = readl_relaxed(dws->regs + DW_SPI_RXFLR);
drivers/spi/spi-dw-core.c
612
sts = readl_relaxed(dws->regs + DW_SPI_RISR);
drivers/spi/spi-dw.h
222
return readl_relaxed(dws->regs + offset);
drivers/spi/spi-geni-qcom.c
934
dma_tx_status = readl_relaxed(se->base + SE_DMA_TX_IRQ_STAT);
drivers/spi/spi-geni-qcom.c
935
dma_rx_status = readl_relaxed(se->base + SE_DMA_RX_IRQ_STAT);
drivers/spi/spi-meson-spicc.c
167
writel_relaxed((readl_relaxed(addr) & ~(mask)) | (val), addr)
drivers/spi/spi-meson-spicc.c
227
conf = readl_relaxed(spicc->base + SPICC_ENH_CTL0) |
drivers/spi/spi-meson-spicc.c
359
if (readl_relaxed(spicc->base + SPICC_DMAREG) & SPICC_DMA_ENABLE)
drivers/spi/spi-meson-spicc.c
378
readl_relaxed(spicc->base + SPICC_STATREG));
drivers/spi/spi-meson-spicc.c
384
readl_relaxed(spicc->base + SPICC_STATREG));
drivers/spi/spi-meson-spicc.c
426
readl_relaxed(spicc->base + SPICC_RXDATA));
drivers/spi/spi-meson-spicc.c
498
readl_relaxed(spicc->base + SPICC_ENH_CTL0));
drivers/spi/spi-meson-spicc.c
503
readl_relaxed(spicc->base + SPICC_CONREG));
drivers/spi/spi-meson-spicc.c
525
conf = readl_relaxed(spicc->base + SPICC_TESTREG);
drivers/spi/spi-meson-spicc.c
539
conf = conf_orig = readl_relaxed(spicc->base + SPICC_CONREG);
drivers/spi/spi-meson-spicc.c
567
readl_relaxed(spicc->base + SPICC_RXDATA);
drivers/spi/spi-meson-spicc.c
656
u32 conf = readl_relaxed(spicc->base + SPICC_CONREG) & SPICC_DATARATE_MASK;
drivers/spi/spi-meson-spicc.c
721
u32 conf = readl_relaxed(spicc->base + SPICC_CONREG) & SPICC_DATARATE_MASK;
drivers/spi/spi-microchip-core-qspi.c
134
u32 control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
206
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
216
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_RXFIFOEMPTY)
drivers/spi/spi-microchip-core-qspi.c
218
data = readl_relaxed(qspi->regs + REG_X4_RX_DATA);
drivers/spi/spi-microchip-core-qspi.c
228
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_RXFIFOEMPTY)
drivers/spi/spi-microchip-core-qspi.c
230
data = readl_relaxed(qspi->regs + REG_RX_DATA);
drivers/spi/spi-microchip-core-qspi.c
239
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
244
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_TXFIFOFULL)
drivers/spi/spi-microchip-core-qspi.c
256
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_TXFIFOFULL)
drivers/spi/spi-microchip-core-qspi.c
269
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
274
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_TXFIFOFULL)
drivers/spi/spi-microchip-core-qspi.c
293
if (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_RXAVAILABLE) {
drivers/spi/spi-microchip-core-qspi.c
294
data = readl_relaxed(qspi->regs + REG_X4_RX_DATA);
drivers/spi/spi-microchip-core-qspi.c
308
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_RXFIFOEMPTY)
drivers/spi/spi-microchip-core-qspi.c
310
data = readl_relaxed(qspi->regs + REG_X4_RX_DATA);
drivers/spi/spi-microchip-core-qspi.c
329
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_TXFIFOFULL)
drivers/spi/spi-microchip-core-qspi.c
337
while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_RXFIFOEMPTY)
drivers/spi/spi-microchip-core-qspi.c
339
data = readl_relaxed(qspi->regs + REG_RX_DATA);
drivers/spi/spi-microchip-core-qspi.c
362
int intfield = readl_relaxed(qspi->regs + REG_STATUS) & STATUS_MASK;
drivers/spi/spi-microchip-core-qspi.c
405
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
409
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
467
ctrl = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
644
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
662
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
678
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
782
val = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-microchip-core-qspi.c
789
val = readl_relaxed(qspi->regs + REG_DIRECT_ACCESS);
drivers/spi/spi-microchip-core-qspi.c
809
control = readl_relaxed(qspi->regs + REG_CONTROL);
drivers/spi/spi-mxs.c
132
reg = readl_relaxed(ssp->base + offset);
drivers/spi/spi-omap2-mcspi.c
1333
readl_relaxed(cs->base + OMAP2_MCSPI_CHCONF0);
drivers/spi/spi-omap2-mcspi.c
161
return readl_relaxed(mcspi->base + idx);
drivers/spi/spi-omap2-mcspi.c
176
return readl_relaxed(cs->base + idx);
drivers/spi/spi-omap2-mcspi.c
366
while (!(readl_relaxed(reg) & bit)) {
drivers/spi/spi-omap2-mcspi.c
368
if (!(readl_relaxed(reg) & bit))
drivers/spi/spi-omap2-mcspi.c
756
*rx++ = readl_relaxed(rx_reg);
drivers/spi/spi-omap2-mcspi.c
770
*rx++ = readl_relaxed(rx_reg);
drivers/spi/spi-omap2-mcspi.c
805
*rx++ = readl_relaxed(rx_reg);
drivers/spi/spi-omap2-mcspi.c
819
*rx++ = readl_relaxed(rx_reg);
drivers/spi/spi-omap2-mcspi.c
854
*rx++ = readl_relaxed(rx_reg);
drivers/spi/spi-omap2-mcspi.c
868
*rx++ = readl_relaxed(rx_reg);
drivers/spi/spi-qup.c
1014
spi_ioc = readl_relaxed(controller->base + SPI_IO_CONTROL);
drivers/spi/spi-qup.c
1137
iomode = readl_relaxed(base + QUP_IO_M_MODES);
drivers/spi/spi-qup.c
1251
config = readl_relaxed(controller->base + QUP_CONFIG);
drivers/spi/spi-qup.c
165
u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL);
drivers/spi/spi-qup.c
186
u32 opstate = readl_relaxed(controller->base + QUP_STATE);
drivers/spi/spi-qup.c
226
cur_state = readl_relaxed(controller->base + QUP_STATE);
drivers/spi/spi-qup.c
261
word = readl_relaxed(controller->base + QUP_INPUT_FIFO);
drivers/spi/spi-qup.c
334
*opflags = readl_relaxed(controller->base + QUP_OPERATIONAL);
drivers/spi/spi-qup.c
628
qup_err = readl_relaxed(controller->base + QUP_ERROR_FLAGS);
drivers/spi/spi-qup.c
629
spi_err = readl_relaxed(controller->base + SPI_ERROR_FLAGS);
drivers/spi/spi-qup.c
630
opflags = readl_relaxed(controller->base + QUP_OPERATIONAL);
drivers/spi/spi-qup.c
794
iomode = readl_relaxed(controller->base + QUP_IO_M_MODES);
drivers/spi/spi-qup.c
808
control = readl_relaxed(controller->base + SPI_IO_CONTROL);
drivers/spi/spi-qup.c
817
config = readl_relaxed(controller->base + SPI_CONFIG);
drivers/spi/spi-qup.c
840
config = readl_relaxed(controller->base + QUP_CONFIG);
drivers/spi/spi-rockchip.c
209
if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_TARGET_TX_BUSY) &&
drivers/spi/spi-rockchip.c
21
writel_relaxed(readl_relaxed(reg) & ~(bits), reg)
drivers/spi/spi-rockchip.c
210
!((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)))
drivers/spi/spi-rockchip.c
213
if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY))
drivers/spi/spi-rockchip.c
225
ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION);
drivers/spi/spi-rockchip.c
23
writel_relaxed(readl_relaxed(reg) | (bits), reg)
drivers/spi/spi-rockchip.c
249
cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) & 1);
drivers/spi/spi-rockchip.c
251
cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) &
drivers/spi/spi-rockchip.c
300
u32 tx_free = rs->fifo_len - readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFLR);
drivers/spi/spi-rockchip.c
319
u32 words = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR);
drivers/spi/spi-rockchip.c
328
u32 ftl = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFTLR) + 1;
drivers/spi/spi-rockchip.c
338
u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR);
drivers/spi/spi-rockchip.c
358
(readl_relaxed(rs->regs + ROCKCHIP_SPI_ISR) & INT_CS_INACTIVE)) {
drivers/spi/spi-rockchip.c
634
rx_fifo_left = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR);
drivers/spi/spi-rockchip.c
636
readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR);
drivers/spi/spi-rockchip.c
645
rx_fifo_left = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR);
drivers/spi/spi-rockchip.c
647
u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR);
drivers/spi/spi-rockchip.c
686
WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) &&
drivers/spi/spi-rockchip.c
687
(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY));
drivers/spi/spi-rockchip.c
739
cr0 = readl_relaxed(rs->regs + ROCKCHIP_SPI_CTRLR0);
drivers/spi/spi-rockchip.c
889
switch (readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION)) {
drivers/spi/spi-sprd-adi.c
173
sts = readl_relaxed(sadi->base + REG_ADI_ARM_FIFO_STS);
drivers/spi/spi-sprd-adi.c
190
return readl_relaxed(sadi->base + REG_ADI_ARM_FIFO_STS) & BIT_FIFO_FULL;
drivers/spi/spi-sprd-adi.c
251
val = readl_relaxed(sadi->base + REG_ADI_RD_DATA);
drivers/spi/spi-sprd-adi.c
471
tmp = readl_relaxed(sadi->base + REG_ADI_GSSI_CFG0);
drivers/spi/spi-sprd-adi.c
496
value = readl_relaxed(sadi->base + REG_ADI_CHN_EN);
drivers/spi/spi-sprd-adi.c
500
value = readl_relaxed(sadi->base + REG_ADI_CHN_EN1);
drivers/spi/spi-sprd.c
248
u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL1);
drivers/spi/spi-sprd.c
256
u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL0);
drivers/spi/spi-sprd.c
266
u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL8);
drivers/spi/spi-sprd.c
279
u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL10);
drivers/spi/spi-sprd.c
296
val = readl_relaxed(ss->base + SPRD_SPI_CTL0);
drivers/spi/spi-sprd.c
312
val = readl_relaxed(ss->base + SPRD_SPI_CTL4);
drivers/spi/spi-sprd.c
317
val = readl_relaxed(ss->base + SPRD_SPI_CTL4);
drivers/spi/spi-sprd.c
322
val = readl_relaxed(ss->base + SPRD_SPI_CTL4);
drivers/spi/spi-sprd.c
395
rx_p[i] = readl_relaxed(ss->base + SPRD_SPI_TXD);
drivers/spi/spi-sprd.c
464
val = readl_relaxed(ss->base + SPRD_SPI_INT_EN);
drivers/spi/spi-sprd.c
477
u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL2);
drivers/spi/spi-sprd.c
673
val = readl_relaxed(ss->base + SPRD_SPI_CTL0);
drivers/spi/spi-sprd.c
696
val = readl_relaxed(ss->base + SPRD_SPI_CTL7);
drivers/spi/spi-sprd.c
767
val = readl_relaxed(ss->base + SPRD_SPI_CTL1);
drivers/spi/spi-sprd.c
817
u32 val = readl_relaxed(ss->base + SPRD_SPI_INT_MASK_STS);
drivers/spi/spi-st-ssc4.c
104
word = readl_relaxed(spi_st->base + SSC_RBUF);
drivers/spi/spi-st-ssc4.c
145
ctl = readl_relaxed(spi_st->base + SSC_CTL);
drivers/spi/spi-st-ssc4.c
148
readl_relaxed(spi_st->base + SSC_RBUF);
drivers/spi/spi-st-ssc4.c
212
var = readl_relaxed(spi_st->base + SSC_CTL);
drivers/spi/spi-st-ssc4.c
244
readl_relaxed(spi_st->base + SSC_RBUF);
drivers/spi/spi-st-ssc4.c
322
var = readl_relaxed(spi_st->base + SSC_CTL);
drivers/spi/spi-st-ssc4.c
327
var = readl_relaxed(spi_st->base + SSC_CTL);
drivers/spi/spi-stm32-ospi.c
146
*((u32 *)val) = readl_relaxed(addr);
drivers/spi/spi-stm32-ospi.c
176
cr = readl_relaxed(regs_base + OSPI_CR) | CR_ABORT;
drivers/spi/spi-stm32-ospi.c
279
cr = readl_relaxed(regs_base + OSPI_CR);
drivers/spi/spi-stm32-ospi.c
280
sr = readl_relaxed(regs_base + OSPI_SR);
drivers/spi/spi-stm32-ospi.c
374
cr = readl_relaxed(regs_base + OSPI_CR);
drivers/spi/spi-stm32-ospi.c
435
cr = readl_relaxed(regs_base + OSPI_CR);
drivers/spi/spi-stm32-ospi.c
440
u32 sr = readl_relaxed(regs_base + OSPI_SR);
drivers/spi/spi-stm32-ospi.c
472
cr = readl_relaxed(ospi->regs_base + OSPI_CR);
drivers/spi/spi-stm32-ospi.c
482
dcr2 = readl_relaxed(regs_base + OSPI_DCR2);
drivers/spi/spi-stm32-qspi.c
132
cr = readl_relaxed(qspi->io_base + QSPI_CR);
drivers/spi/spi-stm32-qspi.c
133
sr = readl_relaxed(qspi->io_base + QSPI_SR);
drivers/spi/spi-stm32-qspi.c
149
*((u32 *)val) = readl_relaxed(addr);
drivers/spi/spi-stm32-qspi.c
265
cr = readl_relaxed(qspi->io_base + QSPI_CR);
drivers/spi/spi-stm32-qspi.c
349
cr = readl_relaxed(qspi->io_base + QSPI_CR);
drivers/spi/spi-stm32-qspi.c
376
cr = readl_relaxed(qspi->io_base + QSPI_CR);
drivers/spi/spi-stm32-qspi.c
433
cr = readl_relaxed(qspi->io_base + QSPI_CR) | CR_ABORT;
drivers/spi/spi-stm32.c
1071
sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
drivers/spi/spi-stm32.c
1072
ier = readl_relaxed(spi->base + STM32H7_SPI_IER);
drivers/spi/spi-stm32.c
1229
(readl_relaxed(spi->base + spi->cfg->regs->cpol.reg) &
drivers/spi/spi-stm32.c
1388
sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
drivers/spi/spi-stm32.c
1398
sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
drivers/spi/spi-stm32.c
1797
(readl_relaxed(spi->base + STM32FX_SPI_CR2) &
drivers/spi/spi-stm32.c
1823
(readl_relaxed(spi->base + STM32H7_SPI_CFG1) &
drivers/spi/spi-stm32.c
1840
writel_relaxed((readl_relaxed(spi->base + spi->cfg->regs->br.reg) &
drivers/spi/spi-stm32.c
1932
(readl_relaxed(spi->base + STM32H7_SPI_CFG2) &
drivers/spi/spi-stm32.c
1979
writel_relaxed((readl_relaxed(spi->base + STM32H7_SPI_CFG2) &
drivers/spi/spi-stm32.c
2026
writel_relaxed(readl_relaxed(spi->base + spi->cfg->regs->rdy_en.reg) &
drivers/spi/spi-stm32.c
2432
readl_relaxed(spi->base + spi->cfg->regs->fullcfg.reg));
drivers/spi/spi-stm32.c
449
writel_relaxed(readl_relaxed(spi->base + offset) | bits,
drivers/spi/spi-stm32.c
456
writel_relaxed(readl_relaxed(spi->base + offset) & ~bits,
drivers/spi/spi-stm32.c
473
while (readl_relaxed(spi->base + STM32H7_SPI_SR) & STM32H7_SPI_SR_TXP)
drivers/spi/spi-stm32.c
522
cfg1 = readl_relaxed(spi->base + STM32H7_SPI_CFG1);
drivers/spi/spi-stm32.c
546
readl_relaxed(spi->base + STM32MP25_SPI_HWCFGR1));
drivers/spi/spi-stm32.c
620
if ((spi->tx_len > 0) && (readl_relaxed(spi->base + STM32FX_SPI_SR) &
drivers/spi/spi-stm32.c
649
if ((spi->tx_len > 0) && (readl_relaxed(spi->base + STM32FX_SPI_SR) &
drivers/spi/spi-stm32.c
679
(readl_relaxed(spi->base + STM32H7_SPI_SR) &
drivers/spi/spi-stm32.c
713
if ((spi->rx_len > 0) && (readl_relaxed(spi->base + STM32FX_SPI_SR) &
drivers/spi/spi-stm32.c
742
u32 sr = readl_relaxed(spi->base + STM32FX_SPI_SR);
drivers/spi/spi-stm32.c
760
sr = readl_relaxed(spi->base + STM32FX_SPI_SR);
drivers/spi/spi-stm32.c
782
u32 sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
drivers/spi/spi-stm32.c
795
*rx_buf32 = readl_relaxed(spi->base + STM32H7_SPI_RXDR);
drivers/spi/spi-stm32.c
811
sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
drivers/spi/spi-stm32.c
844
if (!(readl_relaxed(spi->base + STM32FX_SPI_CR1) &
drivers/spi/spi-stm32.c
873
readl_relaxed(spi->base + STM32FX_SPI_DR);
drivers/spi/spi-stm32.c
874
readl_relaxed(spi->base + STM32FX_SPI_SR);
drivers/spi/spi-stm32.c
894
cr1 = readl_relaxed(spi->base + STM32H7_SPI_CR1);
drivers/spi/spi-stm32.c
966
sr = readl_relaxed(spi->base + STM32FX_SPI_SR);
drivers/spi/spi-stm32.c
998
readl_relaxed(spi->base + STM32FX_SPI_DR);
drivers/spi/spi-stm32.c
999
readl_relaxed(spi->base + STM32FX_SPI_SR);
drivers/spi/spi-zynq-qspi.c
151
return readl_relaxed(xqspi->regs + offset);
drivers/spi/spi-zynq-qspi.c
453
readl_relaxed(xqspi->regs + ZYNQ_QSPI_RXD_OFFSET);
drivers/spi/spi-zynqmp-gqspi.c
221
return readl_relaxed(xqspi->regs + offset);
drivers/spmi/spmi-pmic-arb.c
1126
mapping_table[index] = readl_relaxed(bus->cnfg +
drivers/spmi/spmi-pmic-arb.c
1177
regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(bus,
drivers/spmi/spmi-pmic-arb.c
1182
regval = readl_relaxed(pmic_arb->core + offset);
drivers/spmi/spmi-pmic-arb.c
1283
regval = readl_relaxed(ppid_base + offset);
drivers/spmi/spmi-pmic-arb.c
1289
regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(bus, i));
drivers/spmi/spmi-pmic-arb.c
1373
bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
drivers/spmi/spmi-pmic-arb.c
1459
bus->apid_count = readl_relaxed(pmic_arb->core +
drivers/spmi/spmi-pmic-arb.c
2101
hw_ver = readl_relaxed(core + PMIC_ARB_VERSION);
drivers/spmi/spmi-pmic-arb.c
402
status = readl_relaxed(base + offset);
drivers/spmi/spmi-pmic-arb.c
737
status = readl_relaxed(pmic_arb->ver_ops->irq_status(bus, apid));
drivers/spmi/spmi-pmic-arb.c
777
status = readl_relaxed(ver_ops->owner_acc_status(bus, ee, i - acc_offset));
drivers/spmi/spmi-pmic-arb.c
790
enable = readl_relaxed(
drivers/spmi/spmi-pmic-arb.c
805
irq_status = readl_relaxed(
drivers/spmi/spmi-pmic-arb.c
808
enable = readl_relaxed(
drivers/staging/media/meson/vdec/vdec_helpers.c
19
return readl_relaxed(core->dos_base + reg);
drivers/staging/media/meson/vdec/vdec_helpers.c
43
return readl_relaxed(core->esparser_base + reg);
drivers/staging/media/meson/vdec/vdec_hevc.c
110
return readl_relaxed(sess->core->dos_base + HEVC_STREAM_LEVEL);
drivers/staging/media/tegra-video/tegra210.c
155
return readl_relaxed(chan->vi->iomem + addr);
drivers/staging/media/tegra-video/tegra210.c
176
return readl_relaxed(vi_csi_base + addr);
drivers/staging/media/tegra-video/tegra210.c
859
return readl_relaxed(csi_pp_base + offset + addr);
drivers/staging/media/tegra-video/tegra210.c
884
return readl_relaxed(csi_cil_base + offset + addr);
drivers/staging/nvec/nvec.c
588
readl_relaxed(reg);
drivers/thermal/dove_thermal.c
102
reg = readl_relaxed(priv->sensor);
drivers/thermal/dove_thermal.c
48
reg = readl_relaxed(priv->control);
drivers/thermal/dove_thermal.c
64
reg = readl_relaxed(priv->control);
drivers/thermal/dove_thermal.c
69
reg = readl_relaxed(priv->sensor);
drivers/thermal/dove_thermal.c
75
reg = readl_relaxed(priv->sensor);
drivers/thermal/dove_thermal.c
93
reg = readl_relaxed(priv->control + PMU_TEMP_DIOD_CTRL1_REG);
drivers/thermal/imx8mm_thermal.c
103
val = readl_relaxed(tmu->base + TRITSR) & TRITSR_TEMP0_VAL_MASK;
drivers/thermal/imx8mm_thermal.c
124
val = readl_relaxed(tmu->base + TRITSR);
drivers/thermal/imx8mm_thermal.c
157
val = readl_relaxed(tmu->base + TER);
drivers/thermal/imx8mm_thermal.c
168
val = readl_relaxed(tmu->base + TPS);
drivers/thermal/imx91_thermal.c
180
val = readl_relaxed(tmu->base + IMX91_TMU_STAT0);
drivers/thermal/kirkwood_thermal.c
32
reg = readl_relaxed(priv->sensor);
drivers/thermal/rockchip_thermal.c
1034
val = readl_relaxed(regs + TSADCV2_AUTO_CON);
drivers/thermal/rockchip_thermal.c
1064
val = readl_relaxed(regs + TSADCV2_INT_EN);
drivers/thermal/rockchip_thermal.c
870
val = readl_relaxed(regs + TSADCV2_INT_PD);
drivers/thermal/rockchip_thermal.c
878
val = readl_relaxed(regs + TSADCV2_INT_PD);
drivers/thermal/rockchip_thermal.c
886
val = readl_relaxed(regs + TSADCV3_INT_PD);
drivers/thermal/rockchip_thermal.c
888
val = readl_relaxed(regs + TSADCV3_HSHUT_PD);
drivers/thermal/rockchip_thermal.c
897
val = readl_relaxed(regs + TSADCV2_AUTO_CON);
drivers/thermal/rockchip_thermal.c
919
val = readl_relaxed(regs + TSADCV2_AUTO_CON);
drivers/thermal/rockchip_thermal.c
945
val = readl_relaxed(regs + TSADCV2_DATA(chn));
drivers/thermal/rockchip_thermal.c
955
val = readl_relaxed(regs + TSADCV3_DATA(chn));
drivers/thermal/rockchip_thermal.c
973
int_clr = readl_relaxed(regs + TSADCV2_INT_EN);
drivers/thermal/rockchip_thermal.c
987
int_en = readl_relaxed(regs + TSADCV2_INT_EN);
drivers/thermal/spear_thermal.c
162
actual_mask = readl_relaxed(stdev->thermal_base);
drivers/thermal/spear_thermal.c
40
*temp = (readl_relaxed(stdev->thermal_base) & 0x7F) * MD_FACTOR;
drivers/thermal/spear_thermal.c
55
actual_mask = readl_relaxed(stdev->thermal_base);
drivers/thermal/spear_thermal.c
78
actual_mask = readl_relaxed(stdev->thermal_base);
drivers/thermal/st/stm_thermal.c
107
value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET);
drivers/thermal/st/stm_thermal.c
127
readl_relaxed(sensor->base + DTS_SR_OFFSET));
drivers/thermal/st/stm_thermal.c
145
value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
drivers/thermal/st/stm_thermal.c
161
value = readl_relaxed(sensor->base +
drivers/thermal/st/stm_thermal.c
179
value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
drivers/thermal/st/stm_thermal.c
187
value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
drivers/thermal/st/stm_thermal.c
214
value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET);
drivers/thermal/st/stm_thermal.c
244
sensor->t0 = readl_relaxed(sensor->base + DTS_T0VALR1_OFFSET) &
drivers/thermal/st/stm_thermal.c
252
sensor->fmt0 = ADJUST * (readl_relaxed(sensor->base +
drivers/thermal/st/stm_thermal.c
256
sensor->ramp_coeff = readl_relaxed(sensor->base + DTS_RAMPVALR_OFFSET) &
drivers/thermal/st/stm_thermal.c
295
value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET);
drivers/thermal/st/stm_thermal.c
311
itr1 = readl_relaxed(sensor->base + DTS_ITR1_OFFSET);
drivers/thermal/tegra/tegra30-tsensor.c
181
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_TS_STATUS1);
drivers/thermal/tegra/tegra30-tsensor.c
232
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG1);
drivers/thermal/tegra/tegra30-tsensor.c
254
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_STATUS0);
drivers/thermal/tegra/tegra30-tsensor.c
299
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG0);
drivers/thermal/tegra/tegra30-tsensor.c
358
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG0);
drivers/thermal/tegra/tegra30-tsensor.c
374
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG1);
drivers/thermal/tegra/tegra30-tsensor.c
380
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG2);
drivers/thermal/tegra/tegra30-tsensor.c
399
val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG0);
drivers/tty/serial/amba-pl011.c
357
readl_relaxed(addr) : readw_relaxed(addr);
drivers/tty/serial/imx_earlycon.c
21
while (readl_relaxed(port->membase + IMX21_UTS) & UTS_TXFULL)
drivers/tty/serial/ma35d1_serial.c
170
return readl_relaxed(p->port.membase + offset);
drivers/tty/serial/msm_serial.c
204
return readl_relaxed(port->membase + off);
drivers/tty/serial/mxs-auart.c
484
return readl_relaxed(addr);
drivers/tty/serial/samsung_tty.c
175
return readl_relaxed(portaddr(port, reg));
drivers/tty/serial/samsung_tty.c
182
#define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg)))
drivers/tty/serial/sifive.c
213
return readl_relaxed(port->membase + offs);
drivers/tty/serial/sprd_serial.c
162
return readl_relaxed(port->membase + offset);
drivers/tty/serial/st-asc.c
153
#ifdef readl_relaxed
drivers/tty/serial/st-asc.c
154
return readl_relaxed(port->membase + offset);
drivers/tty/serial/stm32-usart.c
1077
val = readl_relaxed(port->membase + ofs->cr2);
drivers/tty/serial/stm32-usart.c
1198
cr3 = readl_relaxed(port->membase + ofs->cr3);
drivers/tty/serial/stm32-usart.c
124
val = readl_relaxed(port->membase + reg);
drivers/tty/serial/stm32-usart.c
133
val = readl_relaxed(port->membase + reg);
drivers/tty/serial/stm32-usart.c
143
if (readl_relaxed(port->membase + ofs->isr) & USART_SR_TC)
drivers/tty/serial/stm32-usart.c
1458
if (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_RXNE))
drivers/tty/serial/stm32-usart.c
1461
return readl_relaxed(port->membase + ofs->rdr) & stm32_port->rdr_mask;
drivers/tty/serial/stm32-usart.c
1523
readl_relaxed(stm32port->port.membase + ofs->hwcfgr1));
drivers/tty/serial/stm32-usart.c
1893
cr3 = readl_relaxed(port->membase + ofs->cr3);
drivers/tty/serial/stm32-usart.c
1943
old_cr1 = readl_relaxed(port->membase + ofs->cr1);
drivers/tty/serial/stm32-usart.c
2006
while (!(readl_relaxed(port->membase + info->ofs.isr) & USART_SR_TXE))
drivers/tty/serial/stm32-usart.c
234
cr1 = readl_relaxed(port->membase + ofs->cr1);
drivers/tty/serial/stm32-usart.c
235
cr3 = readl_relaxed(port->membase + ofs->cr3);
drivers/tty/serial/stm32-usart.c
236
usartdiv = readl_relaxed(port->membase + ofs->brr);
drivers/tty/serial/stm32-usart.c
353
*sr = readl_relaxed(port->membase + ofs->isr);
drivers/tty/serial/stm32-usart.c
374
c = readl_relaxed(port->membase + ofs->rdr);
drivers/tty/serial/stm32-usart.c
510
sr = readl_relaxed(port->membase + ofs->isr);
drivers/tty/serial/stm32-usart.c
705
if (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE))
drivers/tty/serial/stm32-usart.c
854
sr = readl_relaxed(port->membase + ofs->isr);
drivers/tty/serial/tegra-utc.c
77
return readl_relaxed(addr);
drivers/tty/serial/tegra-utc.c
91
return readl_relaxed(addr);
drivers/ufs/host/ufs-qcom.c
855
u32 temp = readl_relaxed(host->dev_ref_clk_ctrl_mmio);
drivers/usb/chipidea/ci_hdrc_msm.c
164
val = readl_relaxed(ci->base + HS_PHY_SEC_CTRL);
drivers/usb/chipidea/ci_hdrc_msm.c
60
val = readl_relaxed(addr);
drivers/usb/chipidea/ci_hdrc_msm.c
91
u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
drivers/usb/dwc3/dwc3-st.c
101
return readl_relaxed(base + offset);
drivers/usb/gadget/udc/atmel_usba_udc.c
154
data[i] = readl_relaxed(udc->regs + i * 4);
drivers/usb/gadget/udc/atmel_usba_udc.h
189
readl_relaxed((udc)->regs + USBA_##reg)
drivers/usb/gadget/udc/atmel_usba_udc.h
193
readl_relaxed((ep)->ep_regs + USBA_EPT_##reg)
drivers/usb/gadget/udc/atmel_usba_udc.h
197
readl_relaxed((ep)->dma_regs + USBA_DMA_##reg)
drivers/usb/host/ehci-orion.c
22
#define rdl(off) readl_relaxed(hcd->regs + (off))
drivers/usb/host/ohci-sa1111.c
160
usb_rst = readl_relaxed(dev->mapbase + USB_RESET);
drivers/usb/host/ohci-sa1111.c
46
unsigned long status = readl_relaxed(hcd->regs + USB_STATUS);
drivers/usb/isp1760/isp1760-hcd.c
331
*dst = readl_relaxed(src);
drivers/usb/isp1760/isp1760-hcd.c
352
val = readl_relaxed(src);
drivers/usb/phy/phy-tegra-usb.c
1000
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
1006
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
1110
val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
drivers/usb/phy/phy-tegra-usb.c
1127
val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
drivers/usb/phy/phy-tegra-usb.c
1149
val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
drivers/usb/phy/phy-tegra-usb.c
294
val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
drivers/usb/phy/phy-tegra-usb.c
299
val = readl_relaxed(base + TEGRA_USB_PORTSC1);
drivers/usb/phy/phy-tegra-usb.c
313
val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
drivers/usb/phy/phy-tegra-usb.c
320
val = readl_relaxed(base + TEGRA_USB_PORTSC1) & ~PORT_RWC_BITS;
drivers/usb/phy/phy-tegra-usb.c
407
val = readl_relaxed(base + UTMIP_BIAS_CFG0);
drivers/usb/phy/phy-tegra-usb.c
464
val = readl_relaxed(base + UTMIP_BIAS_CFG0);
drivers/usb/phy/phy-tegra-usb.c
498
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
504
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
531
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
537
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
557
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
562
val = readl_relaxed(base + USB1_LEGACY_CTRL);
drivers/usb/phy/phy-tegra-usb.c
567
val = readl_relaxed(base + UTMIP_TX_CFG0);
drivers/usb/phy/phy-tegra-usb.c
571
val = readl_relaxed(base + UTMIP_HSRX_CFG0);
drivers/usb/phy/phy-tegra-usb.c
577
val = readl_relaxed(base + UTMIP_HSRX_CFG1);
drivers/usb/phy/phy-tegra-usb.c
582
val = readl_relaxed(base + UTMIP_DEBOUNCE_CFG0);
drivers/usb/phy/phy-tegra-usb.c
587
val = readl_relaxed(base + UTMIP_MISC_CFG0);
drivers/usb/phy/phy-tegra-usb.c
592
val = readl_relaxed(base + UTMIP_MISC_CFG1);
drivers/usb/phy/phy-tegra-usb.c
599
val = readl_relaxed(base + UTMIP_PLL_CFG1);
drivers/usb/phy/phy-tegra-usb.c
607
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
612
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
616
val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
drivers/usb/phy/phy-tegra-usb.c
621
val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
drivers/usb/phy/phy-tegra-usb.c
626
val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
drivers/usb/phy/phy-tegra-usb.c
630
val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
drivers/usb/phy/phy-tegra-usb.c
639
val = readl_relaxed(base + UTMIP_XCVR_CFG0);
drivers/usb/phy/phy-tegra-usb.c
659
val = readl_relaxed(base + UTMIP_XCVR_CFG1);
drivers/usb/phy/phy-tegra-usb.c
665
val = readl_relaxed(base + UTMIP_BIAS_CFG1);
drivers/usb/phy/phy-tegra-usb.c
670
val = readl_relaxed(base + UTMIP_SPARE_CFG0);
drivers/usb/phy/phy-tegra-usb.c
678
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
683
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
688
val = readl_relaxed(base + USB1_LEGACY_CTRL);
drivers/usb/phy/phy-tegra-usb.c
693
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
701
val = readl_relaxed(base + USB_USBMODE);
drivers/usb/phy/phy-tegra-usb.c
734
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
739
val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
drivers/usb/phy/phy-tegra-usb.c
744
val = readl_relaxed(base + UTMIP_XCVR_CFG0);
drivers/usb/phy/phy-tegra-usb.c
750
val = readl_relaxed(base + UTMIP_XCVR_CFG1);
drivers/usb/phy/phy-tegra-usb.c
756
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
767
val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
drivers/usb/phy/phy-tegra-usb.c
772
val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
drivers/usb/phy/phy-tegra-usb.c
799
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
803
val = readl_relaxed(base + ULPI_TIMING_CTRL_0);
drivers/usb/phy/phy-tegra-usb.c
807
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
838
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
843
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
878
return readl_relaxed(base + shift + reg);
drivers/usb/phy/phy-tegra-usb.c
904
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
910
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
944
val = readl_relaxed(base + USB_SUSP_CTRL);
drivers/usb/phy/phy-tegra-usb.c
951
val = readl_relaxed(base + USB_USBMODE);
drivers/usb/phy/phy-tegra-usb.c
962
val = readl_relaxed(base + USB_TXFILLTUNING);
drivers/usb/phy/phy-tegra-usb.c
968
val = readl_relaxed(base + phy->soc_config->portsc1_offset);
drivers/vfio/platform/reset/vfio_platform_bcmflexrm.c
46
if (readl_relaxed(ring + RING_FLUSH_DONE) &
drivers/vfio/platform/reset/vfio_platform_bcmflexrm.c
58
if (!(readl_relaxed(ring + RING_FLUSH_DONE) &
drivers/vfio/platform/reset/vfio_platform_bcmflexrm.c
87
if (readl_relaxed(ring + RING_VER) == RING_VER_MAGIC) {
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
123
tmp = readl_relaxed(ctrl_regs(path) + dma_ctrl(0, path->id));
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
174
tmp = readl_relaxed(ctrl_regs(path) + dma_ctrl(0, path->id));
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
185
tmp = readl_relaxed(ctrl_regs(path) + LCD_SCLK(path));
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
265
tmp = readl_relaxed(ctrl_regs(path) + intf_ctrl(path->id)) & 0x1;
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
273
tmp = readl_relaxed(ctrl_regs(path) + intf_rbswap_ctrl(path->id)) &
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
308
tmp = readl_relaxed(ctrl_regs(path) + LCD_SCLK(path));
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
331
tmp = readl_relaxed(ctrl->reg_base + LCD_TOP_CTRL);
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
339
tmp = readl_relaxed(ctrl->reg_base + SPU_IRQ_ENA);
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
35
isr = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR);
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
355
tmp = readl_relaxed(ctrl_regs(path) + SPU_IOPAD_CONTROL);
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
36
imask = readl_relaxed(ctrl->reg_base + SPU_IRQ_ENA);
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
362
tmp = readl_relaxed(ctrl_regs(path) + LCD_SCLK(path));
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
388
tmp = readl_relaxed(ctrl_regs(path) + dma_ctrl(0, path->id));
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
40
tmp = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR);
drivers/video/fbdev/mmp/hw/mmp_ctrl.c
43
} while ((isr = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR)) & imask);
drivers/video/fbdev/mmp/hw/mmp_spi.c
55
tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL);
drivers/video/fbdev/mmp/hw/mmp_spi.c
60
isr = readl_relaxed(reg_base + SPU_IRQ_ISR);
drivers/video/fbdev/mmp/hw/mmp_spi.c
63
isr = readl_relaxed(reg_base + SPU_IRQ_ISR);
drivers/video/fbdev/mmp/hw/mmp_spi.c
71
tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL);
drivers/video/fbdev/mmp/hw/mmp_spi.c
98
tmp = readl_relaxed(reg_base + SPU_IOPAD_CONTROL);
drivers/video/fbdev/omap2/omapfb/dss/pll.c
196
if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value)
drivers/video/fbdev/omap2/omapfb/dss/pll.c
203
if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value)
drivers/video/fbdev/omap2/omapfb/dss/pll.c
229
u32 v = readl_relaxed(pll->base + PLL_STATUS);
drivers/video/fbdev/omap2/omapfb/dss/pll.c
268
l = readl_relaxed(base + PLL_CONFIGURATION2);
drivers/video/fbdev/omap2/omapfb/dss/pll.c
307
l = readl_relaxed(base + PLL_CONFIGURATION2);
drivers/video/fbdev/omap2/omapfb/dss/pll.c
342
l = readl_relaxed(base + PLL_CONFIGURATION2);
drivers/video/fbdev/omap2/omapfb/dss/pll.c
356
l = readl_relaxed(base + PLL_CONFIGURATION3);
drivers/video/fbdev/omap2/omapfb/dss/pll.c
360
l = readl_relaxed(base + PLL_CONFIGURATION4);
drivers/video/fbdev/omap2/omapfb/dss/video-pll.c
28
writel_relaxed(FLD_MOD(readl_relaxed(reg), val, start, end), reg)
drivers/video/fbdev/sa1100fb.c
704
if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 ||
drivers/video/fbdev/sa1100fb.c
705
readl_relaxed(fbi->base + LCCR1) != fbi->reg_lccr1 ||
drivers/video/fbdev/sa1100fb.c
706
readl_relaxed(fbi->base + LCCR2) != fbi->reg_lccr2 ||
drivers/video/fbdev/sa1100fb.c
707
readl_relaxed(fbi->base + LCCR3) != fbi->reg_lccr3 ||
drivers/video/fbdev/sa1100fb.c
708
readl_relaxed(fbi->base + DBAR1) != fbi->dbar1 ||
drivers/video/fbdev/sa1100fb.c
709
readl_relaxed(fbi->base + DBAR2) != fbi->dbar2)
drivers/video/fbdev/sa1100fb.c
805
dev_dbg(fbi->dev, "DBAR1: 0x%08x\n", readl_relaxed(fbi->base + DBAR1));
drivers/video/fbdev/sa1100fb.c
806
dev_dbg(fbi->dev, "DBAR2: 0x%08x\n", readl_relaxed(fbi->base + DBAR2));
drivers/video/fbdev/sa1100fb.c
807
dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0));
drivers/video/fbdev/sa1100fb.c
808
dev_dbg(fbi->dev, "LCCR1: 0x%08x\n", readl_relaxed(fbi->base + LCCR1));
drivers/video/fbdev/sa1100fb.c
809
dev_dbg(fbi->dev, "LCCR2: 0x%08x\n", readl_relaxed(fbi->base + LCCR2));
drivers/video/fbdev/sa1100fb.c
810
dev_dbg(fbi->dev, "LCCR3: 0x%08x\n", readl_relaxed(fbi->base + LCCR3));
drivers/video/fbdev/sa1100fb.c
829
lccr0 = readl_relaxed(fbi->base + LCCR0);
drivers/video/fbdev/sa1100fb.c
848
unsigned int lcsr = readl_relaxed(fbi->base + LCSR);
drivers/video/fbdev/sa1100fb.c
851
u32 lccr0 = readl_relaxed(fbi->base + LCCR0) | LCCR0_LDM;
drivers/watchdog/apple_wdt.c
115
cur_time = readl_relaxed(wdt->regs + APPLE_WDT_WD1_CUR_TIME);
drivers/watchdog/apple_wdt.c
116
reset_time = readl_relaxed(wdt->regs + APPLE_WDT_WD1_BITE_TIME);
drivers/watchdog/apple_wdt.c
186
wdt_ctrl = readl_relaxed(wdt->regs + APPLE_WDT_WD1_CTRL);
drivers/watchdog/at91sam9_wdt.c
41
readl_relaxed((wdt)->base + (field))
drivers/watchdog/bcm2835_wdt.c
106
val = readl_relaxed(wdt->base + PM_RSTC);
drivers/watchdog/bcm2835_wdt.c
162
val = readl_relaxed(wdt->base + PM_RSTS);
drivers/watchdog/bcm2835_wdt.c
75
cur = readl_relaxed(wdt->base + PM_RSTC);
drivers/watchdog/bcm2835_wdt.c
96
uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
drivers/watchdog/bcm7038_wdt.c
54
return readl_relaxed(addr);
drivers/watchdog/bcm_kona_wdt.c
71
val = readl_relaxed(wdt->base + offset);
drivers/watchdog/digicolor_wdt.c
91
uint32_t count = readl_relaxed(wdt->base + TIMER_A_COUNT);
drivers/watchdog/omap_wdt.c
107
while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
drivers/watchdog/omap_wdt.c
111
while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
drivers/watchdog/omap_wdt.c
122
while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
drivers/watchdog/omap_wdt.c
126
while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
drivers/watchdog/omap_wdt.c
149
while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
drivers/watchdog/omap_wdt.c
153
while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
drivers/watchdog/omap_wdt.c
210
value = readl_relaxed(base + OMAP_WATCHDOG_CRR);
drivers/watchdog/omap_wdt.c
285
readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
drivers/watchdog/omap_wdt.c
75
while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
drivers/watchdog/omap_wdt.c
82
while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
drivers/watchdog/omap_wdt.c
93
while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
drivers/watchdog/omap_wdt.c
97
while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
drivers/watchdog/rtd119x_wdt.c
38
val = readl_relaxed(data->base + RTD119X_TCWCR);
drivers/watchdog/rtd119x_wdt.c
51
val = readl_relaxed(data->base + RTD119X_TCWCR);
drivers/watchdog/rti_wdt.c
122
readl_relaxed(wdt->base + RTIWWDSIZECTRL);
drivers/watchdog/rti_wdt.c
191
val = readl_relaxed(wdt->base + RTIWDSTATUS);
drivers/watchdog/rti_wdt.c
195
timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
drivers/watchdog/sa1100_wdt.c
68
return readl_relaxed(reg_base + offset);
drivers/watchdog/sama5d4_wdt.c
58
readl_relaxed((wdt)->reg_base + (field))
drivers/watchdog/sp805_wdt.c
126
load = readl_relaxed(wdt->base + WDTVALUE);
drivers/watchdog/sp805_wdt.c
129
if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
drivers/watchdog/sp805_wdt.c
147
readl_relaxed(wdt->base + WDTLOCK);
drivers/watchdog/sp805_wdt.c
179
readl_relaxed(wdt->base + WDTLOCK);
drivers/watchdog/sp805_wdt.c
208
readl_relaxed(wdt->base + WDTLOCK);
drivers/watchdog/sp805_wdt.c
86
u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
drivers/watchdog/sprd_wdt.c
119
val = readl_relaxed(wdt->base + SPRD_WDT_INT_RAW);
drivers/watchdog/sprd_wdt.c
159
val = readl_relaxed(wdt->base + SPRD_WDT_CTRL);
drivers/watchdog/sprd_wdt.c
189
val = readl_relaxed(wdt->base + SPRD_WDT_CTRL);
drivers/watchdog/sprd_wdt.c
204
val = readl_relaxed(wdt->base + SPRD_WDT_CTRL);
drivers/watchdog/sprd_wdt.c
97
val = readl_relaxed(wdt->base + SPRD_WDT_CNT_HIGH) <<
drivers/watchdog/sprd_wdt.c
99
val |= readl_relaxed(wdt->base + SPRD_WDT_CNT_LOW) &
drivers/watchdog/stm32_iwdg.c
89
return readl_relaxed(base + reg);
include/asm-generic/io.h
351
#ifndef readl_relaxed
include/asm-generic/io.h
352
#define readl_relaxed readl_relaxed
include/linux/coresight.h
456
return readl_relaxed(csa->base + offset);
include/linux/coresight.h
496
return readl_relaxed(csa->base + lo_offset) |
include/linux/coresight.h
497
((u64)readl_relaxed(csa->base + hi_offset) << 32);
include/linux/io-64-nonatomic-hi-lo.h
30
high = readl_relaxed(p + 1);
include/linux/io-64-nonatomic-hi-lo.h
31
low = readl_relaxed(p);
include/linux/io-64-nonatomic-lo-hi.h
30
low = readl_relaxed(p);
include/linux/io-64-nonatomic-lo-hi.h
31
high = readl_relaxed(p + 1);
include/linux/iopoll.h
252
readx_poll_timeout(readl_relaxed, addr, val, cond, delay_us, timeout_us)
include/linux/iopoll.h
255
readx_poll_timeout_atomic(readl_relaxed, addr, val, cond, delay_us, timeout_us)
include/linux/soc/qcom/geni-se.h
336
val = readl_relaxed(se->base + GENI_FW_REVISION_RO);
include/linux/soc/qcom/geni-se.h
371
s_cmd = readl_relaxed(se->base + SE_GENI_S_CMD0);
include/linux/soc/qcom/geni-se.h
452
val = readl_relaxed(se->base + SE_HW_PARAM_0);
include/linux/soc/qcom/geni-se.h
470
val = readl_relaxed(se->base + SE_HW_PARAM_0);
include/linux/soc/qcom/geni-se.h
498
val = readl_relaxed(se->base + SE_HW_PARAM_1);
include/ufs/ufshcd.h
1429
readl_relaxed((hba)->mcq_base + (reg))
rust/helpers/io.c
78
return readl_relaxed(addr);
sound/soc/apple/mca.c
172
newval = (val & mask) | (readl_relaxed(ptr) & ~mask);
sound/soc/apple/mca.c
217
WARN_ON(readl_relaxed(cl->base + serdes_unit + REG_SERDES_STATUS) &
sound/soc/sprd/sprd-mcdt.c
121
u32 orig = readl_relaxed(mcdt->base + reg);
sound/soc/sprd/sprd-mcdt.c
195
*val = readl_relaxed(mcdt->base + reg);
sound/soc/sprd/sprd-mcdt.c
385
return !!(readl_relaxed(mcdt->base + reg) & BIT(shift));
sound/soc/sprd/sprd-mcdt.c
403
u32 r_addr = (readl_relaxed(mcdt->base + reg) >>
sound/soc/sprd/sprd-mcdt.c
405
u32 w_addr = readl_relaxed(mcdt->base + reg) & MCDT_CH_FIFO_ADDR_MASK;
sound/soc/sprd/sprd-mcdt.c
416
u32 r_addr = (readl_relaxed(mcdt->base + reg) >>
sound/soc/sprd/sprd-mcdt.c
418
u32 w_addr = readl_relaxed(mcdt->base + reg) & MCDT_CH_FIFO_ADDR_MASK;
sound/soc/sprd/sprd-mcdt.c
519
return !!(readl_relaxed(mcdt->base + reg) & BIT(shift));
sound/soc/starfive/jh7110_tdm.c
139
return readl_relaxed(tdm->tdm_base + reg);
sound/soc/sti/uniperif.h
1029
readl_relaxed(ip->base + UNIPERIF_STATUS_1_OFFSET(ip))
sound/soc/sti/uniperif.h
103
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG5_OFFSET(ip))
sound/soc/sti/uniperif.h
1054
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REGN(ip, n))
sound/soc/sti/uniperif.h
1065
readl_relaxed(ip->base + UNIPERIF_USER_VALIDITY_OFFSET(ip))
sound/soc/sti/uniperif.h
1108
readl_relaxed(ip->base + UNIPERIF_TDM_ENABLE_OFFSET(ip))
sound/soc/sti/uniperif.h
113
readl_relaxed(ip->base + UNIPERIF_ITS_OFFSET(ip))
sound/soc/sti/uniperif.h
1136
readl_relaxed(ip->base + UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip))
sound/soc/sti/uniperif.h
1183
readl_relaxed(ip->base + UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip))
sound/soc/sti/uniperif.h
1211
readl_relaxed(ip->base + UNIPERIF_TDM_WORD_POS_##words##_OFFSET(ip))
sound/soc/sti/uniperif.h
168
readl_relaxed(ip->base + UNIPERIF_ITM_OFFSET(ip))
sound/soc/sti/uniperif.h
20
((readl_relaxed(ip->base + offset) >> shift) & mask)
sound/soc/sti/uniperif.h
22
writel_relaxed(((readl_relaxed(ip->base + offset) & \
sound/soc/sti/uniperif.h
274
readl_relaxed(ip->base + UNIPERIF_CONFIG_OFFSET(ip))
sound/soc/sti/uniperif.h
34
readl_relaxed(ip->base + UNIPERIF_SOFT_RST_OFFSET(ip)) : 0)
sound/soc/sti/uniperif.h
546
readl_relaxed(ip->base + UNIPERIF_CTRL_OFFSET(ip))
sound/soc/sti/uniperif.h
66
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REGN(ip, n))
sound/soc/sti/uniperif.h
73
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG0_OFFSET(ip))
sound/soc/sti/uniperif.h
79
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG1_OFFSET(ip))
sound/soc/sti/uniperif.h
792
readl_relaxed(ip->base + UNIPERIF_I2S_FMT_OFFSET(ip))
sound/soc/sti/uniperif.h
85
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG2_OFFSET(ip))
sound/soc/sti/uniperif.h
91
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG3_OFFSET(ip))
sound/soc/sti/uniperif.h
97
readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG4_OFFSET(ip))
sound/soc/sti/uniperif.h
991
readl_relaxed(ip->base + UNIPERIF_BIT_CONTROL_OFFSET(ip))
sound/soc/stm/stm32_sai.c
114
prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));
sound/soc/stm/stm32_sai.c
239
readl_relaxed(sai->base + STM_SAI_IDR));
sound/soc/stm/stm32_sai.c
241
val = readl_relaxed(sai->base + STM_SAI_HWCFGR);
sound/soc/stm/stm32_sai.c
246
val = readl_relaxed(sai->base + STM_SAI_VERR);
sound/soc/stm/stm32_sai.c
275
sai->gcr = readl_relaxed(sai->base);
sound/soc/ti/omap-dmic.c
57
return readl_relaxed(dmic->io_base + reg);
sound/soc/ti/omap-mcbsp-priv.h
304
return !from_cache ? readl_relaxed(addr) :
sound/soc/ti/omap-mcbsp-st.c
71
return readl_relaxed(mcbsp->st_data->io_base_st + reg);
sound/soc/ti/omap-mcpdm.c
73
return readl_relaxed(mcpdm->io_base + reg);
tools/include/asm-generic/io.h
288
#ifndef readl_relaxed
tools/include/asm-generic/io.h
289
#define readl_relaxed readl_relaxed
tools/testing/selftests/kvm/include/arm64/processor.h
247
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(__v); __v; })
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
446
ctlr = readl_relaxed(rdist_base + GICR_CTLR);
tools/testing/selftests/kvm/lib/arm64/gic_v3_its.c
32
return readl_relaxed(GITS_BASE_GVA + offset);
