rot
u32 rot;
for (rot = 0; rot < 16; rot++)
if ((x & ~ror32(0xff, 2 * rot)) == 0)
return rol32(x, 2 * rot) | (rot << 8);
static u32 to_rot_ctrl(u32 rot)
switch (rot & DRM_MODE_ROTATE_MASK) {
if (rot & DRM_MODE_REFLECT_X)
if (rot & DRM_MODE_REFLECT_Y)
u32 ctrl = L_EN | to_rot_ctrl(st->rot);
if (drm_rotation_90_or_270(st->rot))
u32 layer_type, u64 modifier, u32 rot)
drm_rotation_90_or_270(rot)) {
rot);
u32 rot)
u32 layer_type, u64 modifier, u32 rot);
u32 rot);
u32 rot)
fourcc, modifier, rot);
u32 rot);
static inline bool has_flip_h(u32 rot)
u32 rotation = drm_rotation_simplify(rot,
u32 rot;
u32 rot;
komeda_rotate_data_flow(dflow, dflow->rot);
komeda_rotate_data_flow(struct komeda_data_flow_cfg *dflow, u32 rot)
if (drm_rotation_90_or_270(rot)) {
if (!komeda_fb_is_layer_supported(kfb, layer->layer_type, dflow->rot))
if (drm_rotation_90_or_270(dflow->rot))
st->rot = dflow->rot;
komeda_rotate_data_flow(dflow, st->rot);
if (drm_rotation_90_or_270(dflow->rot))
bool r90 = drm_rotation_90_or_270(dflow->rot);
bool flip_h = has_flip_h(dflow->rot);
dflow->rot = drm_rotation_simplify(st->rotation, caps->supported_rots);
if (!has_bits(dflow->rot, caps->supported_rots)) {
dflow->rot, &caps->fourcc, fb->modifier);
dflow->rot = DRM_MODE_ROTATE_0;
enum rotation_features rot; /* type of rotation supported */
if (mp->layer->rot == ROTATE_NONE)
if ((mp->layer->rot == ROTATE_COMPRESSED) && !(fb->modifier))
if (rot->task) {
struct exynos_drm_ipp_task *task = rot->task;
rot->task = NULL;
pm_runtime_mark_last_busy(rot->dev);
pm_runtime_put_autosuspend(rot->dev);
static void rotator_src_set_fmt(struct rot_context *rot, u32 fmt)
static void rotator_src_set_buf(struct rot_context *rot,
static void rotator_dst_set_transf(struct rot_context *rot,
static void rotator_dst_set_buf(struct rot_context *rot,
static void rotator_start(struct rot_context *rot)
rotator_reg_set_irq(rot, true);
struct rot_context *rot =
ret = pm_runtime_resume_and_get(rot->dev);
dev_err(rot->dev, "failed to enable ROTATOR device.\n");
rot->task = task;
rotator_src_set_fmt(rot, task->src.buf.fourcc);
rotator_src_set_buf(rot, &task->src);
rotator_dst_set_transf(rot, task->transform.rotation);
rotator_dst_set_buf(rot, &task->dst);
rotator_start(rot);
struct rot_context *rot = dev_get_drvdata(dev);
struct exynos_drm_ipp *ipp = &rot->ipp;
rot->drm_dev = drm_dev;
exynos_drm_register_dma(drm_dev, dev, &rot->dma_priv);
rot->formats, rot->num_formats, "rotator");
struct rot_context *rot = dev_get_drvdata(dev);
struct exynos_drm_ipp *ipp = &rot->ipp;
exynos_drm_unregister_dma(rot->drm_dev, rot->dev, &rot->dma_priv);
struct rot_context *rot;
rot = devm_kzalloc(dev, sizeof(*rot), GFP_KERNEL);
if (!rot)
rot->formats = variant->formats;
rot->num_formats = variant->num_formats;
rot->dev = dev;
rot->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(rot->regs))
return PTR_ERR(rot->regs);
rot);
rot->clock = devm_clk_get(dev, "rotator");
if (IS_ERR(rot->clock)) {
return PTR_ERR(rot->clock);
platform_set_drvdata(pdev, rot);
struct rot_context *rot = dev_get_drvdata(dev);
clk_disable_unprepare(rot->clock);
#define rot_read(offset) readl(rot->regs + (offset))
struct rot_context *rot = dev_get_drvdata(dev);
return clk_prepare_enable(rot->clock);
#define rot_write(cfg, offset) writel(cfg, rot->regs + (offset))
static void rotator_reg_set_irq(struct rot_context *rot, bool enable)
static enum rot_irq_status rotator_reg_get_irq_status(struct rot_context *rot)
struct rot_context *rot = arg;
irq_status = rotator_reg_get_irq_status(rot);
enum ipu_rotate_mode rot)
u32 temp_rot = bitrev8(rot) >> 5;
enum ipu_rotate_mode rot)
u32 temp_rot = bitrev8(rot) >> 5;
if (ipu_rot_mode_is_irt(rot))
u8 rot;
plp_info->rot = data[index++] & 0x01;
int src_h, int dst_w, int dst_h, int rot)
if (rot == 90 || rot == 270) {
int dh, int rot, int out_path)
if (rot == 90 || rot == 270) {
int dh, int rot, int out_path);
u16 bw, len, rot, angle;
rot = (((freq * 36) / bw) << 16) / 100;
angle += rot;
s32 theta = 0, rot = 0;
rot = ((f_kHz * 36) / phy_bw) / 100;
theta += rot;
s32 theta = 0, rot = 0;
rot = ((f_kHz * 36) / phy_bw) / 100;
theta += rot;
u16 rot;
rot = get_unaligned_be16(&vpd->data[4]);
if (rot == 1)
int rot, r;
r = kstrtoint(buf, 0, &rot);
r = dssdev->driver->set_rotate(dssdev, rot);
static unsigned omapfb_get_vrfb_offset(const struct omapfb_info *ofbi, int rot)
switch (rot) {
static u32 omapfb_get_region_rot_paddr(const struct omapfb_info *ofbi, int rot)
return ofbi->region->vrfb.paddr[rot]
+ omapfb_get_vrfb_offset(ofbi, rot);
int rot;
rot = simple_strtoul(p, &p, 0);
if (rot < 0 || rot > 3) {
if (ofbi->rotation[num_ovls] != rot)
rotation[num_ovls++] = rot;
int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot)
vrfb->vaddr[rot] = ioremap_wc(vrfb->paddr[rot], size);
if (!vrfb->vaddr[rot]) {
DBG("ioremapped vrfb area %d of size %lu into %p\n", rot, size,
vrfb->vaddr[rot]);
int rot;
for (rot = 0; rot < 4; ++rot) {
if (vrfb->paddr[rot]) {
release_mem_region(vrfb->paddr[rot], OMAP_VRFB_SIZE);
vrfb->paddr[rot] = 0;
int rot;
for (rot = 0; rot < 4; ++rot) {
paddr = ctxs[ctx].base + SMS_ROT_VIRT_BASE(rot);
ctx, rot * 90);
vrfb->paddr[rot] = paddr;
#define SMS_ROT_VIRT_BASE(rot) (0x1000000 * (rot))
DBG("VRFB %d/%d: %lx\n", ctx, rot*90, vrfb->paddr[rot]);
par->rot = par->pd->rotate;
if (par->rot && (vm->xres > 320)) {
par->rot = 0;
par->rot ? "rotated" : "normal");
iowrite16((par->rot ? 1 << 13 : 0), par->base + LDSMR); /* rotate */
stride = (par->rot) ? vtln : hdcn;
if (par->rot) {
if (par->rot)
if (par->rot)
int rot; /* rotation enabled? */
u32 rot;
rot = stripe_nr % map->num_stripes;
rot += i;
stripe_index = rot % map->num_stripes;
int rot;
rot = div_u64(full_stripe_start - bg->start,
stripe_index = (i + rot) % map->num_stripes;
btrfs_stripe_nr_to_offset(rot);
enum ipu_rotate_mode rot);
enum ipu_rotate_mode rot);
extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot);
static inline int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot)
u64 e = x->a - rot(x->b, 7);
x->a = x->b ^ rot(x->c, 13);
x->b = x->c + rot(x->d, 37);