readl_relaxed_poll_timeout_atomic
ret = readl_relaxed_poll_timeout_atomic(gpc_base + reg, pup,
ret = readl_relaxed_poll_timeout_atomic(cfg_addr,
err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_CR, cr, !(cr & RNG_CR_CONDRST), 10,
err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_SR, sr, !(sr & RNG_SR_SECS), 10,
err = readl_relaxed_poll_timeout_atomic(priv->base
err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_CR, reg,
err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_SR, reg,
err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_CR, reg,
ret = readl_relaxed_poll_timeout_atomic(pll->con_reg, val,
return readl_relaxed_poll_timeout_atomic(cryp->regs + cryp->caps->sr, status,
return readl_relaxed_poll_timeout_atomic(cryp->regs + cryp->caps->sr, status,
ret = readl_relaxed_poll_timeout_atomic(sdma->regs + SDMA_H_STATSTOP,
return readl_relaxed_poll_timeout_atomic(dmadev->base + reg,
ret = readl_relaxed_poll_timeout_atomic(ddata->base + STM32_DMA3_CSR(chan->id), csr,
ret = readl_relaxed_poll_timeout_atomic(ddata->base + STM32_DMA3_CSR(chan->id), csr,
ret = readl_relaxed_poll_timeout_atomic(
ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr +
ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr +
ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr +
ret = readl_relaxed_poll_timeout_atomic(pfdev->iomem + AS_STATUS(as_nr),
return readl_relaxed_poll_timeout_atomic(addr, val, !(val & mask),
ret = readl_relaxed_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, val,
ret = readl_relaxed_poll_timeout_atomic(base + GICD_CTLR, val, !(val & bit),
ret = readl_relaxed_poll_timeout_atomic(rbase + GICR_WAKER, val,
err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_INTSTATUS, v,
err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_INTSTATUS, val,
err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_INTSTATUS, val,
err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_STATUS, val,
err = readl_relaxed_poll_timeout_atomic(
err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_INTSTATUS, v,
err = readl_relaxed_poll_timeout_atomic(se->base + SE_L2SINT_STAT, status,
ret = readl_relaxed_poll_timeout_atomic(lane->base + offset, val,
ret = readl_relaxed_poll_timeout_atomic(reset->prm->base +
ret = readl_relaxed_poll_timeout_atomic(reset->prm->base +
return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr, isr,
return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,
ret = readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,
timeout = readl_relaxed_poll_timeout_atomic(regs_base + OSPI_CR,
ret = readl_relaxed_poll_timeout_atomic(regs_base + OSPI_SR,
return readl_relaxed_poll_timeout_atomic(ospi->regs_base + OSPI_SR,
err = readl_relaxed_poll_timeout_atomic(ospi->regs_base + OSPI_SR, sr,
ret = readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_SR,
return readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_SR, sr,
err = readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_SR, sr,
timeout = readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_CR,
if (readl_relaxed_poll_timeout_atomic(spi->base + STM32FX_SPI_SR,
return readl_relaxed_poll_timeout_atomic(addr, val,
ret = readl_relaxed_poll_timeout_atomic(port->membase + CSR, status,
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr, isr,
readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
res = readl_relaxed_poll_timeout_atomic(&ehci->regs->frame_index,