rn_writel
rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);
rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
rn_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH);
rn_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp_base +
rn_writel(PAGE_SIZE_4K_ENABLE, rtd->acp_base +
rn_writel(low, rtd->acp_base + ACP_SCRATCH_REG_0 + val);
rn_writel(high, rtd->acp_base + ACP_SCRATCH_REG_0 + val + 4);
rn_writel(ch_mask, rtd->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
rn_writel(PDM_DECIMATION_FACTOR, rtd->acp_base +
rn_writel(BIT(PDM_DMA_STAT), rn_pdm_data->acp_base +
rn_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR);
rn_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE);
rn_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
rn_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL);
rn_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL);
rn_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL);
rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);
rn_writel(0x01, acp_base + ACP_EXTERNAL_INTR_ENB);
rn_writel(ext_intr_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);
rn_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base +
rn_writel(0x00, acp_base + ACP_EXTERNAL_INTR_ENB);
rn_writel(0x01, acp_base + ACP_CONTROL);
rn_writel(0x03, acp_base + ACP_CLKMUX_SEL);
rn_writel(0x00, acp_base + ACP_CLKMUX_SEL);
rn_writel(0x00, acp_base + ACP_CONTROL);
rn_writel(ACP_PGFSM_CNTL_POWER_ON_MASK,
rn_writel(ACP_PGFSM_CNTL_POWER_OFF_MASK,
rn_writel(1, acp_base + ACP_SOFT_RESET);
rn_writel(0, acp_base + ACP_SOFT_RESET);