rdmsrq_on_cpu
if (rdmsrq_on_cpu(cpu, SKX_MSR_CPU_BUS_NUMBER, &msr_value) ||
int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
rdmsrq_on_cpu(0, msr_no, raw_cpu_ptr(&msrs->q));
ret = rdmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
ret = rdmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
if (rdmsrq_on_cpu(b->cpu, b->address, &val.q))
err = rdmsrq_on_cpu(cpu, MSR_K7_HWCR, &val.q);
rdmsrq_on_cpu(m->extcpu, MSR_IA32_MCG_CAP, &cap);
if (rdmsrq_on_cpu(m->extcpu, MSR_AMD64_SMCA_MCx_IPID(val), &ipid)) {
err = rdmsrq_on_cpu(cpu, MSR_IA32_MCU_STAGING_MBOX_ADDR, &mmio_pa);
EXPORT_SYMBOL(rdmsrq_on_cpu);
rdmsrq_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &msr);
rdmsrq_on_cpu(cpu, MSR_K7_HWCR, &msr);
ret = rdmsrq_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value);
ret = rdmsrq_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ2, &value);
ret = rdmsrq_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &cppc_req);
ret = rdmsrq_on_cpu(cpudata->cpu, MSR_K7_HWCR, &boost_val);
rdmsrq_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_ACTUAL, &actual.q);
rdmsrq_on_cpu(policy->cpu, MSR_AMD64_FREQ_SENSITIVITY_REFERENCE, &reference.q);
rdmsrq_on_cpu(cpu->cpu, MSR_HWP_CAPABILITIES, &cap);
rdmsrq_on_cpu(cpu, MSR_HWP_REQUEST, &value);
rdmsrq_on_cpu(cpu, MSR_PLATFORM_INFO, &value);
rdmsrq_on_cpu(cpu, MSR_PLATFORM_INFO, &value);
rdmsrq_on_cpu(cpu, MSR_PLATFORM_INFO, &plat_info);
rdmsrq_on_cpu(cpu, MSR_TURBO_RATIO_LIMIT, &value);
rdmsrq_on_cpu(cpu, MSR_TURBO_RATIO_LIMIT, &value);
rdmsrq_on_cpu(cpu->cpu, MSR_HWP_REQUEST, &value);
epp = rdmsrq_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST,
rdmsrq_on_cpu(policy->cpu, MSR_HWP_CAPABILITIES, &cap);
rdmsrq_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &val.q);
rdmsrq_on_cpu(cpu, MSR_IA32_THERM_STATUS, &val.q);
rdmsrq_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &val.q);
rdmsrq_on_cpu(cpu, MSR_IA32_PERF_STATUS, &val.q);
rdmsrq_on_cpu(cpu, MSR_IA32_PERF_CTL, &val.q);
rdmsrq_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr.q);
rdmsrq_on_cpu(tdata->cpu, tdata->status_reg, &val.q);
rdmsrq_on_cpu(tdata->cpu, tdata->status_reg, &val.q);
ret = rdmsrq_on_cpu(data->control_cpu, MSR_UNCORE_PERF_STATUS, &ratio);
ret = rdmsrq_on_cpu(data->control_cpu, MSR_UNCORE_RATIO_LIMIT, &cap);
ret = rdmsrq_on_cpu(data->control_cpu, MSR_UNCORE_RATIO_LIMIT, &cap);
ret = rdmsrq_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &v.q);
ret = rdmsrq_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &val.q);