arch/x86/coco/sev/core.c

2040

rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz);

arch/x86/events/amd/brs.c

328

rdmsrq(brs_to(brs_idx), to);

arch/x86/events/amd/brs.c

341

rdmsrq(brs_from(brs_idx), from);

arch/x86/events/amd/core.c

666

rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, status);

arch/x86/events/amd/core.c

686

rdmsrq(x86_pmu_event_addr(idx), counter);

arch/x86/events/amd/ibs.c

1440

rdmsrq(msr, *buf);

arch/x86/events/amd/ibs.c

1458

rdmsrq(msr + offset, *buf++);

arch/x86/events/amd/ibs.c

1500

rdmsrq(MSR_AMD64_IBSBRTARGET, *buf++);

arch/x86/events/amd/ibs.c

1505

rdmsrq(MSR_AMD64_IBSOPDATA4, *buf++);

arch/x86/events/amd/ibs.c

1510

rdmsrq(MSR_AMD64_ICIBSEXTDCTL, *buf++);

arch/x86/events/amd/ibs.c

1771

rdmsrq(MSR_AMD64_IBSCTL, val);

arch/x86/events/amd/ibs.c

1886

rdmsrq(MSR_AMD64_IBSCTL, val);

arch/x86/events/amd/ibs.c

508

rdmsrq(event->hw.config_base, *config);

arch/x86/events/amd/ibs.c

613

rdmsrq(hwc->config_base, config);

arch/x86/events/amd/lbr.c

407

rdmsrq(MSR_IA32_DEBUGCTLMSR, dbg_ctl);

arch/x86/events/amd/lbr.c

411

rdmsrq(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);

arch/x86/events/amd/lbr.c

79

rdmsrq(MSR_AMD_SAMP_BR_FROM + idx * 2, val);

arch/x86/events/amd/lbr.c

88

rdmsrq(MSR_AMD_SAMP_BR_FROM + idx * 2 + 1, val);

arch/x86/events/amd/power.c

55

rdmsrq(MSR_F15H_CU_PWR_ACCUMULATOR, new_pwr_acc);

arch/x86/events/amd/power.c

56

rdmsrq(MSR_F15H_PTSC, new_ptsc);

arch/x86/events/amd/power.c

82

rdmsrq(MSR_F15H_PTSC, event->hw.ptsc);

arch/x86/events/amd/power.c

83

rdmsrq(MSR_F15H_CU_PWR_ACCUMULATOR, event->hw.pwr_acc);

arch/x86/events/amd/uncore.c

154

rdmsrq(hwc->event_base, new);

arch/x86/events/amd/uncore.c

970

rdmsrq(hwc->event_base, new);

arch/x86/events/core.c

1581

rdmsrq(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);

arch/x86/events/core.c

1582

rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, status);

arch/x86/events/core.c

1583

rdmsrq(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow);

arch/x86/events/core.c

1584

rdmsrq(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed);

arch/x86/events/core.c

1592

rdmsrq(MSR_IA32_PEBS_ENABLE, pebs);

arch/x86/events/core.c

1596

rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);

arch/x86/events/core.c

1603

rdmsrq(x86_pmu_config_addr(idx), pmc_ctrl);

arch/x86/events/core.c

1604

rdmsrq(x86_pmu_event_addr(idx), pmc_count);

arch/x86/events/core.c

1618

rdmsrq(x86_pmu_fixed_ctr_addr(idx), pmc_count);

arch/x86/events/core.c

716

rdmsrq(x86_pmu_config_addr(idx), val);

arch/x86/events/intel/core.c

2968

rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, status);

arch/x86/events/intel/core.c

3497

rdmsrq(MSR_IA32_PEBS_INDEX, old.whole);

arch/x86/events/intel/core.c

6242

rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);

arch/x86/events/intel/core.c

6390

rdmsrq(MSR_IA32_PERF_CAPABILITIES, perf_cap.capabilities);

arch/x86/events/intel/core.c

7934

rdmsrq(MSR_IA32_PERF_CAPABILITIES, capabilities);

arch/x86/events/intel/cstate.c

327

rdmsrq(event->hw.event_base, val);

arch/x86/events/intel/ds.c

3247

rdmsrq(MSR_IA32_PEBS_INDEX, index.whole);

arch/x86/events/intel/knc.c

163

rdmsrq(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);

arch/x86/events/intel/knc.c

172

rdmsrq(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);

arch/x86/events/intel/knc.c

204

rdmsrq(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status);

arch/x86/events/intel/lbr.c

144

rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);

arch/x86/events/intel/lbr.c

214

rdmsrq(x86_pmu.lbr_tos, tos);

arch/x86/events/intel/lbr.c

307

rdmsrq(x86_pmu.lbr_from + idx, val);

arch/x86/events/intel/lbr.c

319

rdmsrq(x86_pmu.lbr_to + idx, val);

arch/x86/events/intel/lbr.c

331

rdmsrq(x86_pmu.lbr_info + idx, val);

arch/x86/events/intel/lbr.c

480

rdmsrq(MSR_LBR_SELECT, task_ctx->lbr_sel);

arch/x86/events/intel/lbr.c

757

rdmsrq(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr);

arch/x86/events/intel/p4.c

1376

rdmsrq(MSR_IA32_MISC_ENABLE, misc);

arch/x86/events/intel/p4.c

863

rdmsrq(hwc->config_base, v);

arch/x86/events/intel/p4.c

876

rdmsrq(hwc->event_base, v);

arch/x86/events/intel/p6.c

146

rdmsrq(MSR_P6_EVNTSEL0, val);

arch/x86/events/intel/p6.c

156

rdmsrq(MSR_P6_EVNTSEL0, val);

arch/x86/events/intel/pt.c

1615

rdmsrq(MSR_IA32_RTIT_STATUS, status);

arch/x86/events/intel/pt.c

199

rdmsrq(MSR_PLATFORM_INFO, reg);

arch/x86/events/intel/pt.c

235

rdmsrq(MSR_IA32_VMX_MISC, reg);

arch/x86/events/intel/pt.c

931

rdmsrq(MSR_IA32_RTIT_STATUS, status);

arch/x86/events/intel/pt.c

990

rdmsrq(MSR_IA32_RTIT_OUTPUT_BASE, pt->output_base);

arch/x86/events/intel/pt.c

995

rdmsrq(MSR_IA32_RTIT_OUTPUT_MASK, pt->output_mask);

arch/x86/events/intel/uncore.c

174

rdmsrq(event->hw.event_base, count);

arch/x86/events/intel/uncore_nhmex.c

218

rdmsrq(msr, config);

arch/x86/events/intel/uncore_nhmex.c

233

rdmsrq(msr, config);

arch/x86/events/intel/uncore_snb.c

532

rdmsrq(ICL_UNC_CBO_CONFIG, num_boxes);

arch/x86/events/intel/uncore_snbep.c

6360

rdmsrq(SPR_MSR_UNC_CBO_CONFIG, num_cbo);

arch/x86/events/intel/uncore_snbep.c

645

rdmsrq(msr, config);

arch/x86/events/intel/uncore_snbep.c

658

rdmsrq(msr, config);

arch/x86/events/msr.c

161

rdmsrq(event->hw.event_base, now);

arch/x86/events/perf_event.h

1484

rdmsrq(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);

arch/x86/events/perf_event.h

1488

rdmsrq(MSR_IA32_DEBUGCTLMSR, dbg_ctl);

arch/x86/events/perf_event.h

1642

rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);

arch/x86/events/rapl.c

196

rdmsrq(event->hw.event_base, raw);

arch/x86/events/rapl.c

225

rdmsrq(event->hw.event_base, new_raw_count);

arch/x86/events/zhaoxin/core.c

271

rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, status);

arch/x86/events/zhaoxin/core.c

298

rdmsrq(hwc->config_base, ctrl_val);

arch/x86/events/zhaoxin/core.c

334

rdmsrq(hwc->config_base, ctrl_val);

arch/x86/hyperv/hv_apic.c

41

rdmsrq(HV_X64_MSR_ICR, reg_val);

arch/x86/hyperv/hv_init.c

104

rdmsrq(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa);

arch/x86/hyperv/hv_init.c

137

rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);

arch/x86/hyperv/hv_init.c

186

rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);

arch/x86/hyperv/hv_init.c

199

rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);

arch/x86/hyperv/hv_init.c

203

rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq);

arch/x86/hyperv/hv_init.c

263

rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl);

arch/x86/hyperv/hv_init.c

300

rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);

arch/x86/hyperv/hv_init.c

309

rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));

arch/x86/hyperv/hv_init.c

380

rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);

arch/x86/hyperv/hv_init.c

397

rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);

arch/x86/hyperv/hv_init.c

532

rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);

arch/x86/hyperv/hv_init.c

674

rdmsrq(HV_X64_MSR_GUEST_OS_ID, guest_id);

arch/x86/hyperv/hv_init.c

708

rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);

arch/x86/hyperv/hv_spinlock.c

53

rdmsrq(HV_X64_MSR_GUEST_IDLE, msr_val);

arch/x86/include/asm/apic.h

223

rdmsrq(APIC_BASE_MSR + (reg >> 4), msr);

arch/x86/include/asm/apic.h

236

rdmsrq(APIC_BASE_MSR + (APIC_ICR >> 4), val);

arch/x86/include/asm/debugreg.h

183

rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctlmsr);

arch/x86/include/asm/fsgsbase.h

63

rdmsrq(MSR_FS_BASE, fsbase);

arch/x86/include/asm/kvm_host.h

2420

rdmsrq(msr, value);

arch/x86/include/asm/msr.h

270

rdmsrq(msr_no, *q);

arch/x86/kernel/apic/apic.c

1713

rdmsrq(MSR_IA32_XAPIC_DISABLE_STATUS, msr);

arch/x86/kernel/apic/apic.c

1726

rdmsrq(MSR_IA32_APICBASE, msr);

arch/x86/kernel/apic/apic.c

1739

rdmsrq(MSR_IA32_APICBASE, msr);

arch/x86/kernel/apic/apic_numachip.c

154

rdmsrq(MSR_FAM10H_NODE_ID, val);

arch/x86/kernel/apic/apic_numachip.c

35

rdmsrq(MSR_FAM10H_NODE_ID, value);

arch/x86/kernel/apic/apic_numachip.c

46

rdmsrq(MSR_FAM10H_MMIO_CONF_BASE, mcfg);

arch/x86/kernel/cet.c

59

rdmsrq(MSR_IA32_PL3_SSP, ssp);

arch/x86/kernel/cpu/amd.c

1110

rdmsrq(MSR_VM_CR, vm_cr);

arch/x86/kernel/cpu/amd.c

431

rdmsrq(MSR_K7_HWCR, val);

arch/x86/kernel/cpu/amd.c

583

rdmsrq(MSR_AMD64_SYSCFG, msr);

arch/x86/kernel/cpu/amd.c

600

rdmsrq(MSR_K7_HWCR, msr);

arch/x86/kernel/cpu/aperfmperf.c

44

rdmsrq(MSR_IA32_APERF, aperf);

arch/x86/kernel/cpu/aperfmperf.c

45

rdmsrq(MSR_IA32_MPERF, mperf);

arch/x86/kernel/cpu/aperfmperf.c

482

rdmsrq(MSR_IA32_APERF, aperf);

arch/x86/kernel/cpu/aperfmperf.c

483

rdmsrq(MSR_IA32_MPERF, mperf);

arch/x86/kernel/cpu/bugs.c

3277

rdmsrq(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);

arch/x86/kernel/cpu/bugs.c

764

rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);

arch/x86/kernel/cpu/bugs.c

900

rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);

arch/x86/kernel/cpu/bugs.c

910

rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);

arch/x86/kernel/cpu/bugs.c

927

rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl_after);

arch/x86/kernel/cpu/bugs.c

962

rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);

arch/x86/kernel/cpu/bus_lock.c

108

rdmsrq(MSR_TEST_CTRL, tmp);

arch/x86/kernel/cpu/bus_lock.c

148

rdmsrq(MSR_TEST_CTRL, msr_test_ctrl_cache);

arch/x86/kernel/cpu/bus_lock.c

308

rdmsrq(MSR_IA32_DEBUGCTLMSR, val);

arch/x86/kernel/cpu/bus_lock.c

386

rdmsrq(MSR_IA32_CORE_CAPS, ia32_core_caps);

arch/x86/kernel/cpu/common.c

1364

rdmsrq(MSR_IA32_ARCH_CAPABILITIES, x86_arch_cap_msr);

arch/x86/kernel/cpu/common.c

1916

rdmsrq(MSR_FS_BASE, old_base);

arch/x86/kernel/cpu/common.c

1919

rdmsrq(MSR_FS_BASE, tmp);

arch/x86/kernel/cpu/common.c

613

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

626

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/hygon.c

102

rdmsrq(MSR_K7_HWCR, val);

arch/x86/kernel/cpu/hygon.c

196

rdmsrq(MSR_VM_CR, vm_cr);

arch/x86/kernel/cpu/intel.c

162

rdmsrq(MSR_IA32_TME_ACTIVATE, tme_activate);

arch/x86/kernel/cpu/intel.c

303

rdmsrq(MSR_IA32_MISC_ENABLE, misc_enable);

arch/x86/kernel/cpu/intel_epb.c

82

rdmsrq(MSR_IA32_ENERGY_PERF_BIAS, epb);

arch/x86/kernel/cpu/intel_epb.c

97

rdmsrq(MSR_IA32_ENERGY_PERF_BIAS, epb);

arch/x86/kernel/cpu/mce/amd.c

661

rdmsrq(MSR_K7_HWCR, hwcr);

arch/x86/kernel/cpu/mce/core.c

1848

rdmsrq(MSR_IA32_MCG_CAP, cap);

arch/x86/kernel/cpu/mce/core.c

1867

rdmsrq(MSR_IA32_MCG_CAP, cap);

arch/x86/kernel/cpu/mce/core.c

1899

rdmsrq(mca_msr_reg(i, MCA_CTL), msrval);

arch/x86/kernel/cpu/mce/core.c

2217

rdmsrq(MSR_IA32_MCG_CAP, cap);

arch/x86/kernel/cpu/mce/inject.c

746

rdmsrq(MSR_AMD64_SMCA_MCx_IPID(bank), ipid);

arch/x86/kernel/cpu/mce/intel.c

109

rdmsrq(MSR_IA32_MCG_CAP, tmp);

arch/x86/kernel/cpu/mce/intel.c

126

rdmsrq(MSR_IA32_FEAT_CTL, tmp);

arch/x86/kernel/cpu/mce/intel.c

144

rdmsrq(MSR_IA32_MCx_CTL2(bank), val);

arch/x86/kernel/cpu/mce/intel.c

187

rdmsrq(MSR_IA32_MCx_CTL2(bank), *val);

arch/x86/kernel/cpu/mce/intel.c

236

rdmsrq(MSR_IA32_MCx_CTL2(bank), val);

arch/x86/kernel/cpu/mce/intel.c

327

rdmsrq(MSR_IA32_MCx_CTL2(bank), val);

arch/x86/kernel/cpu/mce/intel.c

433

rdmsrq(MSR_IA32_MCG_EXT_CTL, val);

arch/x86/kernel/cpu/mce/intel.c

446

rdmsrq(MSR_IA32_MCG_EXT_CTL, val);

arch/x86/kernel/cpu/mce/intel.c

97

rdmsrq(MSR_IA32_MCG_CAP, cap);

arch/x86/kernel/cpu/microcode/intel.c

1030

rdmsrq(MSR_IA32_MCU_ENUMERATION, val);

arch/x86/kernel/cpu/mshyperv.c

402

rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq);

arch/x86/kernel/cpu/mshyperv.c

648

rdmsrq(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);

arch/x86/kernel/cpu/mshyperv.c

77

rdmsrq(reg, value);

arch/x86/kernel/cpu/resctrl/core.c

168

rdmsrq(MSR_IA32_L3_CBM_BASE, l3_cbm_0);

arch/x86/kernel/cpu/resctrl/monitor.c

150

rdmsrq(MSR_IA32_QM_CTR, msr_val);

arch/x86/kernel/cpu/resctrl/monitor.c

310

rdmsrq(MSR_IA32_QM_CTR, msr_val);

arch/x86/kernel/cpu/resctrl/rdtgroup.c

99

rdmsrq(MSR_IA32_EVT_CFG_BASE + index, msrval);

arch/x86/kernel/cpu/topology.c

154

rdmsrq(MSR_IA32_APICBASE, msr);

arch/x86/kernel/cpu/topology_amd.c

143

rdmsrq(MSR_FAM10H_NODE_ID, nid.msr);

arch/x86/kernel/cpu/topology_amd.c

171

rdmsrq(MSR_AMD64_CPUID_EXT_FEAT, msrval);

arch/x86/kernel/cpu/tsx.c

129

rdmsrq(MSR_TSX_FORCE_ABORT, msr);

arch/x86/kernel/cpu/tsx.c

133

rdmsrq(MSR_IA32_TSX_CTRL, msr);

arch/x86/kernel/cpu/tsx.c

160

rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl);

arch/x86/kernel/cpu/tsx.c

38

rdmsrq(MSR_IA32_TSX_CTRL, tsx);

arch/x86/kernel/cpu/tsx.c

58

rdmsrq(MSR_IA32_TSX_CTRL, tsx);

arch/x86/kernel/cpu/umwait.c

221

rdmsrq(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);

arch/x86/kernel/fpu/core.c

367

rdmsrq(MSR_IA32_XFD, fpstate->xfd);

arch/x86/kernel/hpet.c

974

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, pcfg);

arch/x86/kernel/kvm.c

741

rdmsrq(MSR_KVM_POLL_CONTROL, val);

arch/x86/kernel/mmconf-fam10h_64.c

100

rdmsrq(address, val);

arch/x86/kernel/mmconf-fam10h_64.c

108

rdmsrq(address, val);

arch/x86/kernel/mmconf-fam10h_64.c

180

rdmsrq(address, val);

arch/x86/kernel/process.c

733

rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);

arch/x86/kernel/process.c

983

rdmsrq(MSR_K8_INT_PENDING_MSG, val);

arch/x86/kernel/process_64.c

100

rdmsrq(MSR_FS_BASE, fs);

arch/x86/kernel/process_64.c

101

rdmsrq(MSR_KERNEL_GS_BASE, shadowgs);

arch/x86/kernel/process_64.c

112

rdmsrq(MSR_FS_BASE, fs);

arch/x86/kernel/process_64.c

113

rdmsrq(MSR_GS_BASE, gs);

arch/x86/kernel/process_64.c

114

rdmsrq(MSR_KERNEL_GS_BASE, shadowgs);

arch/x86/kernel/process_64.c

200

rdmsrq(MSR_KERNEL_GS_BASE, gsbase);

arch/x86/kernel/process_64.c

466

rdmsrq(MSR_KERNEL_GS_BASE, gsbase);

arch/x86/kernel/shstk.c

234

rdmsrq(MSR_IA32_PL3_SSP, ssp);

arch/x86/kernel/shstk.c

251

rdmsrq(MSR_IA32_PL3_SSP, ssp);

arch/x86/kernel/shstk.c

271

rdmsrq(MSR_IA32_PL3_SSP, ssp);

arch/x86/kernel/shstk.c

500

rdmsrq(MSR_IA32_U_CET, msrval);

arch/x86/kernel/traps.c

1253

rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);

arch/x86/kernel/traps.c

1512

rdmsrq(MSR_IA32_XFD_ERR, xfd_err);

arch/x86/kernel/tsc.c

1091

rdmsrq(MSR_IA32_TSC_ADJUST, art_base_clk.offset);

arch/x86/kernel/tsc_sync.c

169

rdmsrq(MSR_IA32_TSC_ADJUST, bootval);

arch/x86/kernel/tsc_sync.c

191

rdmsrq(MSR_IA32_TSC_ADJUST, bootval);

arch/x86/kernel/tsc_sync.c

69

rdmsrq(MSR_IA32_TSC_ADJUST, curval);

arch/x86/kvm/svm/pmu.c

252

rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, global_status);

arch/x86/kvm/svm/pmu.c

266

rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, pmu->global_status);

arch/x86/kvm/svm/svm.c

4626

rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, vcpu_to_pmu(vcpu)->global_ctrl);

arch/x86/kvm/svm/svm.c

5489

rdmsrq(MSR_AMD64_SYSCFG, msr);

arch/x86/kvm/vmx/nested.c

7351

rdmsrq(MSR_IA32_VMX_CR0_FIXED1, msrs->cr0_fixed1);

arch/x86/kvm/vmx/nested.c

7352

rdmsrq(MSR_IA32_VMX_CR4_FIXED1, msrs->cr4_fixed1);

arch/x86/kvm/vmx/pmu_intel.c

323

rdmsrq(index, msr_info->data);

arch/x86/kvm/vmx/pmu_intel.c

775

rdmsrq(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);

arch/x86/kvm/vmx/pmu_intel.c

805

rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, global_status);

arch/x86/kvm/vmx/pmu_intel.c

820

rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, pmu->global_status);

arch/x86/kvm/vmx/sgx.c

423

rdmsrq(MSR_IA32_SGXLEPUBKEYHASH1, sgx_pubkey_hash[1]);

arch/x86/kvm/vmx/sgx.c

424

rdmsrq(MSR_IA32_SGXLEPUBKEYHASH2, sgx_pubkey_hash[2]);

arch/x86/kvm/vmx/sgx.c

425

rdmsrq(MSR_IA32_SGXLEPUBKEYHASH3, sgx_pubkey_hash[3]);

arch/x86/kvm/vmx/vmx.c

1248

rdmsrq(MSR_IA32_RTIT_STATUS, ctx->status);

arch/x86/kvm/vmx/vmx.c

1249

rdmsrq(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base);

arch/x86/kvm/vmx/vmx.c

1250

rdmsrq(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask);

arch/x86/kvm/vmx/vmx.c

1251

rdmsrq(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match);

arch/x86/kvm/vmx/vmx.c

1253

rdmsrq(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]);

arch/x86/kvm/vmx/vmx.c

1254

rdmsrq(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]);

arch/x86/kvm/vmx/vmx.c

1267

rdmsrq(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);

arch/x86/kvm/vmx/vmx.c

1405

rdmsrq(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);

arch/x86/kvm/vmx/vmx.c

2698

rdmsrq(msr, allowed);

arch/x86/kvm/vmx/vmx.c

2882

rdmsrq(MSR_IA32_VMX_BASIC, basic_msr);

arch/x86/kvm/vmx/vmx.c

2902

rdmsrq(MSR_IA32_VMX_MISC, misc_msr);

arch/x86/kvm/vmx/vmx.c

4490

rdmsrq(MSR_IA32_SYSENTER_EIP, tmpl);

arch/x86/kvm/vmx/vmx.c

7152

rdmsrq(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);

arch/x86/kvm/vmx/vmx.c

8043

rdmsrq(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);

arch/x86/kvm/vmx/vmx.c

8600

rdmsrq(MSR_IA32_BNDCFGS, host_bndcfgs);

arch/x86/kvm/x86.c

10101

rdmsrq(MSR_IA32_S_CET, kvm_host.s_cet);

arch/x86/kvm/x86.c

10133

rdmsrq(MSR_IA32_XSS, kvm_host.xss);

arch/x86/kvm/x86.c

10145

rdmsrq(MSR_IA32_ARCH_CAPABILITIES, kvm_host.arch_capabilities);

arch/x86/kvm/x86.c

3862

rdmsrq(msr_info->index, msr_info->data);

arch/x86/lib/insn-eval.c

712

rdmsrq(MSR_FS_BASE, base);

arch/x86/lib/insn-eval.c

719

rdmsrq(MSR_KERNEL_GS_BASE, base);

arch/x86/lib/insn-eval.c

721

rdmsrq(MSR_GS_BASE, base);

arch/x86/mm/pat/memtype.c

260

rdmsrq(MSR_IA32_CR_PAT, pat_msr_val);

arch/x86/pci/amd_bus.c

205

rdmsrq(address, val);

arch/x86/pci/amd_bus.c

296

rdmsrq(address, val);

arch/x86/pci/amd_bus.c

301

rdmsrq(address, val);

arch/x86/pci/amd_bus.c

344

rdmsrq(MSR_AMD64_NB_CFG, reg);

arch/x86/platform/olpc/olpc-xo1-rtc.c

67

rdmsrq(MSR_RTC_DOMA_OFFSET, rtc_info.rtc_day_alarm);

arch/x86/platform/olpc/olpc-xo1-rtc.c

68

rdmsrq(MSR_RTC_MONA_OFFSET, rtc_info.rtc_mon_alarm);

arch/x86/platform/olpc/olpc-xo1-rtc.c

69

rdmsrq(MSR_RTC_CEN_OFFSET, rtc_info.rtc_century);

arch/x86/power/cpu.c

114

rdmsrq(MSR_FS_BASE, ctxt->fs_base);

arch/x86/power/cpu.c

115

rdmsrq(MSR_GS_BASE, ctxt->kernelmode_gs_base);

arch/x86/power/cpu.c

116

rdmsrq(MSR_KERNEL_GS_BASE, ctxt->usermode_gs_base);

arch/x86/power/cpu.c

119

rdmsrq(MSR_EFER, ctxt->efer);

arch/x86/power/cpu.c

48

rdmsrq(msr->info.msr_no, msr->info.reg.q);

arch/x86/realmode/init.c

150

rdmsrq(MSR_EFER, efer);

arch/x86/virt/hw.c

181

rdmsrq(MSR_IA32_VMX_BASIC, basic_msr);

arch/x86/virt/hw.c

233

rdmsrq(MSR_EFER, efer);

arch/x86/virt/hw.c

256

rdmsrq(MSR_EFER, efer);

arch/x86/virt/hw.c

267

rdmsrq(MSR_EFER, efer);

arch/x86/virt/svm/sev.c

153

rdmsrq(MSR_AMD64_SYSCFG, val);

arch/x86/virt/svm/sev.c

257

rdmsrq(MSR_AMD64_SYSCFG, val);

arch/x86/virt/svm/sev.c

523

rdmsrq(MSR_AMD64_SYSCFG, val);

arch/x86/virt/svm/sev.c

564

rdmsrq(MSR_AMD64_SYSCFG, syscfg);

arch/x86/virt/svm/sev.c

611

rdmsrq(MSR_AMD64_RMP_BASE, rmp_base);

arch/x86/virt/svm/sev.c

612

rdmsrq(MSR_AMD64_RMP_END, rmp_end);

arch/x86/virt/svm/sev.c

645

rdmsrq(MSR_AMD64_RMP_BASE, rmp_base);

arch/x86/virt/svm/sev.c

651

rdmsrq(MSR_AMD64_RMP_END, rmp_end);

arch/x86/virt/svm/sev.c

687

rdmsrq(MSR_AMD64_RMP_CFG, rmp_cfg);

arch/x86/virt/vmx/tdx/tdx.c

1524

rdmsrq(MSR_IA32_VMX_BASIC, basic_msr);

arch/x86/xen/suspend.c

59

rdmsrq(MSR_IA32_SPEC_CTRL, tmp);

drivers/cpufreq/acpi-cpufreq.c

113

rdmsrq(msr_addr, val);

drivers/cpufreq/amd-pstate.c

610

rdmsrq(MSR_IA32_APERF, aperf);

drivers/cpufreq/amd-pstate.c

611

rdmsrq(MSR_IA32_MPERF, mperf);

drivers/cpufreq/e_powersaver.c

227

rdmsrq(MSR_IA32_MISC_ENABLE, val);

drivers/cpufreq/e_powersaver.c

232

rdmsrq(MSR_IA32_MISC_ENABLE, val);

drivers/cpufreq/intel_pstate.c

1400

rdmsrq(MSR_IA32_POWER_CTL, power_ctl);

drivers/cpufreq/intel_pstate.c

1777

rdmsrq(MSR_IA32_POWER_CTL, power_ctl);

drivers/cpufreq/intel_pstate.c

2071

rdmsrq(MSR_ATOM_CORE_RATIOS, value);

drivers/cpufreq/intel_pstate.c

2079

rdmsrq(MSR_ATOM_CORE_RATIOS, value);

drivers/cpufreq/intel_pstate.c

2087

rdmsrq(MSR_ATOM_CORE_TURBO_RATIOS, value);

drivers/cpufreq/intel_pstate.c

2118

rdmsrq(MSR_FSB_FREQ, value);

drivers/cpufreq/intel_pstate.c

2134

rdmsrq(MSR_FSB_FREQ, value);

drivers/cpufreq/intel_pstate.c

2145

rdmsrq(MSR_ATOM_CORE_VIDS, value);

drivers/cpufreq/intel_pstate.c

2153

rdmsrq(MSR_ATOM_CORE_TURBO_VIDS, value);

drivers/cpufreq/intel_pstate.c

2488

rdmsrq(MSR_IA32_APERF, aperf);

drivers/cpufreq/intel_pstate.c

2489

rdmsrq(MSR_IA32_MPERF, mperf);

drivers/cpufreq/intel_pstate.c

3639

rdmsrq(MSR_MISC_PWR_MGMT, misc_pwr);

drivers/cpufreq/intel_pstate.c

3695

rdmsrq(MSR_PM_ENABLE, value);

drivers/cpufreq/intel_pstate.c

3760

rdmsrq(MSR_IA32_POWER_CTL, power_ctl);

drivers/cpufreq/intel_pstate.c

611

rdmsrq(MSR_IA32_MISC_ENABLE, misc_en);

drivers/cpufreq/longhaul.c

139

rdmsrq(MSR_VIA_BCR2, bcr2.val);

drivers/cpufreq/longhaul.c

154

rdmsrq(MSR_VIA_BCR2, bcr2.val);

drivers/cpufreq/longhaul.c

167

rdmsrq(MSR_VIA_LONGHAUL, longhaul.val);

drivers/cpufreq/longhaul.c

536

rdmsrq(MSR_VIA_LONGHAUL, longhaul.val);

drivers/cpufreq/powernow-k7.c

223

rdmsrq(MSR_K7_FID_VID_CTL, fidvidctl.val);

drivers/cpufreq/powernow-k7.c

238

rdmsrq(MSR_K7_FID_VID_CTL, fidvidctl.val);

drivers/cpufreq/powernow-k7.c

264

rdmsrq(MSR_K7_FID_VID_STATUS, fidvidstatus.val);

drivers/cpufreq/powernow-k7.c

561

rdmsrq(MSR_K7_FID_VID_STATUS, fidvidstatus.val);

drivers/cpufreq/powernow-k7.c

602

rdmsrq(MSR_K7_FID_VID_STATUS, fidvidstatus.val);

drivers/edac/amd64_edac.c

2959

rdmsrq(MSR_K8_TOP_MEM1, pvt->top_mem);

drivers/edac/amd64_edac.c

2963

rdmsrq(MSR_AMD64_SYSCFG, msr_val);

drivers/edac/amd64_edac.c

2965

rdmsrq(MSR_K8_TOP_MEM2, pvt->top_mem2);

drivers/hv/mshv_vtl_main.c

601

rdmsrq(reg_table[i].msr_addr, *reg64);

drivers/idle/intel_idle.c

2002

rdmsrq(MSR_PKGC6_IRTL, msr);

drivers/idle/intel_idle.c

2009

rdmsrq(MSR_PKGC7_IRTL, msr);

drivers/idle/intel_idle.c

2016

rdmsrq(MSR_PKGC8_IRTL, msr);

drivers/idle/intel_idle.c

2023

rdmsrq(MSR_PKGC9_IRTL, msr);

drivers/idle/intel_idle.c

2030

rdmsrq(MSR_PKGC10_IRTL, msr);

drivers/idle/intel_idle.c

2058

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr);

drivers/idle/intel_idle.c

2070

rdmsrq(MSR_IA32_FEAT_CTL, msr);

drivers/idle/intel_idle.c

2090

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr);

drivers/idle/intel_idle.c

2344

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr_bits);

drivers/idle/intel_idle.c

2353

rdmsrq(MSR_IA32_POWER_CTL, msr_bits);

drivers/idle/intel_idle.c

2362

rdmsrq(MSR_IA32_POWER_CTL, msr_bits);

drivers/idle/intel_idle.c

2431

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr_val);

drivers/idle/intel_idle.c

2471

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr_val);

drivers/mtd/nand/raw/cs553x_nand.c

354

rdmsrq(MSR_DIVIL_GLD_CAP, val);

drivers/mtd/nand/raw/cs553x_nand.c

360

rdmsrq(MSR_DIVIL_BALL_OPTS, val);

drivers/mtd/nand/raw/cs553x_nand.c

367

rdmsrq(MSR_DIVIL_LBAR_FLSH0 + i, val);

drivers/platform/x86/intel/ifs/load.c

132

rdmsrq(msrs->copy_hashes_status, hashes_status.data);

drivers/platform/x86/intel/ifs/load.c

154

rdmsrq(msrs->copy_chunks_status, chunk_status.data);

drivers/platform/x86/intel/ifs/load.c

200

rdmsrq(msrs->copy_hashes_status, hashes_status.data);

drivers/platform/x86/intel/ifs/load.c

221

rdmsrq(msrs->copy_chunks_status, chunk_status.data);

drivers/platform/x86/intel/ifs/load.c

244

rdmsrq(msrs->copy_chunks_status, chunk_status.data);

drivers/platform/x86/intel/ifs/runtest.c

214

rdmsrq(MSR_SCAN_STATUS, status.data);

drivers/platform/x86/intel/ifs/runtest.c

327

rdmsrq(MSR_ARRAY_BIST, command->data);

drivers/platform/x86/intel/ifs/runtest.c

379

rdmsrq(MSR_ARRAY_STATUS, *((u64 *)status));

drivers/platform/x86/intel/ifs/runtest.c

531

rdmsrq(MSR_SBAF_STATUS, status.data);

drivers/platform/x86/intel/pmc/cnp.c

231

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, val);

drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c

43

rdmsrq(MSR_OS_MAILBOX_INTERFACE, data);

drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c

68

rdmsrq(MSR_OS_MAILBOX_INTERFACE, data);

drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c

78

rdmsrq(MSR_OS_MAILBOX_DATA, data);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

564

rdmsrq(MSR_PM_ENABLE, value);

drivers/platform/x86/intel_ips.c

1218

rdmsrq(TURBO_POWER_CURRENT_LIMIT, turbo_override);

drivers/platform/x86/intel_ips.c

1293

rdmsrq(IA32_MISC_ENABLE, misc_en);

drivers/platform/x86/intel_ips.c

1315

rdmsrq(TURBO_POWER_CURRENT_LIMIT, turbo_power);

drivers/platform/x86/intel_ips.c

1499

rdmsrq(PLATFORM_INFO, platform_info);

drivers/platform/x86/intel_ips.c

1532

rdmsrq(TURBO_POWER_CURRENT_LIMIT, ips->orig_turbo_limit);

drivers/platform/x86/intel_ips.c

1599

rdmsrq(TURBO_POWER_CURRENT_LIMIT, turbo_override);

drivers/platform/x86/intel_ips.c

373

rdmsrq(TURBO_POWER_CURRENT_LIMIT, turbo_override);

drivers/platform/x86/intel_ips.c

408

rdmsrq(TURBO_POWER_CURRENT_LIMIT, turbo_override);

drivers/platform/x86/intel_ips.c

440

rdmsrq(IA32_PERF_CTL, perf_ctl);

drivers/platform/x86/intel_ips.c

478

rdmsrq(IA32_PERF_CTL, perf_ctl);

drivers/powercap/intel_rapl_msr.c

179

rdmsrq(ra->reg.msr, ra->value);

drivers/thermal/intel/intel_hfi.c

288

rdmsrq(MSR_IA32_PACKAGE_THERM_STATUS, msr);

drivers/thermal/intel/intel_hfi.c

360

rdmsrq(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);

drivers/thermal/intel/intel_hfi.c

381

rdmsrq(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);

drivers/thermal/intel/intel_hfi.c

392

rdmsrq(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);

drivers/thermal/intel/therm_throt.c

291

rdmsrq(msr, msr_val);

drivers/thermal/intel/therm_throt.c

663

rdmsrq(MSR_IA32_THERM_STATUS, msr_val);

drivers/thermal/intel/therm_throt.c

678

rdmsrq(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);

drivers/video/fbdev/geode/gxfb_core.c

381

rdmsrq(MSR_GX_GLD_MSR_CONFIG, val);

drivers/video/fbdev/geode/lxfb_ops.c

362

rdmsrq(MSR_LX_GLD_MSR_CONFIG, msrval);

drivers/video/fbdev/geode/lxfb_ops.c

423

rdmsrq(MSR_LX_SPARE_MSR, msrval);

drivers/video/fbdev/geode/lxfb_ops.c

595

rdmsrq(MSR_LX_MSR_PADSEL, par->msr.padsel);

drivers/video/fbdev/geode/lxfb_ops.c

596

rdmsrq(MSR_GLCP_DOTPLL, par->msr.dotpll);

drivers/video/fbdev/geode/lxfb_ops.c

597

rdmsrq(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg);

drivers/video/fbdev/geode/lxfb_ops.c

598

rdmsrq(MSR_LX_SPARE_MSR, par->msr.dcspare);

drivers/video/fbdev/geode/suspend_gx.c

24

rdmsrq(MSR_GX_MSR_PADSEL, par->msr.padsel);

drivers/video/fbdev/geode/suspend_gx.c

25

rdmsrq(MSR_GLCP_DOTPLL, par->msr.dotpll);

drivers/video/fbdev/geode/suspend_gx.c

46

rdmsrq(MSR_GLCP_DOTPLL, dotpll_lo);

drivers/video/fbdev/geode/suspend_gx.c

53

rdmsrq(MSR_GLCP_DOTPLL, dotpll_lo);

drivers/video/fbdev/geode/video_gx.c

145

rdmsrq(MSR_GLCP_SYS_RSTPLL, sys_rstpll);

drivers/video/fbdev/geode/video_gx.c

146

rdmsrq(MSR_GLCP_DOTPLL, dotpll);

drivers/video/fbdev/geode/video_gx.c

170

rdmsrq(MSR_GLCP_DOTPLL, dotpll);

drivers/video/fbdev/geode/video_gx.c

183

rdmsrq(MSR_GX_MSR_PADSEL, val);