Symbol: rd_reg32
drivers/crypto/caam/blob_gen.c
69
return FIELD_GET(CSTA_MOO, rd_reg32(&ctrlpriv->jr[0]->perfmon.status));
drivers/crypto/caam/caamalg.c
3859
cha_vid = rd_reg32(&perfmon->cha_id_ls);
drivers/crypto/caam/caamalg.c
3863
cha_inst = rd_reg32(&perfmon->cha_num_ls);
drivers/crypto/caam/caamalg.c
3871
aes_rn = rd_reg32(&perfmon->cha_rev_ls) & CHA_ID_LS_AES_MASK;
drivers/crypto/caam/caamalg.c
3877
aesa = rd_reg32(&vreg->aesa);
drivers/crypto/caam/caamalg.c
3878
mdha = rd_reg32(&vreg->mdha);
drivers/crypto/caam/caamalg.c
3883
des_inst = rd_reg32(&vreg->desa) & CHA_VER_NUM_MASK;
drivers/crypto/caam/caamalg.c
3886
ccha_inst = rd_reg32(&vreg->ccha) & CHA_VER_NUM_MASK;
drivers/crypto/caam/caamalg.c
3887
ptha_inst = rd_reg32(&vreg->ptha) & CHA_VER_NUM_MASK;
drivers/crypto/caam/caamalg_qi.c
2639
cha_vid = rd_reg32(&priv->ctrl->perfmon.cha_id_ls);
drivers/crypto/caam/caamalg_qi.c
2643
cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls);
drivers/crypto/caam/caamalg_qi.c
2651
aesa = rd_reg32(&priv->ctrl->vreg.aesa);
drivers/crypto/caam/caamalg_qi.c
2652
mdha = rd_reg32(&priv->ctrl->vreg.mdha);
drivers/crypto/caam/caamalg_qi.c
2657
des_inst = rd_reg32(&priv->ctrl->vreg.desa) & CHA_VER_NUM_MASK;
drivers/crypto/caam/caamhash.c
1955
md_vid = (rd_reg32(&perfmon->cha_id_ls) &
drivers/crypto/caam/caamhash.c
1957
md_inst = (rd_reg32(&perfmon->cha_num_ls) &
drivers/crypto/caam/caamhash.c
1960
u32 mdha = rd_reg32(&priv->jr[0]->vreg.mdha);
drivers/crypto/caam/caampkc.c
1181
pk_inst = (rd_reg32(&priv->jr[0]->perfmon.cha_num_ls) &
drivers/crypto/caam/caampkc.c
1184
pkha = rd_reg32(&priv->jr[0]->vreg.pkha);
drivers/crypto/caam/caamprng.c
217
rng_inst = (rd_reg32(&priv->jr[0]->perfmon.cha_num_ls) &
drivers/crypto/caam/caamprng.c
220
rng_inst = rd_reg32(&priv->jr[0]->vreg.rng) & CHA_VER_NUM_MASK;
drivers/crypto/caam/caamrng.c
276
rng_inst = (rd_reg32(&priv->jr[0]->perfmon.cha_num_ls) &
drivers/crypto/caam/caamrng.c
279
rng_inst = rd_reg32(&priv->jr[0]->vreg.rng) & CHA_VER_NUM_MASK;
drivers/crypto/caam/ctrl.c
1050
scfgr = rd_reg32(&ctrl->scfgr);
drivers/crypto/caam/ctrl.c
1115
comp_params = rd_reg32(&perfmon->comp_parms_ls);
drivers/crypto/caam/ctrl.c
1125
(rd_reg32(&perfmon->cha_num_ls) & CHA_ID_LS_AES_MASK);
drivers/crypto/caam/ctrl.c
1134
(rd_reg32(&vreg->aesa) & CHA_VER_MISC_AES_NUM_MASK);
drivers/crypto/caam/ctrl.c
1143
caam_id = (u64)rd_reg32(&perfmon->caam_id_ms) << 32 |
drivers/crypto/caam/ctrl.c
1144
(u64)rd_reg32(&perfmon->caam_id_ls);
drivers/crypto/caam/ctrl.c
123
while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
drivers/crypto/caam/ctrl.c
132
while (!(rd_reg32(&ctrl->deco_rq) & DECORR_DEN0) &&
drivers/crypto/caam/ctrl.c
158
deco_dbg_reg = rd_reg32(&deco->desc_dbg);
drivers/crypto/caam/ctrl.c
164
deco_state = (rd_reg32(&deco->dbg_exec) &
drivers/crypto/caam/ctrl.c
178
*status = rd_reg32(&deco->op_status_hi) &
drivers/crypto/caam/ctrl.c
335
rdsta_val = rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_MASK;
drivers/crypto/caam/ctrl.c
382
rtsdctl = rd_reg32(&r4tst->rtsdctl);
drivers/crypto/caam/ctrl.c
446
ccbvid = rd_reg32(&perfmon->ccb_id);
drivers/crypto/caam/ctrl.c
451
id_ms = rd_reg32(&perfmon->caam_id_ms);
drivers/crypto/caam/ctrl.c
664
rng_vid = (rd_reg32(&perfmon->cha_id_ls) &
drivers/crypto/caam/ctrl.c
673
rng_vid = (rd_reg32(&vreg->rng) & CHA_VER_VID_MASK) >>
drivers/crypto/caam/ctrl.c
684
rd_reg32(&ctrl->r4tst[0].rdsta);
drivers/crypto/caam/ctrl.c
695
rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_MASK;
drivers/crypto/caam/ctrl.c
773
state->mcr = rd_reg32(&ctrl->mcr);
drivers/crypto/caam/ctrl.c
774
state->scfgr = rd_reg32(&ctrl->scfgr);
drivers/crypto/caam/ctrl.c
776
deco_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) &
drivers/crypto/caam/ctrl.c
780
rd_reg32(&ctrl->deco_mid[i].liodn_ms);
drivers/crypto/caam/ctrl.c
782
rd_reg32(&ctrl->deco_mid[i].liodn_ls);
drivers/crypto/caam/ctrl.c
785
jr_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) &
drivers/crypto/caam/ctrl.c
789
rd_reg32(&ctrl->jr_mid[i].liodn_ms);
drivers/crypto/caam/ctrl.c
791
rd_reg32(&ctrl->jr_mid[i].liodn_ls);
drivers/crypto/caam/ctrl.c
806
deco_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) &
drivers/crypto/caam/ctrl.c
815
jr_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) &
drivers/crypto/caam/ctrl.c
960
caam_little_end = !(bool)(rd_reg32(&perfmon->status) &
drivers/crypto/caam/ctrl.c
962
comp_params = rd_reg32(&perfmon->comp_parms_ms);
drivers/crypto/caam/ctrl.c
964
rd_reg32(&ctrl->mcr) & MCFGR_LONG_PTR)
drivers/crypto/caam/jr.c
101
if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
drivers/crypto/caam/jr.c
125
u32 halt_status = rd_reg32(&jrp->rregs->jrintstatus) &
drivers/crypto/caam/jr.c
154
while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
drivers/crypto/caam/jr.c
231
irqstate = rd_reg32(&jrp->rregs->jrintstatus);
drivers/crypto/caam/jr.c
271
(outring_used = rd_reg32(&jrp->rregs->outring_used))) {
drivers/crypto/caam/jr.c
489
jrp->inpring_avail = rd_reg32(&jrp->rregs->inpring_avail);
drivers/crypto/caam/jr.c
87
if (rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_INPROGRESS)
drivers/crypto/caam/jr.c
97
while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==