riscv_insn_rmw
return riscv_insn_rmw(location, 0x1fff07f, imm12 | imm11 | imm10_5 | imm4_1);
return riscv_insn_rmw(location, 0xfff, imm20 | imm19_12 | imm11 | imm10_1);
return riscv_insn_rmw(location, 0xfff, (offset + 0x800) & 0xfffff000);
return riscv_insn_rmw(location, 0xfffff, (v & 0xfff) << 20);
return riscv_insn_rmw(location, 0x1fff07f, imm11_5 | imm4_0);
return riscv_insn_rmw(location, 0xfff, ((s32)v + 0x800) & 0xfffff000);
return riscv_insn_rmw(location, 0xfffff, (lo12 & 0xfff) << 20);
return riscv_insn_rmw(location, 0x1fff07f, imm11_5 | imm4_0);
return riscv_insn_rmw(location, 0xfff, (offset + 0x800) & 0xfffff000);
riscv_insn_rmw(location, 0xfff, hi20);
return riscv_insn_rmw(location + 4, 0xfffff, lo12 << 20);
riscv_insn_rmw(location, 0xfff, hi20);
return riscv_insn_rmw(location + 4, 0xfffff, lo12 << 20);