drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c

24

static void dmub_replay_get_state(struct dmub_replay *dmub, enum replay_state *state, uint8_t panel_inst)

drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c

52

enum replay_state state = REPLAY_STATE_0;

drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h

19

void (*replay_get_state)(struct dmub_replay *dmub, enum replay_state *state,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c

392

uint32_t replay_state = 0;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c

400

&replay_state, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c

402

replay_state = PR_STATE_INVALID;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c

405

*state = replay_state;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

975

enum replay_state pr_state = REPLAY_STATE_0;

drivers/gpu/drm/xe/xe_exec_queue.c

161

kvfree(q->replay_state);

drivers/gpu/drm/xe/xe_exec_queue.c

319

lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,

drivers/gpu/drm/xe/xe_exec_queue.c

672

q->replay_state = ptr;

drivers/gpu/drm/xe/xe_exec_queue_types.h

229

void *replay_state;

drivers/gpu/drm/xe/xe_lrc.c

1435

struct xe_vm *vm, void *replay_state, u32 ring_size,

drivers/gpu/drm/xe/xe_lrc.c

1488

if (gt->default_lrc[hwe->class] || replay_state) {

drivers/gpu/drm/xe/xe_lrc.c

1493

if (replay_state)

drivers/gpu/drm/xe/xe_lrc.c

1495

replay_state, lrc->replay_size);

drivers/gpu/drm/xe/xe_lrc.c

1614

void *replay_state, u32 ring_size, u16 msix_vec, u32 flags)

drivers/gpu/drm/xe/xe_lrc.c

1623

err = xe_lrc_init(lrc, hwe, vm, replay_state, ring_size, msix_vec, flags);

drivers/gpu/drm/xe/xe_lrc.h

54

void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);