arch/mips/cavium-octeon/smp.c

279

write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);

arch/mips/cobalt/time.c

31

start = read_c0_count();

arch/mips/cobalt/time.c

37

end = read_c0_count();

arch/mips/dec/time.c

144

start = read_c0_count();

arch/mips/dec/time.c

150

end = read_c0_count();

arch/mips/generic/board-ranchu.c

56

start = read_c0_count();

arch/mips/generic/board-ranchu.c

63

count = read_c0_count() - start;

arch/mips/generic/board-sead3.c

206

freq = read_c0_count();

arch/mips/include/asm/timex.h

75

return read_c0_count();

arch/mips/include/asm/timex.h

90

return read_c0_count();

arch/mips/kernel/cevt-r4k.c

191

cnt = read_c0_count();

arch/mips/kernel/cevt-r4k.c

194

while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))

arch/mips/kernel/cevt-r4k.c

202

cnt = read_c0_count();

arch/mips/kernel/cevt-r4k.c

206

if ((int)(read_c0_count() - cnt) < 0)

arch/mips/kernel/cevt-r4k.c

211

while ((int)(read_c0_count() - cnt) <= 0)

arch/mips/kernel/cevt-r4k.c

214

while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))

arch/mips/kernel/cevt-r4k.c

219

cnt = read_c0_count();

arch/mips/kernel/cevt-r4k.c

222

while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))

arch/mips/kernel/cevt-r4k.c

25

cnt = read_c0_count();

arch/mips/kernel/cevt-r4k.c

28

res = ((int)(read_c0_count() - cnt) >= 0) ? -ETIME : 0;

arch/mips/kernel/cevt-r4k.c

65

cnt = read_c0_count();

arch/mips/kernel/cevt-r4k.c

67

cnt = read_c0_count() - cnt;

arch/mips/kernel/csrc-r4k.c

17

return read_c0_count();

arch/mips/kernel/csrc-r4k.c

29

return read_c0_count();

arch/mips/kernel/smp-bmips.c

274

write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);

arch/mips/kernel/smp-cps.c

715

write_c0_compare(read_c0_count() + (8 * mips_hpt_frequency / HZ));

arch/mips/kernel/smp-mt.c

124

write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ));

arch/mips/kernel/smp-mt.c

43

write_vpe_c0_count(read_c0_count());

arch/mips/kernel/sync-r4k.c

225

write_c0_compare(read_c0_count() + COUNTON);

arch/mips/kernel/sync-r4k.c

237

count = read_c0_count();

arch/mips/kernel/sync-r4k.c

53

start = read_c0_count();

arch/mips/kernel/sync-r4k.c

64

now = read_c0_count();

arch/mips/kernel/traps.c

652

regs->regs[rt] = read_c0_count();

arch/mips/kvm/emulate.c

727

write_c0_gtoffset(compare - read_c0_count());

arch/mips/kvm/emulate.c

765

write_c0_gtoffset(compare - read_c0_count());

arch/mips/kvm/vz.c

372

write_c0_gtoffset(compare - read_c0_count());

arch/mips/kvm/vz.c

399

write_c0_gtoffset(start_count - read_c0_count());

arch/mips/lantiq/clk.c

198

write_c0_compare(read_c0_count());

arch/mips/loongson64/smp.c

427

write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);

arch/mips/mti-malta/malta-time.c

80

start = read_c0_count();

arch/mips/mti-malta/malta-time.c

90

count = read_c0_count();

arch/mips/sgi-ip22/ip22-time.c

44

ct0 = read_c0_count();

arch/mips/sgi-ip22/ip22-time.c

51

ct1 = read_c0_count();

arch/mips/sgi-ip30/ip30-setup.c

93

start = read_c0_count();

arch/mips/sgi-ip30/ip30-setup.c

97

end = read_c0_count();

arch/mips/sgi-ip32/ip32-setup.c

72

mips_hpt_frequency = read_c0_count() * 1000 / WAIT_MS;

arch/mips/sni/time.c

89

ct0 = read_c0_count();

arch/mips/sni/time.c

96

ct1 = read_c0_count();