arch/mips/include/uapi/asm/inst.h

1123

struct r_format r_format;

arch/mips/kernel/branch.c

434

switch (insn.r_format.func) {

arch/mips/kernel/branch.c

436

regs->regs[insn.r_format.rd] = epc + 8;

arch/mips/kernel/branch.c

439

if (NO_R6EMU && insn.r_format.func == jr_op)

arch/mips/kernel/branch.c

441

regs->cp0_epc = regs->regs[insn.r_format.rs];

arch/mips/kernel/probes-common.h

21

switch (insn.r_format.func) {

arch/mips/kernel/process.c

208

if (ip->r_format.opcode == mm_pool32a_op &&

arch/mips/kernel/process.c

209

ip->r_format.func == mm_pool32axf_op &&

arch/mips/kernel/process.c

211

ip->r_format.rt == 31)

arch/mips/kernel/process.c

215

if (ip->r_format.opcode == spec_op &&

arch/mips/kernel/process.c

216

ip->r_format.func == jr_op &&

arch/mips/kernel/process.c

217

ip->r_format.rs == 31)

arch/mips/kernel/process.c

339

if (ip->r_format.opcode != mm_pool32a_op ||

arch/mips/kernel/process.c

340

ip->r_format.func != mm_pool32axf_op)

arch/mips/kernel/process.c

348

if (ip->r_format.opcode != spec_op)

arch/mips/kernel/process.c

350

return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;

arch/mips/kernel/uprobes.c

70

switch (inst.r_format.func) {

arch/mips/kvm/emulate.c

63

switch (insn.r_format.func) {

arch/mips/kvm/emulate.c

65

arch->gprs[insn.r_format.rd] = epc + 8;

arch/mips/kvm/emulate.c

68

nextpc = arch->gprs[insn.r_format.rs];

arch/mips/kvm/vz.c

1230

switch (inst.r_format.opcode) {

arch/mips/kvm/vz.c

1254

if (inst.r_format.rs || (inst.r_format.re >> 3))

arch/mips/kvm/vz.c

1257

rd = inst.r_format.rd;

arch/mips/kvm/vz.c

1258

rt = inst.r_format.rt;

arch/mips/kvm/vz.c

1259

sel = inst.r_format.re & 0x7;

arch/mips/math-emu/cp1emu.c

167

mips32_insn.r_format.opcode = cop1x_op;

arch/mips/math-emu/cp1emu.c

168

mips32_insn.r_format.rs =

arch/mips/math-emu/cp1emu.c

170

mips32_insn.r_format.rt =

arch/mips/math-emu/cp1emu.c

172

mips32_insn.r_format.rd = 0;

arch/mips/math-emu/cp1emu.c

173

mips32_insn.r_format.re = insn.mm_fp5_format.fd;

arch/mips/math-emu/cp1emu.c

174

mips32_insn.r_format.func = func;

arch/mips/math-emu/cp1emu.c

253

mips32_insn.r_format.opcode = spec_op;

arch/mips/math-emu/cp1emu.c

254

mips32_insn.r_format.rs = insn.mm_fp4_format.fs;

arch/mips/math-emu/cp1emu.c

255

mips32_insn.r_format.rt =

arch/mips/math-emu/cp1emu.c

257

mips32_insn.r_format.rd = insn.mm_fp4_format.rt;

arch/mips/math-emu/cp1emu.c

258

mips32_insn.r_format.re = 0;

arch/mips/math-emu/cp1emu.c

259

mips32_insn.r_format.func = movc_op;

arch/mips/math-emu/cp1emu.c

435

switch (insn.r_format.func) {

arch/mips/math-emu/cp1emu.c

437

if (insn.r_format.rd != 0) {

arch/mips/math-emu/cp1emu.c

438

regs->regs[insn.r_format.rd] =

arch/mips/math-emu/cp1emu.c

445

if (NO_R6EMU && insn.r_format.func == jr_op)

arch/mips/math-emu/cp1emu.c

447

*contpc = regs->regs[insn.r_format.rs];