regmask
const struct regmask *tbl,
static const struct regmask pardon[] = {
static const struct regmask wo[] = {
unsigned int regmask, regval;
regmask = AXP192_GPIO30_IN_RANGE_GPIO0;
regmask = AXP192_GPIO30_IN_RANGE_GPIO1;
regmask = AXP192_GPIO30_IN_RANGE_GPIO2;
regmask = AXP192_GPIO30_IN_RANGE_GPIO3;
return regmap_update_bits(info->regmap, AXP192_GPIO30_IN_RANGE, regmask, regval);
unsigned int regmask, regval;
regmask = AXP20X_GPIO10_IN_RANGE_GPIO0;
regmask = AXP20X_GPIO10_IN_RANGE_GPIO1;
return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, regmask, regval);
int regmask;
regmask = chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
regval |= regmask;
regval &= ~regmask;
if (temp & (regmask[reg_ofdm_rst_len - 1] << reg_ofdm_rst_pos))
temp = regmask[reg_ofdm_rst_len - 1] << reg_ofdm_rst_pos;
*value = (temp >> pos) & regmask[len - 1];
mask = regmask[len - 1] << pos;
done = temp & (regmask[i2c_m_status_wdat_done_len - 1]
fail = temp & (regmask[i2c_m_status_wdat_fail_len - 1]
u8 regmask[8] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };
extern u8 regmask[8];
static int hdsp_toggle_setting(struct hdsp *hdsp, u32 regmask)
return (hdsp->control_register & regmask) ? 1 : 0;
static int hdsp_set_toggle_setting(struct hdsp *hdsp, u32 regmask, int out)
hdsp->control_register |= regmask;
hdsp->control_register &= ~regmask;
u32 regmask = kcontrol->private_value;
ucontrol->value.integer.value[0] = hdsp_toggle_setting(hdsp, regmask);
u32 regmask = kcontrol->private_value;
change = (int) val != hdsp_toggle_setting(hdsp, regmask);
hdsp_set_toggle_setting(hdsp, regmask, val);
static int hdspm_set_toggle_setting(struct hdspm *hdspm, u32 regmask, int out);
static int hdspm_toggle_setting(struct hdspm *hdspm, u32 regmask)
return (reg & regmask) ? 1 : 0;
static int hdspm_set_toggle_setting(struct hdspm *hdspm, u32 regmask, int out)
*reg |= regmask;
*reg &= ~regmask;
u32 regmask = kcontrol->private_value;
ucontrol->value.integer.value[0] = hdspm_toggle_setting(hdspm, regmask);
u32 regmask = kcontrol->private_value;
change = (int) val != hdspm_toggle_setting(hdspm, regmask);
hdspm_set_toggle_setting(hdspm, regmask, val);
static int hdspm_tristate(struct hdspm *hdspm, u32 regmask)
u32 reg = hdspm->settings_register & (regmask * 3);
return reg / regmask;
static int hdspm_set_tristate(struct hdspm *hdspm, int mode, u32 regmask)
hdspm->settings_register &= ~(regmask * 3);
hdspm->settings_register |= (regmask * mode);
u32 regmask = kcontrol->private_value;
switch (regmask) {
u32 regmask = kcontrol->private_value;
ucontrol->value.enumerated.item[0] = hdspm_tristate(hdspm, regmask);
u32 regmask = kcontrol->private_value;
change = val != hdspm_tristate(hdspm, regmask);
hdspm_set_tristate(hdspm, val, regmask);
int regmask, regsave;
regmask = (channel == 0) ? M98095_EQ1EN : M98095_EQ2EN;
snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, regsave);
int regmask, regsave;
regmask = (channel == 0) ? M98095_BQ1EN : M98095_BQ2EN;
snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, regsave);
unsigned int regmask = (mask >> (regwshift * (regcount - i - 1))) &
regmask, regval);