regmap_fields_write
rc = regmap_fields_write(flash_data->r_fields[REG_ITARGET], chan_id, itarget);
rc = regmap_fields_write(flash_data->r_fields[REG_CHAN_TIMER], chan_id, timer);
rc = regmap_fields_write(
regmap_fields_write(priv->ps_forward, port, val);
ret = regmap_fields_write(priv->ps_management, port, val);
regmap_fields_write(priv->ps_sel_speed, port, val);
regmap_fields_write(priv->ps_forward, partner->index,
regmap_fields_write(priv->ps_forward, port, XRS_PORT_DISABLED);
regmap_fields_write(priv->ps_forward, partner->index,
regmap_fields_write(priv->ps_forward, port, XRS_PORT_FORWARDING);
regmap_fields_write(priv->ps_forward, partner->index,
regmap_fields_write(priv->ps_forward, port, XRS_PORT_DISABLED);
regmap_fields_write(priv->ps_forward, partner->index,
regmap_fields_write(priv->ps_forward, port, XRS_PORT_FORWARDING);
regmap_fields_write((ocelot)->regfields[(reg)], (id), (val))
ret = regmap_fields_write(dmactl->codec_intf, id, codec_intf);
ret = regmap_fields_write(dmactl->codec_fs_sel, id, 0x0);
ret = regmap_fields_write(dmactl->codec_fs_delay, id, 0x0);
ret = regmap_fields_write(dmactl->codec_pack, id, 0x1);
ret = regmap_fields_write(dmactl->codec_enable, id, LPAIF_DMACTL_ENABLE_ON);
ret = regmap_fields_write(dmactl->codec_channel, id, regval);
ret = regmap_fields_write(dmactl->codec_enable, id, LPAIF_DMACTL_ENABLE_OFF);
regmap_fields_write(i2sctl->spken, id, LPAIF_I2SCTL_SPKEN_DISABLE);
regmap_fields_write(i2sctl->micen, id, LPAIF_I2SCTL_MICEN_DISABLE);
ret = regmap_fields_write(i2sctl->loopback, id,
ret = regmap_fields_write(i2sctl->wssrc, id,
ret = regmap_fields_write(i2sctl->bitwidth, id, regval);
ret = regmap_fields_write(i2sctl->spkmode, id,
ret = regmap_fields_write(i2sctl->spkmono, id,
ret = regmap_fields_write(i2sctl->spkmono, id,
ret = regmap_fields_write(i2sctl->micmode, id,
ret = regmap_fields_write(i2sctl->micmono, id,
ret = regmap_fields_write(i2sctl->micmono, id,
ret = regmap_fields_write(i2sctl->spken, id,
ret = regmap_fields_write(i2sctl->micen, id,
ret = regmap_fields_write(i2sctl->spken, id,
ret = regmap_fields_write(i2sctl->micen, id,
ret = regmap_fields_write(i2sctl->spken, id, LPAIF_I2SCTL_SPKEN_ENABLE);
ret = regmap_fields_write(i2sctl->micen, id, LPAIF_I2SCTL_MICEN_ENABLE);
ret = regmap_fields_write(dmactl->bursten, id, LPAIF_DMACTL_BURSTEN_INCR4);
ret = regmap_fields_write(dmactl->fifowm, id, LPAIF_DMACTL_FIFOWM_8);
ret = regmap_fields_write(dmactl->burst8, id,
ret = regmap_fields_write(dmactl->burst16, id,
ret = regmap_fields_write(dmactl->dynburst, id,
ret = regmap_fields_write(dmactl->intf, id,
ret = regmap_fields_write(dmactl->wpscnt, id, regval);
ret = regmap_fields_write(dmactl->fifowm, id, LPAIF_DMACTL_FIFOWM_8);
ret = regmap_fields_write(dmactl->enable, id, LPAIF_DMACTL_ENABLE_ON);
ret = regmap_fields_write(dmactl->enable, id,
ret = regmap_fields_write(dmactl->dyncclk, id,
ret = regmap_fields_write(dmactl->dyncclk, id, LPAIF_DMACTL_DYNCLK_ON);
ret = regmap_fields_write(dmactl->dyncclk, id, LPAIF_DMACTL_DYNCLK_ON);
ret = regmap_fields_write(dmactl->enable, id,
ret = regmap_fields_write(dmactl->dyncclk, id,
ret = regmap_fields_write(dmactl->dyncclk, id, LPAIF_DMACTL_DYNCLK_OFF);
ret = regmap_fields_write(dmactl->dyncclk, id, LPAIF_DMACTL_DYNCLK_OFF);