regmap_clear_bits

drivers/clk/clk-si521xx.c

209

regmap_clear_bits(si->regmap, SI521XX_REG_OE(si_clk->reg), si_clk->bit);

drivers/clk/clk-versaclock5.c

422

return regmap_clear_bits(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV,

drivers/clk/clk-versaclock5.c

590

ret = regmap_clear_bits(vc5->regmap, VC5_GLOBAL_REGISTER,

drivers/clk/clk-versaclock5.c

676

regmap_clear_bits(vc5->regmap, VC5_CLK_OUTPUT_CFG(hwdata->num, 1),

drivers/clk/mediatek/clk-gate.c

77

regmap_clear_bits(cg->regmap, cg->gate->regs->sta_ofs,

drivers/clk/qcom/ipq-cmn-pll.c

264

ret = regmap_clear_bits(cmn_pll->regmap, CMN_PLL_POWER_ON_AND_RESET,

drivers/clk/sophgo/clk-sg2044-pll.c

316

return regmap_clear_bits(pll->common.regmap,

drivers/clk/thead/clk-th1520-ap.c

337

regmap_clear_bits(pll->common.map, pll->common.cfg1,

drivers/counter/stm32-timer-cnt.c

443

regmap_clear_bits(priv->regmap, TIM_CCER, cc->ccer_bits);

drivers/counter/stm32-timer-cnt.c

444

regmap_clear_bits(priv->regmap, cc->ccmr_reg, cc->ccmr_mask);

drivers/counter/ti-ecap-capture.c

261

regmap_clear_bits(ecap_dev->regmap, ECAP_ECCTL_REG, ECAP_CAPPOL_BIT(idx));

drivers/gpio/gpio-adp5585.c

105

return regmap_clear_bits(adp5585_gpio->regmap, info->gpio_dir_a + info->bank(off),

drivers/gpio/gpio-adp5585.c

255

return regmap_clear_bits(adp5585_gpio->regmap,

drivers/gpio/gpio-bd71815.c

51

return regmap_clear_bits(bd71815->regmap, BD71815_REG_GPO, bit);

drivers/gpio/gpio-bd72720.c

127

return regmap_clear_bits(bdgpio->regmap, regs[offset],

drivers/gpio/gpio-exar.c

123

return regmap_clear_bits(exar_gpio->regmap, addr, BIT(bit));

drivers/gpio/gpio-tps65910.c

49

return regmap_clear_bits(tps65910->regmap, TPS65910_GPIO0 + offset,

drivers/gpio/gpio-tps65910.c

74

return regmap_clear_bits(tps65910->regmap, TPS65910_GPIO0 + offset,

drivers/gpio/gpio-wcove.c

135

regmap_clear_bits(wg->regmap, reg, mask);

drivers/gpio/gpio-wcove.c

482

ret = regmap_clear_bits(wg->regmap, IRQ_MASK_BASE + 0, GPIO_IRQ0_MASK);

drivers/gpio/gpio-wcove.c

487

ret = regmap_clear_bits(wg->regmap, IRQ_MASK_BASE + 1, GPIO_IRQ1_MASK);

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1284

ret = regmap_clear_bits(pdata->regmap, SN_IRQ_EVENTS_EN_REG,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

554

regmap_clear_bits(priv->map, JZ_REG_LCD_OSDC, en_bit);

drivers/gpu/drm/ingenic/ingenic-ipu.c

661

regmap_clear_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CHIP_EN);

drivers/gpu/drm/mediatek/mtk_hdmi.c

163

regmap_clear_bits(hdmi->regs, ctrl_reg, ctrl_frame_en);

drivers/gpu/drm/mediatek/mtk_hdmi.c

199

regmap_clear_bits(hdmi->regs, GRL_CFG4, CTRL_AVMUTE);

drivers/gpu/drm/mediatek/mtk_hdmi.c

229

regmap_clear_bits(hdmi->regs, GRL_CFG4, CFG4_MHL_MODE);

drivers/gpu/drm/mediatek/mtk_hdmi.c

234

regmap_clear_bits(hdmi->regs, GRL_CFG2, CFG2_MHL_DE_SEL);

drivers/gpu/drm/mediatek/mtk_hdmi.c

326

regmap_clear_bits(hdmi->regs, GRL_AOUT_CFG, HIGH_BIT_RATE_PACKET_ALIGN);

drivers/gpu/drm/mediatek/mtk_hdmi.c

654

regmap_clear_bits(hdmi->regs, GRL_CFG2, CFG2_ACLK_INV);

drivers/gpu/drm/mediatek/mtk_hdmi.c

90

regmap_clear_bits(hdmi->regs, GRL_AUDIO_CFG, AUDIO_ZERO);

drivers/gpu/drm/mediatek/mtk_hdmi.c

99

regmap_clear_bits(hdmi->regs, GRL_CFG3, CFG3_CONTROL_PACKET_DELAY);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

109

regmap_clear_bits(hdmi->regs, TOP_VMUTE_CFG1, REG_VMUTE_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1160

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AUD_EN_WR | AUD_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1161

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AUD_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

117

regmap_clear_bits(hdmi->regs, AIP_TXCTRL, AUD_MUTE_FIFO_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1170

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AVI_EN_WR | AVI_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1171

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AVI_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1180

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, SPD_EN_WR | SPD_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1181

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, SPD_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1190

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, VSIF_EN_WR | VSIF_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1191

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, VSIF_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1203

regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_ENABLE);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

132

regmap_clear_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_RSTB);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

153

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AUD_EN | AUD_EN_WR);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

154

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AUD_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

173

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AVI_EN_WR | AVI_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

174

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AVI_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

195

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, SPD_EN_WR | SPD_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

196

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, SPD_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

219

regmap_clear_bits(hdmi->regs, TOP_INFO_EN, VSIF_EN_WR | VSIF_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

220

regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, VSIF_RPT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

254

regmap_clear_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMI_YUV420_MODE);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

261

regmap_clear_bits(hdmi->regs, VID_OUT_FORMAT, OUTPUT_FORMAT_DEMUX_420_ENABLE);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

308

regmap_clear_bits(hdmi->regs, AIP_CTRL, CTS_SW_SEL);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

335

regmap_clear_bits(hdmi->regs, AIP_TXCTRL, AUD_PACKET_DROP);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

373

regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, I2S2DSD_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

429

regmap_clear_bits(hdmi->regs, AIP_TXCTRL, AUD_LAYOUT_1);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

462

regmap_clear_bits(hdmi->regs, AIP_I2S_CTRL, SCK_EDGE_RISE);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

580

regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, WR_1UI_LOCK);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

581

regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, FS_OVERRIDE_WRITE);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

582

regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, WR_2UI_LOCK);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

606

regmap_clear_bits(hdmi->regs, AIP_CTRL,

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

609

regmap_clear_bits(hdmi->regs, AIP_TXCTRL, DSD_MUTE_EN | AUD_LAYOUT_1);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

651

regmap_clear_bits(hdmi->regs, AIP_CTRL, AUD_IN_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

658

regmap_clear_bits(hdmi->regs, AIP_TPI_CTRL, TPI_AUDIO_LOOKUP_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

668

regmap_clear_bits(hdmi->regs, AIP_TXCTRL, arst_bits);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

71

regmap_clear_bits(hdmi->regs, TOP_INT_ENABLE00, HPD_PORD_HWIRQS);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

727

regmap_clear_bits(hdmi->regs, TOP_CFG00, DEEPCOLOR_PKT_EN);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

729

regmap_clear_bits(hdmi->regs, TOP_MISC_CTLR, DEEP_COLOR_ADD);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

734

regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_MODE_HDMI);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

81

regmap_clear_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

82

regmap_clear_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_SW);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

83

regmap_clear_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_HPD);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

94

regmap_clear_bits(hdmi->regs, TOP_CFG00, SCR_ON | HDMI2_ON);

drivers/gpu/drm/panel/panel-abt-y030xx067a.c

222

regmap_clear_bits(priv->map, 0x06, REG06_XPSAVE);

drivers/gpu/drm/panel/panel-auo-a030jtn01.c

134

return regmap_clear_bits(priv->map, REG05, REG05_STDBY);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

838

regmap_clear_bits(vop2->map, RK3568_SYS_AUTO_GATING_CTRL,

drivers/gpu/drm/stm/ltdc.c

1149

regmap_clear_bits(ldev->regmap, LTDC_IER, IER_LIE);

drivers/gpu/drm/stm/ltdc.c

1169

ret = regmap_clear_bits(ldev->regmap, LTDC_GCR, GCR_CRCEN);

drivers/gpu/drm/stm/ltdc.c

1720

regmap_clear_bits(ldev->regmap, LTDC_GCR, GCR_LTDCEN);

drivers/gpu/drm/stm/ltdc.c

2038

regmap_clear_bits(ldev->regmap, LTDC_IER, IER_MASK);

drivers/gpu/drm/stm/ltdc.c

814

regmap_clear_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_TERRIE);

drivers/hwmon/amc6821.c

978

err = regmap_clear_bits(regmap, AMC6821_REG_CONF3, AMC6821_CONF3_THERM_FAN_EN);

drivers/hwmon/amc6821.c

981

err = regmap_clear_bits(regmap, AMC6821_REG_CONF2,

drivers/hwmon/lm92.c

289

return regmap_clear_bits(regmap, LM92_REG_CONFIG, 0x01);

drivers/hwmon/lm95234.c

483

ret = regmap_clear_bits(regmap, LM95234_REG_CONFIG, 0x40);

drivers/hwmon/ltc4282.c

1300

return regmap_clear_bits(st->map, LTC4282_ILIM_ADJUST,

drivers/hwmon/ltc4282.c

1473

ret = regmap_clear_bits(st->map, LTC4282_CTRL_LSB,

drivers/hwmon/ltc4282.c

1480

ret = regmap_clear_bits(st->map, LTC4282_CTRL_LSB,

drivers/hwmon/ltc4282.c

213

regmap_clear_bits(st->map, LTC4282_CLK_DIV, LTC4282_CLKOUT_MASK);

drivers/hwmon/ltc4282.c

273

return regmap_clear_bits(st->map, reg, mask);

drivers/hwmon/ltc4282.c

694

return regmap_clear_bits(st->map, LTC4282_FAULT_LOG,

drivers/hwmon/ltc4282.c

825

return regmap_clear_bits(st->map, LTC4282_FAULT_LOG,

drivers/hwmon/ltc4282.c

828

return regmap_clear_bits(st->map, LTC4282_FAULT_LOG,

drivers/hwmon/ltc4282.c

927

return regmap_clear_bits(st->map, LTC4282_FAULT_LOG,

drivers/hwmon/max1619.c

299

return regmap_clear_bits(regmap, MAX1619_REG_CONFIG, 0x40);

drivers/hwmon/max31760.c

267

return regmap_clear_bits(state->regmap, REG_CR3, BIT(channel));

drivers/hwmon/max31760.c

288

return regmap_clear_bits(state->regmap, REG_CR2, CR2_DFC);

drivers/hwmon/max31760.c

475

ret = regmap_clear_bits(state->regmap, REG_CR1, CR1_HYST);

drivers/hwmon/max31760.c

574

return regmap_clear_bits(state->regmap, REG_CR2, CR2_STBY);

drivers/hwmon/max6639.c

331

err = regmap_clear_bits(data->regmap, MAX6639_REG_GCONFIG,

drivers/hwmon/max6697.c

305

ret = regmap_clear_bits(regmap, MAX6581_REG_OFFSET_SELECT,

drivers/hwmon/tps23861.c

531

regmap_clear_bits(data->regmap,

drivers/iio/accel/adxl345_core.c

851

ret = regmap_clear_bits(st->regmap, ADXL345_REG_TAP_AXIS,

drivers/iio/accel/fxls8962af-core.c

234

return regmap_clear_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,

drivers/iio/accel/fxls8962af-core.c

874

ret = regmap_clear_bits(data->regmap, FXLS8962AF_INT_EN,

drivers/iio/accel/kionix-kx022a.c

479

ret = regmap_clear_bits(data->regmap, data->chip_info->cntl,

drivers/iio/accel/kionix-kx022a.c

910

return regmap_clear_bits(data->regmap, data->chip_info->cntl,

drivers/iio/accel/kionix-kx022a.c

942

ret = regmap_clear_bits(data->regmap, data->ien_reg, KX022A_MASK_WMI);

drivers/iio/accel/kionix-kx022a.c

946

ret = regmap_clear_bits(data->regmap, data->chip_info->buf_cntl2,

drivers/iio/accel/kxsd9.c

370

ret = regmap_clear_bits(st->map, KXSD9_REG_CTRL_B, KXSD9_CTRL_B_ENABLE);

drivers/iio/accel/msa311.c

1032

err = regmap_clear_bits(msa311->regs, MSA311_ODR_REG,

drivers/iio/adc/88pm886-gpadc.c

301

return regmap_clear_bits(map, PM886_REG_GPADC_CONFIG(0x6), BIT(0));

drivers/iio/adc/ad4062.c

1582

ret = regmap_clear_bits(st->regmap, AD4062_REG_DEVICE_CONFIG,

drivers/iio/adc/ad4080.c

323

return regmap_clear_bits(st->regmap, AD4080_REG_ADC_DATA_INTF_CONFIG_A,

drivers/iio/adc/ad4130.c

1935

ret = regmap_clear_bits(st->regmap, AD4130_FIFO_CONTROL_REG,

drivers/iio/adc/ad4695.c

1657

return regmap_clear_bits(st->regmap, AD4695_REG_GP_MODE,

drivers/iio/adc/ad4695.c

1935

ret = regmap_clear_bits(st->regmap, AD4695_REG_REF_CTRL,

drivers/iio/adc/ad4695.c

460

ret = regmap_clear_bits(st->regmap, AD4695_REG_SEQ_CTRL,

drivers/iio/adc/ad4695.c

916

regmap_clear_bits(st->regmap, AD4695_REG_GP_MODE,

drivers/iio/adc/ad4695.c

949

ret = regmap_clear_bits(st->regmap, AD4695_REG_GP_MODE,

drivers/iio/adc/ad4851.c

305

ret = regmap_clear_bits(st->regmap, AD4851_REG_OVERSAMPLE,

drivers/iio/adc/ad4851.c

353

ret = regmap_clear_bits(st->regmap, AD4851_REG_PACKET,

drivers/iio/adc/ad7173.c

559

regmap_clear_bits(st->reg_gpiocon_regmap, AD7173_REG_GPIO,

drivers/iio/adc/ad7768-1.c

749

ret = regmap_clear_bits(st->regmap, AD7768_REG_GPIO_CONTROL,

drivers/iio/adc/ade9000.c

1537

ret = regmap_clear_bits(st->regmap, ADE9000_REG_WFB_CFG,

drivers/iio/adc/ade9000.c

1550

ret = regmap_clear_bits(st->regmap, ADE9000_REG_MASK0, interrupts);

drivers/iio/adc/adi-axi-adc.c

170

return regmap_clear_bits(st->regmap,

drivers/iio/adc/adi-axi-adc.c

191

return regmap_clear_bits(st->regmap, ADI_AXI_ADC_REG_CTRL,

drivers/iio/adc/adi-axi-adc.c

340

return regmap_clear_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan),

drivers/iio/adc/adi-axi-adc.c

419

return regmap_clear_bits(st->regmap, ADI_AXI_ADC_REG_CNTRL_3,

drivers/iio/adc/adi-axi-adc.c

436

return regmap_clear_bits(st->regmap, ADI_AXI_ADC_REG_CNTRL_3,

drivers/iio/adc/bcm_iproc_adc.c

360

ret = regmap_clear_bits(adc_priv->regmap, IPROC_ANALOG_CONTROL,

drivers/iio/adc/bcm_iproc_adc.c

544

ret = regmap_clear_bits(adc_priv->regmap, IPROC_REGCTL2,

drivers/iio/adc/berlin2-adc.c

132

regmap_clear_bits(priv->regmap, BERLIN2_SM_ADC_STATUS,

drivers/iio/adc/berlin2-adc.c

142

regmap_clear_bits(priv->regmap, BERLIN2_SM_CTRL,

drivers/iio/adc/berlin2-adc.c

183

regmap_clear_bits(priv->regmap, BERLIN2_SM_TSEN_STATUS,

drivers/iio/adc/berlin2-adc.c

193

regmap_clear_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL,

drivers/iio/adc/berlin2-adc.c

287

regmap_clear_bits(regmap, BERLIN2_SM_CTRL, BERLIN2_SM_CTRL_ADC_POWER);

drivers/iio/adc/cpcap-adc.c

426

error = regmap_clear_bits(ddata->reg, CPCAP_REG_ADCC2,

drivers/iio/adc/cpcap-adc.c

453

error = regmap_clear_bits(ddata->reg, CPCAP_REG_ADCC1,

drivers/iio/adc/cpcap-adc.c

615

error = regmap_clear_bits(ddata->reg, CPCAP_REG_ADCC2,

drivers/iio/adc/fsl-imx25-gcq.c

118

regmap_clear_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ);

drivers/iio/adc/fsl-imx25-gcq.c

96

regmap_clear_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS);

drivers/iio/adc/ina2xx-adc.c

1048

ret = regmap_clear_bits(chip->regmap, INA2XX_CONFIG, INA2XX_MODE_MASK);

drivers/iio/adc/intel_dc_ti_adc.c

198

regmap_clear_bits(info->regmap, DC_TI_ADC_CNTL_REG,

drivers/iio/adc/intel_dc_ti_adc.c

235

regmap_clear_bits(info->regmap, DC_TI_ADC_CNTL_REG,

drivers/iio/adc/intel_mrfld_adc.c

84

regmap_clear_bits(regmap, BCOVE_MADCIRQ, BCOVE_ADCIRQ_ALL);

drivers/iio/adc/intel_mrfld_adc.c

85

regmap_clear_bits(regmap, BCOVE_MIRQLVL1, BCOVE_LVL1_ADC);

drivers/iio/adc/max11410.c

285

ret = regmap_clear_bits(state->regmap, MAX11410_REG_FILTER,

drivers/iio/adc/meson_saradc.c

1081

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_REG3,

drivers/iio/adc/meson_saradc.c

1106

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_REG3,

drivers/iio/adc/meson_saradc.c

567

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_REG0,

drivers/iio/adc/meson_saradc.c

576

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_REG0,

drivers/iio/adc/meson_saradc.c

616

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_DELAY,

drivers/iio/adc/meson_saradc.c

871

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_REG0,

drivers/iio/adc/meson_saradc.c

877

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_REG3,

drivers/iio/adc/meson_saradc.c

971

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_DELTA_10,

drivers/iio/adc/meson_saradc.c

973

regmap_clear_bits(priv->regmap, MESON_SAR_ADC_DELTA_10,

drivers/iio/adc/mp2629_adc.c

165

regmap_clear_bits(info->regmap, MP2629_REG_ADC_CTRL,

drivers/iio/adc/mp2629_adc.c

167

regmap_clear_bits(info->regmap, MP2629_REG_ADC_CTRL, MP2629_ADC_START);

drivers/iio/adc/mp2629_adc.c

181

regmap_clear_bits(info->regmap, MP2629_REG_ADC_CTRL,

drivers/iio/adc/mp2629_adc.c

183

regmap_clear_bits(info->regmap, MP2629_REG_ADC_CTRL, MP2629_ADC_START);

drivers/iio/adc/mt6359-auxadc.c

459

regmap_clear_bits(regmap, cinfo->regs[PMIC_AUXADC_IMP0], MT6358_IMP0_CLEAR);

drivers/iio/adc/mt6359-auxadc.c

460

regmap_clear_bits(regmap, cinfo->regs[PMIC_AUXADC_IMP1], MT6358_IMP1_AUTOREPEAT_EN);

drivers/iio/adc/mt6359-auxadc.c

461

regmap_clear_bits(regmap, cinfo->regs[PMIC_AUXADC_DCM_CON], MT6358_DCM_CK_SW_EN);

drivers/iio/adc/mt6359-auxadc.c

623

regmap_clear_bits(regmap, cinfo->regs[PMIC_HK_TOP_RST_CON0], PMIC_RG_RESET_VAL);

drivers/iio/adc/nct7201.c

446

ret = regmap_clear_bits(chip->regmap, NCT7201_REG_CONFIGURATION,

drivers/iio/adc/qcom-spmi-rradc.c

368

ret = regmap_clear_bits(chip->regmap, chip->base + RR_ADC_LOG,

drivers/iio/adc/qcom-spmi-rradc.c

391

ret = regmap_clear_bits(chip->regmap, chip->base + RR_ADC_CTL,

drivers/iio/adc/qcom-spmi-rradc.c

471

regmap_clear_bits(chip->regmap, chip->base + chan->trigger_addr,

drivers/iio/adc/qcom-spmi-rradc.c

501

regmap_clear_bits(chip->regmap, chip->base + RR_ADC_BATT_ID_TRIGGER,

drivers/iio/adc/qcom-spmi-rradc.c

505

regmap_clear_bits(chip->regmap, chip->base + RR_ADC_BATT_ID_CTRL,

drivers/iio/adc/rohm-bd79112.c

338

ret = regmap_clear_bits(data->map, gpi_reg, bit);

drivers/iio/adc/rohm-bd79112.c

349

return regmap_clear_bits(data->map, gpo_reg, bit);

drivers/iio/adc/rohm-bd79124.c

393

ret = regmap_clear_bits(data->map, BD79124_REG_SEQ_CFG,

drivers/iio/adc/rohm-bd79124.c

427

ret = regmap_clear_bits(data->map, BD79124_REG_SEQ_CFG,

drivers/iio/adc/rohm-bd79124.c

500

regmap_clear_bits(data->map, BD79124_REG_ALERT_CH_SEL,

drivers/iio/adc/rohm-bd79124.c

626

ret = regmap_clear_bits(data->map, BD79124_REG_SEQ_CFG,

drivers/iio/adc/rohm-bd79124.c

653

ret = regmap_clear_bits(data->map, BD79124_REG_SEQ_CFG,

drivers/iio/adc/rohm-bd79124.c

960

ret = regmap_clear_bits(data->map, BD79124_REG_SEQ_CFG,

drivers/iio/adc/sc27xx_adc.c

562

regmap_clear_bits(data->regmap, data->base + SC27XX_ADC_CTL,

drivers/iio/adc/sc27xx_adc.c

791

regmap_clear_bits(data->regmap, data->var_data->clk_en,

drivers/iio/adc/sc27xx_adc.c

794

regmap_clear_bits(data->regmap, data->var_data->module_en,

drivers/iio/adc/sc27xx_adc.c

805

regmap_clear_bits(data->regmap, data->var_data->clk_en,

drivers/iio/adc/sc27xx_adc.c

808

regmap_clear_bits(data->regmap, data->var_data->module_en,

drivers/iio/adc/stm32-dfsdm-adc.c

1053

regmap_clear_bits(adc->dfsdm->regmap, DFSDM_CR1(adc->fl_id),

drivers/iio/adc/stm32-dfsdm-adc.c

835

regmap_clear_bits(regmap, DFSDM_CR1(adc->fl_id), DFSDM_CR1_CFG_MASK);

drivers/iio/adc/stm32-dfsdm-adc.c

849

regmap_clear_bits(regmap, DFSDM_CR1(adc->fl_id), DFSDM_CR1_CFG_MASK);

drivers/iio/chemical/ens160_core.c

290

return regmap_clear_bits(data->regmap, ENS160_REG_CONFIG,

drivers/iio/dac/ad8460.c

103

return regmap_clear_bits(state->regmap, AD8460_CTRL_REG(0x00),

drivers/iio/dac/ad8460.c

915

ret = regmap_clear_bits(state->regmap, AD8460_CTRL_REG(0x01),

drivers/iio/dac/ad9739a.c

183

return regmap_clear_bits(st->regmap, AD9739A_REG_MODE,

drivers/iio/dac/adi-axi-dac.c

626

return regmap_clear_bits(st->regmap, AXI_DAC_CNTRL_2_REG,

drivers/iio/dac/adi-axi-dac.c

669

return regmap_clear_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG,

drivers/iio/dac/adi-axi-dac.c

697

return regmap_clear_bits(st->regmap, AXI_DAC_CNTRL_2_REG,

drivers/iio/dac/adi-axi-dac.c

731

ret = regmap_clear_bits(st->regmap, AXI_DAC_CNTRL_2_REG,

drivers/iio/dac/adi-axi-dac.c

753

return regmap_clear_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG,

drivers/iio/gyro/bmg160_core.c

285

ret = regmap_clear_bits(data->regmap, BMG160_REG_INT_EN_1,

drivers/iio/gyro/mpu3050-core.c

876

ret = regmap_clear_bits(mpu3050->map, MPU3050_PWR_MGM,

drivers/iio/health/afe4403.c

448

ret = regmap_clear_bits(afe->regmap, AFE440X_CONTROL2,

drivers/iio/health/afe4404.c

456

ret = regmap_clear_bits(afe->regmap, AFE440X_CONTROL2,

drivers/iio/imu/bmi270/bmi270_core.c

1494

ret = regmap_clear_bits(regmap, BMI270_PWR_CONF_REG,

drivers/iio/imu/bmi270/bmi270_core.c

1507

ret = regmap_clear_bits(regmap, BMI270_INIT_CTRL_REG,

drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c

361

ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,

drivers/iio/imu/inv_icm42600/inv_icm42600_core.c

428

ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_SOURCE1,

drivers/iio/imu/inv_icm42600/inv_icm42600_core.c

659

ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_CONFIG1,

drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c

31

ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,

drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c

30

ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,

drivers/iio/imu/inv_icm45600/inv_icm45600_buffer.c

304

ret = regmap_clear_bits(st->map, INV_ICM45600_REG_FIFO_CONFIG3,

drivers/iio/imu/inv_icm45600/inv_icm45600_buffer.c

316

ret = regmap_clear_bits(st->map, INV_ICM45600_REG_INT1_CONFIG0,

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

811

ret = regmap_clear_bits(st->map, INV_ICM45600_REG_FIFO_CONFIG3,

drivers/iio/light/adux1020.c

528

ret = regmap_clear_bits(data->regmap,

drivers/iio/light/adux1020.c

764

ret = regmap_clear_bits(data->regmap, ADUX1020_REG_LED_CURRENT,

drivers/iio/light/bh1745.c

244

ret = regmap_clear_bits(data->regmap, BH1745_MODE_CTRL2,

drivers/iio/light/bh1745.c

647

return regmap_clear_bits(data->regmap,

drivers/iio/light/iqs621-als.c

89

return regmap_clear_bits(iqs62x->regmap, IQS620_GLBL_EVENT_MASK,

drivers/iio/light/isl29018.c

554

status = regmap_clear_bits(chip->regmap,

drivers/iio/light/ltr390.c

184

ret = regmap_clear_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_UVS_MODE);

drivers/iio/light/ltr390.c

623

return regmap_clear_bits(data->regmap, LTR390_INT_CFG, LTR390_LS_INT_EN);

drivers/iio/light/ltr390.c

635

return regmap_clear_bits(data->regmap, LTR390_INT_CFG, LTR390_LS_INT_SEL_UVS);

drivers/iio/light/ltr390.c

747

ret = regmap_clear_bits(data->regmap, LTR390_INT_CFG, LTR390_LS_INT_EN);

drivers/iio/light/ltr390.c

755

ret = regmap_clear_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_SENSOR_ENABLE);

drivers/iio/light/ltr390.c

857

return regmap_clear_bits(data->regmap, LTR390_MAIN_CTRL,

drivers/iio/light/ltr390.c

875

return regmap_clear_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_SENSOR_ENABLE);

drivers/iio/light/opt4060.c

514

ret = regmap_clear_bits(chip->regmap, OPT4060_CTRL, OPT4060_CTRL_OPER_MODE_MASK);

drivers/iio/light/rohm-bu27034.c

837

return regmap_clear_bits(data->regmap, BU27034_REG_MODE_CONTROL4,

drivers/iio/light/st_uvis25_core.c

337

return regmap_clear_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR,

drivers/iio/light/veml3235.c

71

ret = regmap_clear_bits(data->regmap, VEML3235_REG_CONF,

drivers/iio/light/veml6030.c

229

ret = regmap_clear_bits(data->regmap, VEML6030_REG_ALS_CONF,

drivers/iio/light/veml6046x00.c

284

ret = regmap_clear_bits(data->regmap, VEML6046X00_REG_CONF0,

drivers/iio/light/veml6046x00.c

291

return regmap_clear_bits(data->regmap, VEML6046X00_REG_CONF1,

drivers/iio/pressure/bmp280-core.c

2309

ret = regmap_clear_bits(data->regmap, BMP580_REG_NVM_ADDR,

drivers/iio/pressure/rohm-bm1390.c

586

ret = regmap_clear_bits(data->regmap, BM1390_REG_FIFO_CTRL,

drivers/iio/pressure/rohm-bm1390.c

594

return regmap_clear_bits(data->regmap, BM1390_REG_MODE_CTRL,

drivers/iio/pressure/rohm-bm1390.c

705

return regmap_clear_bits(data->regmap, BM1390_REG_MODE_CTRL,

drivers/iio/proximity/sx9500.c

221

return regmap_clear_bits(data->regmap, reg, bitmask);

drivers/iio/proximity/sx9500.c

801

regmap_clear_bits(data->regmap, SX9500_REG_PROX_CTRL0,

drivers/iio/proximity/sx_common.c

122

return regmap_clear_bits(data->regmap, data->chip_info->reg_irq_msk,

drivers/iio/temperature/mlx90632.c

337

ret = regmap_clear_bits(data->regmap, MLX90632_REG_STATUS,

drivers/iio/trigger/stm32-timer-trigger.c

197

regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);

drivers/iio/trigger/stm32-timer-trigger.c

198

regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

drivers/iio/trigger/stm32-timer-trigger.c

204

regmap_clear_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS2);

drivers/iio/trigger/stm32-timer-trigger.c

206

regmap_clear_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS);

drivers/iio/trigger/stm32-timer-trigger.c

512

regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

drivers/iio/trigger/stm32-timer-trigger.c

698

regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);

drivers/iio/trigger/stm32-timer-trigger.c

774

regmap_clear_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS2);

drivers/iio/trigger/stm32-timer-trigger.c

836

regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

drivers/iio/trigger/stm32-timer-trigger.c

857

regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

drivers/input/misc/pf1550-onkey.c

83

error = regmap_clear_bits(onkey->pf1550->regmap,

drivers/input/misc/tps65219-pwrbutton.c

110

regmap_clear_bits(tps->regmap, TPS65219_REG_MASK_CONFIG,

drivers/leds/leds-mt6323.c

397

ret = regmap_clear_bits(regmap, regs->top_ckpdn[0], RG_VWLED_32K_CK_PDN);

drivers/leds/leds-mt6323.c

401

ret = regmap_clear_bits(regmap, regs->top_ckpdn[0], RG_VWLED_6M_CK_PDN);

drivers/leds/leds-mt6323.c

405

ret = regmap_clear_bits(regmap, regs->top_ckpdn[0], RG_VWLED_1M_CK_PDN);

drivers/leds/leds-mt6323.c

431

ret = regmap_clear_bits(regmap, regs->iwled_en_ctrl, BIT(led->id + 1));

drivers/leds/leds-mt6323.c

435

ret = regmap_clear_bits(regmap, regs->iwled_en_ctrl, BIT(led->id));

drivers/media/platform/nxp/imx8mq-mipi-csi2.c

209

regmap_clear_bits(state->phy_gpr, CSI2SS_DATA_TYPE_DISABLE_BF,

drivers/media/platform/nxp/imx8mq-mipi-csi2.c

235

regmap_clear_bits(state->phy_gpr, CSI2SS_PHY_CTRL,

drivers/media/platform/nxp/imx8mq-mipi-csi2.c

252

regmap_clear_bits(state->phy_gpr, CSI2SS_CTRL_CLK_RESET,

drivers/mfd/da9062-core.c

639

ret = regmap_clear_bits(chip->regmap, DA9062AA_CONFIG_J,

drivers/mfd/da9063-i2c.c

464

ret = regmap_clear_bits(da9063->regmap, DA9063_REG_CONFIG_J,

drivers/mfd/tps65910.c

295

ret = regmap_clear_bits(tps65910->regmap, TPS65910_DEVCTRL,

drivers/mfd/tps65910.c

357

regmap_clear_bits(tps65910->regmap, TPS65910_DEVCTRL,

drivers/misc/tps6594-esm.c

112

ret = regmap_clear_bits(tps->regmap, TPS6594_REG_ESM_SOC_START_REG,

drivers/misc/tps6594-esm.c

90

ret = regmap_clear_bits(tps->regmap, TPS6594_REG_ESM_SOC_START_REG,

drivers/misc/tps6594-esm.c

97

ret = regmap_clear_bits(tps->regmap, TPS6594_REG_ESM_SOC_MODE_CFG,

drivers/misc/tps6594-pfsm.c

124

ret = regmap_clear_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS,

drivers/misc/tps6594-pfsm.c

133

ret = regmap_clear_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS,

drivers/misc/tps6594-pfsm.c

151

ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2,

drivers/misc/tps6594-pfsm.c

202

ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS,

drivers/misc/tps6594-pfsm.c

240

ret = regmap_clear_bits(pfsm->regmap,

drivers/misc/tps6594-pfsm.c

244

ret = regmap_clear_bits(pfsm->regmap,

drivers/mmc/host/dw_mmc-hi3798mv200.c

81

return regmap_clear_bits(priv->crg_reg, priv->sap_dll_offset, SAP_DLL_CTRL_DLLMODE);

drivers/mmc/host/meson-mx-sdio.c

251

regmap_clear_bits(host->regmap, MESON_MX_SDIO_CONF,

drivers/mmc/host/meson-mx-sdio.c

463

regmap_clear_bits(host->regmap, MESON_MX_SDIO_IRQC,

drivers/net/dsa/lantiq/lantiq_gswip_common.c

1121

regmap_clear_bits(priv->gswip, GSWIP_SDMA_PCTRLp(port),

drivers/net/dsa/lantiq/lantiq_gswip_common.c

1286

regmap_clear_bits(priv->gswip, GSWIP_MAC_CTRL_2p(port),

drivers/net/dsa/lantiq/lantiq_gswip_common.c

1573

regmap_clear_bits(priv->gswip, GSWIP_MAC_CTRL_4p(dp->index),

drivers/net/dsa/lantiq/lantiq_gswip_common.c

471

regmap_clear_bits(priv->gswip, GSWIP_FDMA_PCTRLp(port),

drivers/net/dsa/lantiq/lantiq_gswip_common.c

473

regmap_clear_bits(priv->gswip, GSWIP_SDMA_PCTRLp(port),

drivers/net/dsa/lantiq/lantiq_gswip_common.c

583

regmap_clear_bits(priv->gswip, GSWIP_PCE_PCTRL_0p(port),

drivers/net/dsa/lantiq/lantiq_gswip_common.c

746

regmap_clear_bits(priv->mdio, GSWIP_MDIO_GLOB, GSWIP_MDIO_GLOB_ENABLE);

drivers/net/dsa/lantiq/mxl-gsw1xx.c

145

return regmap_clear_bits(priv->shell, GSW1XX_SHELL_RST_REQ,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

251

ret = regmap_clear_bits(priv->shell, GSW1XX_SHELL_RST_REQ,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

321

ret = regmap_clear_bits(priv->sgmii, GSW1XX_SGMII_PCS_TXB_CTL,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

331

return regmap_clear_bits(priv->sgmii, GSW1XX_SGMII_PCS_RXB_CTL,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

458

regmap_clear_bits(priv->sgmii, GSW1XX_SGMII_TBI_ANEGCTL,

drivers/net/dsa/qca/qca8k-8xxx.c

1056

return regmap_clear_bits(priv->regmap, QCA8K_MDIO_MASTER_CTRL,

drivers/net/dsa/qca/qca8k-8xxx.c

1871

ret = regmap_clear_bits(priv->regmap, QCA8K_REG_PORT0_PAD_CTRL,

drivers/net/dsa/qca/qca8k-8xxx.c

1945

ret = regmap_clear_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(port),

drivers/net/dsa/qca/qca8k-common.c

477

regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask);

drivers/net/dsa/qca/qca8k-common.c

570

return regmap_clear_bits(priv->regmap,

drivers/net/dsa/qca/qca8k-common.c

640

ret = regmap_clear_bits(priv->regmap,

drivers/net/dsa/qca/qca8k-common.c

970

ret = regmap_clear_bits(priv->regmap, reg, val);

drivers/net/ethernet/airoha/airoha_npu.c

596

regmap_clear_bits(npu->regmap, REG_IRQ_RXDONE(q), NPU_IRQ_RX_MASK(q));

drivers/net/ethernet/mediatek/mtk_eth_path.c

137

ret = regmap_clear_bits(eth->ethsys, ETHSYS_SYSCFG0,

drivers/net/ethernet/mediatek/mtk_eth_path.c

143

ret = regmap_clear_bits(eth->infra, TOP_MISC_NETSYS_PCS_MUX,

drivers/net/ethernet/mediatek/mtk_star_emac.c

434

regmap_clear_bits(priv->regs, MTK_STAR_REG_MAC_CFG,

drivers/net/ethernet/mediatek/mtk_star_emac.c

985

regmap_clear_bits(priv->regs, MTK_STAR_REG_ARL_CFG,

drivers/net/ethernet/mediatek/mtk_star_emac.c

990

regmap_clear_bits(priv->regs, MTK_STAR_REG_MAC_CFG,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1559

ret = regmap_clear_bits(ppe_dev->regmap, reg,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1566

ret = regmap_clear_bits(ppe_dev->regmap, reg,

drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c

96

ret = regmap_clear_bits(dwmac->intf_regmap,

drivers/net/wan/framer/pef2256/pef2256.c

70

regmap_clear_bits(pef2256->regmap, offset, clr);

drivers/pci/controller/dwc/pci-imx6.c

1382

regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);

drivers/pci/controller/dwc/pci-imx6.c

678

regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);

drivers/pci/controller/dwc/pci-imx6.c

688

regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);

drivers/pci/controller/dwc/pci-imx6.c

888

regmap_clear_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_RST_CTRL,

drivers/pci/controller/dwc/pcie-spacemit-k1.c

176

regmap_clear_bits(k1->pmu, reset_ctrl, PCIE_RC_PERST);

drivers/pci/controller/dwc/pcie-spacemit-k1.c

78

regmap_clear_bits(k1->pmu, offset, PCIE_SOFT_RESET);

drivers/phy/amlogic/phy-meson8b-usb2.c

179

regmap_clear_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET);

drivers/phy/amlogic/phy-meson8b-usb2.c

185

regmap_clear_bits(priv->regmap, REG_DBG_UART,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

203

regmap_clear_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

205

regmap_clear_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

207

regmap_clear_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

235

regmap_clear_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

243

regmap_clear_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

396

regmap_clear_bits(priv->misc, HSIO_CTRL0,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

398

regmap_clear_bits(priv->misc, HSIO_CTRL0,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

402

regmap_clear_bits(priv->ctrl,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

405

regmap_clear_bits(priv->ctrl,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

408

regmap_clear_bits(priv->ctrl,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

412

regmap_clear_bits(priv->ctrl,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

415

regmap_clear_bits(priv->ctrl,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

418

regmap_clear_bits(priv->ctrl,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

424

regmap_clear_bits(priv->phy,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

427

regmap_clear_bits(priv->phy,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

436

regmap_clear_bits(priv->phy,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

439

regmap_clear_bits(priv->phy,

drivers/phy/marvell/phy-mvebu-cp110-utmi.c

182

regmap_clear_bits(utmi->syscon, SYSCON_UTMI_CFG_REG(port->id),

drivers/phy/marvell/phy-mvebu-cp110-utmi.c

195

regmap_clear_bits(utmi->syscon, SYSCON_USB_CFG_REG, USB_CFG_PLL_MASK);

drivers/phy/sophgo/phy-cv1800-usb2.c

54

regmap_clear_bits(phy->syscon, REG_USB_PHY_CTRL, PHY_VBUS_POWER);

drivers/pinctrl/mediatek/pinctrl-airoha.c

2348

regmap_clear_bits(pinctrl->regmap, gpiochip->level[index], mask);

drivers/pinctrl/mediatek/pinctrl-airoha.c

2349

regmap_clear_bits(pinctrl->regmap, gpiochip->edge[index], mask);

drivers/pinctrl/pinctrl-cy8c95x0.c

517

regmap_clear_bits(chip->regmap, off, mask & val);

drivers/pinctrl/pinctrl-ingenic.c

3842

regmap_clear_bits(jzpc->map, offt * jzpc->info->reg_offset +

drivers/platform/x86/uniwill/uniwill-acpi.c

1425

regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL);

drivers/platform/x86/uniwill/uniwill-acpi.c

1514

regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL);

drivers/platform/x86/uniwill/uniwill-acpi.c

1559

return regmap_clear_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL,

drivers/pmdomain/imx/gpcv2.c

367

regmap_clear_bits(domain->regmap, GPC_PGC_CTRL(pgc),

drivers/pmdomain/imx/gpcv2.c

441

regmap_clear_bits(domain->regmap, domain->regs->hsk,

drivers/pmdomain/imx/imx8m-blk-ctrl.c

101

regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

103

regmap_clear_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

153

regmap_clear_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

155

regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

156

regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

429

regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, BIT(0) | BIT(1) | BIT(2));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

200

regmap_clear_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

203

regmap_clear_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

206

regmap_clear_bits(bc->regmap, GPR_REG0,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

236

regmap_clear_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

353

regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

372

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(9));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

373

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(16));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

376

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

378

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

379

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

384

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(18));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

385

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

388

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(22));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

389

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(28));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

392

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(20));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

393

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(27) | BIT(30));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

396

regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(1));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

397

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

399

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

402

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

407

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

408

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(7));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

409

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

412

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

415

regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

416

regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));

drivers/pmdomain/imx/imx93-blk-ctrl.c

154

regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);

drivers/pmdomain/imx/imx93-blk-ctrl.c

179

regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);

drivers/pmdomain/marvell/pxa1908-power-controller.c

107

return regmap_clear_bits(ctrl->base, data->reg_clk_res_ctrl, data->hw_mode);

drivers/pmdomain/marvell/pxa1908-power-controller.c

123

return regmap_clear_bits(ctrl->base, APMU_DEBUG, DSI_PHY_DVM_MASK);

drivers/pmdomain/marvell/pxa1908-power-controller.c

97

regmap_clear_bits(ctrl->base, APMU_PWR_CTRL_REG, data->pwr_state);

drivers/pmdomain/mediatek/mtk-pm-domains.c

147

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);

drivers/pmdomain/mediatek/mtk-pm-domains.c

161

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_CLKISO_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

176

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_ISOINT_B_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

180

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);

drivers/pmdomain/mediatek/mtk-pm-domains.c

223

regmap_clear_bits(regmap, bpd->bus_prot_clr, bpd->bus_prot_set_clr_mask);

drivers/pmdomain/mediatek/mtk-pm-domains.c

477

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

478

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

518

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_SAVE_FLAG);

drivers/pmdomain/mediatek/mtk-pm-domains.c

520

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_NRESTORE);

drivers/pmdomain/mediatek/mtk-pm-domains.c

522

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_CLK_DIS);

drivers/pmdomain/mediatek/mtk-pm-domains.c

525

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_SAVE_FLAG);

drivers/pmdomain/mediatek/mtk-pm-domains.c

526

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_NRESTORE);

drivers/pmdomain/mediatek/mtk-pm-domains.c

528

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_CLK_DIS);

drivers/pmdomain/mediatek/mtk-pm-domains.c

532

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_NRESTORE);

drivers/pmdomain/mediatek/mtk-pm-domains.c

534

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_UFS_CLK_DIS);

drivers/pmdomain/mediatek/mtk-pm-domains.c

552

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_SAVE);

drivers/pmdomain/mediatek/mtk-pm-domains.c

553

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_CLK_DIS);

drivers/pmdomain/mediatek/mtk-pm-domains.c

559

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_SAVE);

drivers/pmdomain/mediatek/mtk-pm-domains.c

560

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RTFF_UFS_CLK_DIS);

drivers/pmdomain/mediatek/mtk-pm-domains.c

574

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

575

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

576

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

603

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

606

regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);

drivers/pmdomain/mediatek/mtk-pm-domains.c

624

regmap_clear_bits(scpsys->base, pd->data->ext_buck_iso_offs,

drivers/power/supply/max17042_battery.c

885

regmap_clear_bits(chip->regmap, MAX17042_STATUS,

drivers/power/supply/smb347-charger.c

1456

ret = regmap_clear_bits(smb->regmap, CMD_A, CMD_A_OTG_ENABLED);

drivers/pwm/pwm-adp5585.c

80

regmap_clear_bits(regmap, info->pwm_cfg, ADP5585_PWM_EN);

drivers/pwm/pwm-airoha.c

362

ret = regmap_clear_bits(pc->regmap, AIROHA_PWM_REG_SIPO_FLASH_MODE_CFG,

drivers/pwm/pwm-airoha.c

406

ret = regmap_clear_bits(pc->regmap, AIROHA_PWM_REG_SGPIO_LED_DATA,

drivers/pwm/pwm-airoha.c

436

return regmap_clear_bits(pc->regmap, addr,

drivers/pwm/pwm-airoha.c

501

regmap_clear_bits(pc->regmap, AIROHA_PWM_REG_SIPO_FLASH_MODE_CFG,

drivers/pwm/pwm-axi-pwmgen.c

232

ret = regmap_clear_bits(regmap, AXI_PWMGEN_REG_RSTN, AXI_PWMGEN_REG_RSTN_RESET);

drivers/pwm/pwm-fsl-ftm.c

104

regmap_clear_bits(fpc->regmap, FTM_SC, BIT(pwm->hwpwm + 16));

drivers/pwm/pwm-fsl-ftm.c

340

regmap_clear_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm));

drivers/pwm/pwm-img.c

161

regmap_clear_bits(imgchip->periph_regs, PERIP_PWM_PDM_CONTROL,

drivers/pwm/pwm-img.c

391

regmap_clear_bits(imgchip->periph_regs,

drivers/pwm/pwm-iqs620a.c

55

return regmap_clear_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,

drivers/pwm/pwm-jz4740.c

117

regmap_clear_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm), TCU_TCSR_PWM_EN);

drivers/pwm/pwm-jz4740.c

204

regmap_clear_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm),

drivers/pwm/pwm-stm32.c

418

ret = regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

drivers/pwm/pwm-stm32.c

527

regmap_clear_bits(priv->regmap, TIM_CCER, ccen);

drivers/pwm/pwm-stm32.c

528

regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

drivers/pwm/pwm-stm32.c

791

regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);

drivers/regulator/bd718x7-regulator.c

153

ret = regmap_clear_bits(rdev->regmap, BD718XX_REG_MVRFLTMASK2,

drivers/regulator/bd718x7-regulator.c

475

return regmap_clear_bits(rdev->regmap, BD718XX_REG_MVRFLTMASK2,

drivers/regulator/bd718x7-regulator.c

538

return regmap_clear_bits(rdev->regmap, reg, bit);

drivers/regulator/bd718x7-regulator.c

559

return regmap_clear_bits(rdev->regmap, reg, bit);

drivers/regulator/da9063-regulator.c

485

regmap_clear_bits(regl->hw->regmap, DA9063_REG_CONFIG_H,

drivers/regulator/da9063-regulator.c

510

ret = regmap_clear_bits(regl->hw->regmap, DA9063_REG_CONFIG_H,

drivers/regulator/max77857-regulator.c

150

return regmap_clear_bits(rdev->regmap, reg, val);

drivers/regulator/mt6316-regulator.c

203

ret = regmap_clear_bits(regmap, info->modeset_reg, info->modeset_mask);

drivers/regulator/mt6316-regulator.c

206

ret = regmap_clear_bits(regmap, info->lp_mode_reg, info->lp_mode_mask);

drivers/regulator/mt6363-regulator.c

421

ret = regmap_clear_bits(regmap, info->modeset_reg, info->modeset_mask);

drivers/regulator/mt6363-regulator.c

426

ret = regmap_clear_bits(regmap, info->lp_mode_reg, info->lp_mode_mask);

drivers/regulator/pca9450-regulator.c

1396

ret = regmap_clear_bits(pca9450->regmap, PCA9450_REG_BUCK123_DVS,

drivers/regulator/rt8092.c

174

return regmap_clear_bits(regmap, enable_reg, RT8092_VOUTEN_MASK);

drivers/regulator/tps65219-regulator.c

173

return regmap_clear_bits(tps->regmap,

drivers/regulator/tps65910-regulator.c

1116

regmap_clear_bits(pmic->mfd->regmap, TPS65910_DCDCCTRL,

drivers/regulator/tps65910-regulator.c

408

return regmap_clear_bits(regmap, reg, LDO_ST_ON_BIT);