reg_readl
gc->reg_readl = gpio_readl_v2;
rev = reg_readl(priv, REG_SWITCH_REVISION);
rev = reg_readl(priv, REG_PHY_REVISION);
reg = reg_readl(priv, REG_SPHY_CNTRL);
reg = reg_readl(priv, REG_SPHY_CNTRL);
reg = reg_readl(priv, REG_SWITCH_CNTRL);
reg = reg_readl(priv, REG_SWITCH_CNTRL);
reg = reg_readl(priv, REG_CROSSBAR);
reg = reg_readl(priv, REG_CROSSBAR);
reg = reg_readl(priv, reg_rgmii_ctrl);
reg = reg_readl(priv, reg_rgmii_ctrl);
reg = reg_readl(priv, reg_rgmii_ctrl);
indir = reg_readl(priv, REG_DIR_DATA_READ); \
val = reg_readl(hwc->config_base);
val = reg_readl(hwc->config_base);
new = reg_readl(hwc->event_base + CCPI2_COUNTER_DATA_H);
reg_readl(hwc->event_base + CCPI2_COUNTER_DATA_L);
new = reg_readl(hwc->event_base);
u32 (*reg_readl)(void __iomem *addr);
if (gc->reg_readl)
return gc->reg_readl(gc->reg_base + reg_offset);
gc->reg_readl = &irq_readl_be;