reg_init
DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write)
DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write)
DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write)
DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(8, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(9, 0, 0x10 , (1*MB), reg_init, reg_read, reg_write)
DEFINE_REG(9, 0, 0x14, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write)
DEFINE_REG(10, 0, 0x14, (256*MB), reg_init, reg_read, reg_write)
DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 1, 0x10, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 2, 0x10, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 2, 0x14, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 2, 0x18, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 3, 0x10, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 3, 0x14, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 4, 0x10, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write)
DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write)
DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write)
DEFINE_REG(13, 0, 0x10, (32*KB), reg_init, ehci_reg_read, reg_write)
DEFINE_REG(13, 1, 0x10, (32*KB), reg_init, ehci_reg_read, reg_write)
DEFINE_REG(14, 0, 0x10, 0, reg_init, reg_read, reg_write)
DEFINE_REG(14, 0, 0x14, 0, reg_init, reg_read, reg_write)
DEFINE_REG(14, 0, 0x18, 0, reg_init, reg_read, reg_write)
DEFINE_REG(14, 0, 0x1C, 0, reg_init, reg_read, reg_write)
DEFINE_REG(14, 0, 0x20, 0, reg_init, reg_read, reg_write)
DEFINE_REG(15, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(15, 0, 0x14, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write)
DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write)
DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write)
DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
static const struct cmd reg_init[] = {
reg_w_buf(gspca_dev, reg_init, ARRAY_SIZE(reg_init));
static const struct cmd reg_init[] = {
reg_w_buf(gspca_dev, reg_init, ARRAY_SIZE(reg_init));
if (!rtlpriv->reg_init) {
rtlpriv->reg_init = true;
bool reg_init; /* true if regs saved */
reg_config->reg_init = as3722_regulator_matches[id].init_data;
if (!reg_config->reg_init || !reg_node)
struct regulator_init_data *reg_init;
config.init_data = reg_config->reg_init;
const struct reg_init *reg_inits;
static const struct reg_init bd71828_buck1_inits[] = {
static const struct reg_init bd71828_buck2_inits[] = {
static const struct reg_init bd71828_buck6_inits[] = {
static const struct reg_init bd71828_buck7_inits[] = {
static const struct reg_init bd72720_buck1_inits[] = {
static const struct reg_init bd72720_ldo1_inits[] = {
const struct reg_init init;
const struct reg_init *additional_inits;
static const struct reg_init bd71837_ldo5_inits[] = {
static const struct reg_init bd71837_ldo6_inits[] = {
struct palmas_reg_init *reg_init;
if (pdata && pdata->reg_init[id])
reg_init = pdata->reg_init[id];
reg_init = NULL;
if (reg_init && reg_init->roof_floor)
if (reg_init && reg_init->roof_floor)
reg_init = pdata->reg_init[id];
if (reg_init) {
id, reg_init);
id, reg_init);
struct palmas_reg_init *reg_init;
if (pdata && pdata->reg_init[id]) {
reg_init = pdata->reg_init[id];
ret = palmas_smps_init(pmic->palmas, id, reg_init);
reg_init = NULL;
if (reg_init && reg_init->roof_floor)
struct palmas_reg_init *reg_init;
if (pdata && pdata->reg_init[id]) {
reg_init = pdata->reg_init[id];
ret = palmas_smps_init(pmic->palmas, id, reg_init);
reg_init = NULL;
if (reg_init && reg_init->roof_floor)
pdata->reg_init[idx] = rinit;
struct palmas_reg_init *reg_init)
reg_init->roof_floor, true);
struct palmas_reg_init *reg_init)
if (reg_init->mode_sleep)
reg |= reg_init->mode_sleep <<
if (reg_init->warm_reset)
if (reg_init->roof_floor)
if (reg_init->mode_sleep)
reg |= reg_init->mode_sleep <<
if (rinfo->vsel_addr && reg_init->vsel) {
reg = reg_init->vsel;
if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
return palmas_regulator_config_external(palmas, id, reg_init);
struct palmas_reg_init *reg_init)
if (reg_init->warm_reset)
if (reg_init->mode_sleep)
if (reg_init->roof_floor) {
return palmas_regulator_config_external(palmas, id, reg_init);
struct palmas_reg_init *reg_init)
if (reg_init->mode_sleep)
if (reg_init->roof_floor) {
return palmas_regulator_config_external(palmas, id, reg_init);
struct palmas_reg_init *reg_init;
if (pdata && pdata->reg_init[id])
reg_init = pdata->reg_init[id];
reg_init = NULL;
if (reg_init && reg_init->roof_floor)
if (reg_init && reg_init->roof_floor)
reg_init = pdata->reg_init[id];
if (reg_init) {
reg_init);
id, reg_init);
struct palmas_reg_init *reg_init[PALMAS_NUM_REGS];
static const struct reg_sequence reg_init[] = {
regmap_multi_reg_write(ad193x->regmap, reg_init, ARRAY_SIZE(reg_init));
regmap_multi_reg_write(regmap, reg_init, ARRAY_SIZE(reg_init));
static const struct reg_sequence reg_init[] = {