reg_entry - Linux

arch/powerpc/platforms/powernv/opal-fadump.h

129

struct hdat_fadump_reg_entry *reg_entry;

arch/powerpc/platforms/powernv/opal-fadump.h

136

reg_entry = (struct hdat_fadump_reg_entry *)bufp;

arch/powerpc/platforms/powernv/opal-fadump.h

137

val = (cpu_endian ? be64_to_cpu(reg_entry->reg_val) :

arch/powerpc/platforms/powernv/opal-fadump.h

138

(u64 __force)(reg_entry->reg_val));

arch/powerpc/platforms/powernv/opal-fadump.h

140

be32_to_cpu(reg_entry->reg_type),

arch/powerpc/platforms/powernv/opal-fadump.h

141

be32_to_cpu(reg_entry->reg_num),

arch/powerpc/platforms/pseries/rtas-fadump.c

333

rtas_fadump_read_regs(struct rtas_fadump_reg_entry *reg_entry,

arch/powerpc/platforms/pseries/rtas-fadump.c

338

while (be64_to_cpu(reg_entry->reg_id) != fadump_str_to_u64("CPUEND")) {

arch/powerpc/platforms/pseries/rtas-fadump.c

339

rtas_fadump_set_regval(regs, be64_to_cpu(reg_entry->reg_id),

arch/powerpc/platforms/pseries/rtas-fadump.c

340

be64_to_cpu(reg_entry->reg_value));

arch/powerpc/platforms/pseries/rtas-fadump.c

341

reg_entry++;

arch/powerpc/platforms/pseries/rtas-fadump.c

343

reg_entry++;

arch/powerpc/platforms/pseries/rtas-fadump.c

344

return reg_entry;

arch/powerpc/platforms/pseries/rtas-fadump.c

365

struct rtas_fadump_reg_entry *reg_entry;

arch/powerpc/platforms/pseries/rtas-fadump.c

388

reg_entry = (struct rtas_fadump_reg_entry *)vaddr;

arch/powerpc/platforms/pseries/rtas-fadump.c

400

if (be64_to_cpu(reg_entry->reg_id) !=

arch/powerpc/platforms/pseries/rtas-fadump.c

407

cpu = (be64_to_cpu(reg_entry->reg_value) &

arch/powerpc/platforms/pseries/rtas-fadump.c

410

RTAS_FADUMP_SKIP_TO_NEXT_CPU(reg_entry);

arch/powerpc/platforms/pseries/rtas-fadump.c

417

RTAS_FADUMP_SKIP_TO_NEXT_CPU(reg_entry);

arch/powerpc/platforms/pseries/rtas-fadump.c

419

reg_entry++;

arch/powerpc/platforms/pseries/rtas-fadump.c

420

reg_entry = rtas_fadump_read_regs(reg_entry, &regs);

arch/powerpc/platforms/pseries/rtas-fadump.h

111

#define RTAS_FADUMP_SKIP_TO_NEXT_CPU(reg_entry) \

arch/powerpc/platforms/pseries/rtas-fadump.h

113

while (be64_to_cpu(reg_entry->reg_id) != \

arch/powerpc/platforms/pseries/rtas-fadump.h

115

reg_entry++; \

arch/powerpc/platforms/pseries/rtas-fadump.h

116

reg_entry++; \

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

541

struct amdgpu_ras_err_status_reg_entry reg_entry;

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5221

const struct amdgpu_ras_err_status_reg_entry *reg_entry,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5227

if (!reg_entry)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5231

AMDGPU_RAS_REG_ENTRY_OFFSET(reg_entry->hwip, instance,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5232

reg_entry->seg_lo, reg_entry->reg_lo);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5235

if ((reg_entry->flags & AMDGPU_RAS_ERR_STATUS_VALID) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5245

const struct amdgpu_ras_err_status_reg_entry *reg_entry,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5251

if (!reg_entry)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5255

AMDGPU_RAS_REG_ENTRY_OFFSET(reg_entry->hwip, instance,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5256

reg_entry->seg_hi, reg_entry->reg_hi);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5259

if ((reg_entry->flags & AMDGPU_RAS_ERR_INFO_VALID) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h

976

const struct amdgpu_ras_err_status_reg_entry *reg_entry,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h

980

const struct amdgpu_ras_err_status_reg_entry *reg_entry,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4385

for (k = 0; k < gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst; k++) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4388

gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst > 1)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4392

&(gfx_v9_4_3_ce_reg_list[i].reg_entry),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4401

&(gfx_v9_4_3_ue_reg_list[i].reg_entry),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4415

for (k = 0; k < gfx_v9_4_3_ue_reg_list[i].reg_entry.reg_inst; k++) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4418

gfx_v9_4_3_ue_reg_list[i].reg_entry.reg_inst > 1)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4422

&(gfx_v9_4_3_ue_reg_list[i].reg_entry),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4453

for (k = 0; k < gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst; k++) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4456

gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst > 1)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4460

&(gfx_v9_4_3_ce_reg_list[i].reg_entry),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4465

&(gfx_v9_4_3_ue_reg_list[i].reg_entry),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4475

for (k = 0; k < gfx_v9_4_3_ue_reg_list[i].reg_entry.reg_inst; k++) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4478

gfx_v9_4_3_ue_reg_list[i].reg_entry.reg_inst > 1)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4482

&(gfx_v9_4_3_ue_reg_list[i].reg_entry),

drivers/gpu/drm/tegra/rgb.c

37

static const struct reg_entry rgb_enable[] = {

drivers/gpu/drm/tegra/rgb.c

59

static const struct reg_entry rgb_disable[] = {

drivers/gpu/drm/tegra/rgb.c

82

const struct reg_entry *table,