reg_a
#define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \
_PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
#define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \
_MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
reg_a(dst_gpr), offset, size - 1, CMD_CTX_SWAP);
reg_a(ptr_gpr), ALU_OP_ADD, stack_off_reg);
emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, tmp_reg);
emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, reg_b(src));
reg_a(dst + 1), alu_op, reg_b(src + 1));
emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, reg_b(src));
emit_alu(nfp_prog, reg_none(), reg_a(dst), alu_op, reg_b(src));
emit_alu(nfp_prog, reg_none(), reg_a(reg), alu_op, tmp_reg);
emit_alu(nfp_prog, reg_none(), tmp_reg, alu_op, reg_a(reg));
reg_a(reg + 1), carry_op, tmp_reg);
tmp_reg, carry_op, reg_a(reg + 1));
emit_alu(nfp_prog, reg_none(), reg_a(areg), ALU_OP_SUB, reg_b(breg));
reg_a(areg + 1), ALU_OP_SUB_C, reg_b(breg + 1));
emit_ld_field(nfp_prog, reg_both(gpr_out), 0x5, reg_a(gpr_out),
multiplicand = reg_a(dst_reg * 2);
swreg dst_both = reg_both(dst), dst_a = reg_a(dst), dst_b = reg_a(dst);
reg_a(2 * 2), ALU_OP_ADD, pptr_reg(nfp_prog));
plen_reg(nfp_prog), ALU_OP_SUB, reg_a(2 * 2));
pv_len(nfp_prog), ALU_OP_SUB, reg_a(2 * 2));
reg_a(2 * 2), ALU_OP_ADD_2B, pptr_reg(nfp_prog));
plen_reg(nfp_prog), ALU_OP_SUB, reg_a(2 * 2));
plen_reg(nfp_prog), ALU_OP_SUB, reg_a(2 * 2));
pv_len(nfp_prog), ALU_OP_SUB, reg_a(2 * 2));
delta = reg_a(2 * 2);
wrp_mov(nfp_prog, reg_a(0), reg_a(2));
wrp_mov(nfp_prog, reg_a(1), ptr_type);
emit_alu(nfp_prog, reg_none(), reg_a(meta->insn.src_reg * 2),
reg_a(insn->dst_reg * 2), ALU_OP_ADD,
reg_a(insn->dst_reg * 2 + 1), ALU_OP_ADD_C,
reg_a(insn->dst_reg * 2), ALU_OP_SUB,
reg_a(insn->dst_reg * 2 + 1), ALU_OP_SUB_C,
emit_shf(nfp_prog, reg_both(dst + 1), reg_a(dst + 1),
emit_shf_indir(nfp_prog, reg_both(dst + 1), reg_a(dst + 1), SHF_OP_NONE,
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_imm(0));
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_imm(0));
emit_br_bset(nfp_prog, reg_a(src), 5, label_ge32, 0);
emit_shf(nfp_prog, reg_both(dst), reg_a(dst + 1), SHF_OP_NONE,
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_imm(0));
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_imm(0));
emit_shf_indir(nfp_prog, reg_both(dst), reg_a(dst + 1), SHF_OP_NONE,
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_imm(0));
emit_br_bset(nfp_prog, reg_a(src), 5, label_ge32, 0);
emit_shf(nfp_prog, reg_both(dst), reg_a(dst + 1), SHF_OP_NONE,
emit_alu(nfp_prog, reg_none(), reg_a(dst + 1), ALU_OP_OR,
emit_alu(nfp_prog, reg_none(), reg_a(dst + 1), ALU_OP_OR,
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_b(dst + 1));
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_b(dst + 1));
emit_br_bset(nfp_prog, reg_a(src), 5, label_ge32, 0);
emit_alu(nfp_prog, reg_none(), reg_a(dst), ALU_OP_OR,
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_b(dst));
emit_alu(nfp_prog, reg_none(), reg_a(src), ALU_OP_OR, reg_imm(0));
emit_ld_field(nfp_prog, reg_both(gpr), 0xe, reg_a(gpr),
wrp_end32(nfp_prog, reg_a(gpr), gpr);
wrp_end32(nfp_prog, reg_a(gpr), gpr + 1);
wrp_mov(nfp_prog, reg_both(dst + 1), reg_a(dst));
src_base = reg_a(meta->insn.src_reg * 2);
addra = reg_a(dst_gpr);
reg_a(dst_gpr), ALU_OP_ADD, off);
reg_a(dst_gpr + 1), ALU_OP_ADD_C, reg_imm(0));
wrp_mov(nfp_prog, reg_xfer(0), reg_a(src_gpr));
wrp_mov(nfp_prog, reg_xfer(1), reg_a(src_gpr + 1));
or1 = reg_a(insn->dst_reg * 2);
reg_a(insn->dst_reg * 2), ALU_OP_XOR, tmp_reg);
reg_a(insn->dst_reg * 2 + 1), ALU_OP_XOR, tmp_reg);
reg_a(insn->dst_reg * 2), ALU_OP_XOR, tmp_reg);
reg_a(dst_gpr), ALU_OP_AND, tmp_reg);
reg_a(dst_gpr + 1), ALU_OP_OR, imm_b(nfp_prog));
emit_alu(nfp_prog, reg_none(), reg_a(insn->dst_reg * 2),
reg_a(insn->dst_reg * 2), ALU_OP_XOR, tmp_reg);
reg_a(insn->dst_reg * 2 + 1), ALU_OP_XOR, tmp_reg);
emit_alu(nfp_prog, imm_a(nfp_prog), reg_a(insn->dst_reg * 2),
reg_a(insn->dst_reg * 2 + 1), ALU_OP_XOR,
wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS);
emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x11), SHF_SC_L_SHF, 16);
wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS);
emit_shf(nfp_prog, reg_a(1),
emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0));
emit_shf(nfp_prog, reg_a(2),
emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0));
reg_a(2), SHF_OP_OR, reg_b(2), SHF_SC_L_SHF, 4);
emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_b(2), SHF_SC_L_SHF, 16);
wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS);
emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x82), SHF_SC_L_SHF, 16);
emit_shf(nfp_prog, reg_a(1),
emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0));
wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS);
emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_b(2), SHF_SC_L_SHF, 16);
*rega = reg_a(src_gpr);
emit_alu(nfp_prog, imm_a(nfp_prog), reg_a(src_gpr), ALU_OP_ADD, offset);
src_base = reg_a(meta->insn.src_reg * 2);
reg_a(meta->paired_st->dst_reg * 2), off, len - 1,
reg_a(meta->paired_st->dst_reg * 2), off, xfer_num - 1,
reg_a(meta->paired_st->dst_reg * 2), off,
reg_a(meta->paired_st->dst_reg * 2), off,
reg_a(meta->paired_st->dst_reg * 2), off, 7,
reg_a(meta->paired_st->dst_reg * 2), off, len - 33,
reg_a(meta->paired_st->dst_reg * 2), off,
xfer_num - 1, reg_a(meta->paired_st->dst_reg * 2), off,
return data_ld_host_order(nfp_prog, meta, dst_gpr, reg_a(src_gpr),
emit_alu(nfp_prog, imm_both(nfp_prog), reg_a(src), ALU_OP_ADD, tmp_reg);
wrp_mov(nfp_prog, reg_xfer(i), reg_a(src_gpr + i));
reg_a(dst_gpr), offset, size - 1, CMD_CTX_SWAP);
#define stack_reg(np) reg_a(STATIC_REG_STACK)
#define imm_a(np) reg_a(STATIC_REG_IMM)
#define imma_a(np) reg_a(STATIC_REG_IMMA)
u8 reg_a, reg_b;
reg_a = (u8)rtw_read_rf(rtwdev, RF_PATH_A, 0x00, 0xf0000);
} while ((reg_a == 2 || reg_b == 2) && count < 2500);
ret = da9055_reg_read(regulator->da9055, volt.reg_a);
return da9055_reg_update(regulator->da9055, info->volt.reg_a,
return da9055_reg_update(regulator->da9055, info->volt.reg_a,
.reg_a = DA9055_REG_VBCORE_A + DA9055_ID_##_id, \
.reg_a = DA9055_REG_VBCORE_A + DA9055_ID_##_id, \
int reg_a;