regUVD_VCPU_CACHE_SIZE0
regUVD_VCPU_CACHE_SIZE0),
WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE0, size);
VCN, inst_idx, regUVD_VCPU_CACHE_SIZE0), size, 0, indirect);
VCN, inst_idx, regUVD_VCPU_CACHE_SIZE0), 0, 0, indirect);
regUVD_VCPU_CACHE_SIZE0),
WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE0, size);
VCN, 0, regUVD_VCPU_CACHE_SIZE0), size, 0, indirect);
VCN, 0, regUVD_VCPU_CACHE_SIZE0), 0, 0, indirect);
WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE0, size);
VCN, inst_idx, regUVD_VCPU_CACHE_SIZE0), size, 0, indirect);
VCN, inst_idx, regUVD_VCPU_CACHE_SIZE0), 0, 0, indirect);
WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE0, size);
VCN, inst_idx, regUVD_VCPU_CACHE_SIZE0), size, 0, indirect);
VCN, inst_idx, regUVD_VCPU_CACHE_SIZE0), 0, 0, indirect);
WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE0, size);
VCN, 0, regUVD_VCPU_CACHE_SIZE0), size, 0, indirect);
VCN, 0, regUVD_VCPU_CACHE_SIZE0), 0, 0, indirect);
regUVD_VCPU_CACHE_SIZE0),