drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

600

regUVD_JRBC0_UVD_JRBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

608

ring->wptr = RREG32_SOC15_OFFSET(JPEG, jpeg_inst, regUVD_JRBC0_UVD_JRBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

67

SOC15_REG_ENTRY_STR(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

698

return RREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, ring->me), regUVD_JRBC0_UVD_JRBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

724

WREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, ring->me), regUVD_JRBC0_UVD_JRBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

62

SOC15_REG_ENTRY_STR(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

376

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC0_UVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

379

ring->wptr = RREG32_SOC15(JPEG, inst_idx, regUVD_JRBC0_UVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

453

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

456

ring->wptr = RREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

523

return RREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

541

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));