Symbol: regUVD_JPEG_POWER_STATUS
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
344
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
348
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
357
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
40
SOC15_REG_ENTRY_STR(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
555
WREG32_P(SOC15_REG_OFFSET(JPEG, jpeg_inst, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
63
SOC15_REG_ENTRY_STR(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
646
WREG32_P(SOC15_REG_OFFSET(JPEG, jpeg_inst, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
384
WREG32_P(SOC15_REG_OFFSET(JPEG, inst, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
388
WREG32_P(SOC15_REG_OFFSET(JPEG, inst, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
397
WREG32_P(SOC15_REG_OFFSET(JPEG, inst, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
427
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
430
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
440
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
442
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
488
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
490
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
50
SOC15_REG_ENTRY_STR(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
279
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
288
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
349
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
351
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
38
SOC15_REG_ENTRY_STR(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
413
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
415
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
371
WREG32_P(SOC15_REG_OFFSET(JPEG, jpeg_inst, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
375
WREG32_P(SOC15_REG_OFFSET(JPEG, jpeg_inst, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
396
WREG32_P(SOC15_REG_OFFSET(JPEG, jpeg_inst, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
59
SOC15_REG_ENTRY_STR(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
262
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_POWER_STATUS), 0,
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
271
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_POWER_STATUS),
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
332
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
334
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
396
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
398
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);