drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1710

reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1720

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1723

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1733

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

89

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_PAUSE)

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1506

reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1516

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1519

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1526

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

83

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_PAUSE)

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1373

reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1383

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1386

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1397

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

89

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_PAUSE)

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1101

reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1111

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1114

SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1121

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

71

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_PAUSE)

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

634

reg_data = RREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

640

WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

643

SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

649

WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

74

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_DPG_PAUSE)