Symbol: regSDMA0_QUEUE0_RB_WPTR_HI
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
388
WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_WPTR_HI,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
393
WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_WPTR_HI,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
428
reg <= regSDMA0_QUEUE0_RB_WPTR_HI; reg++)
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
237
ring->me, regSDMA0_QUEUE0_RB_WPTR_HI),
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
514
WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
519
WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), 0);
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
549
WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
85
SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_WPTR_HI),
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
240
regSDMA0_QUEUE0_RB_WPTR_HI),
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
505
WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
510
WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), 0);
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
544
WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
83
SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_WPTR_HI),