drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

135

regSDMA0_QUEUE0_RB_CNTL) - regSDMA0_QUEUE0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

139

regSDMA1_QUEUE0_RB_CNTL) - regSDMA0_QUEUE0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

146

+ queue_id * (regSDMA0_QUEUE1_RB_CNTL - regSDMA0_QUEUE0_RB_CNTL);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

358

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

408

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

427

for (reg = regSDMA0_QUEUE0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

480

sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

547

temp = RREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

549

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

563

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

564

RREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL) |

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

144

const uint32_t first_reg = regSDMA0_QUEUE0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

86

regSDMA0_QUEUE0_RB_CNTL) - regSDMA0_QUEUE0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

90

regSDMA1_QUEUE0_RB_CNTL) - regSDMA0_QUEUE0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

97

+ queue_id * (regSDMA0_QUEUE1_RB_CNTL - regSDMA0_QUEUE0_RB_CNTL);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

401

rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

403

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

499

rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

507

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

608

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

81

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_CNTL),

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

404

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

406

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

490

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

498

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

602

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

79

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_CNTL),