Symbol: regSDMA0_QUEUE0_RB_BASE
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
398
WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_BASE, m->sdmax_rlcx_rb_base);
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
538
WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
533
WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);