Symbol: regSDMA0_QUEUE0_DOORBELL_OFFSET
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
373
WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_DOORBELL_OFFSET,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
436
for (reg = regSDMA0_QUEUE0_DOORBELL_OFFSET;
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
553
doorbell_offset = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
563
WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
548
doorbell_offset = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
558
WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);