drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

566

uint32_t scratch = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

897

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

454

uint32_t scratch = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

736

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

269

xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

270

scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1444

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

425

xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

426

scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), regSCRATCH_REG0);