drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2261

u32 tmp = RREG32_SOC15(GC, 0, regRLC_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2264

WREG32_SOC15(GC, 0, regRLC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5308

rlc_cntl = RREG32_SOC15(GC, 0, regRLC_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1349

WREG32_SOC15(GC, 0, regRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1920

u32 tmp = RREG32_SOC15(GC, 0, regRLC_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1923

WREG32_SOC15(GC, 0, regRLC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3914

rlc_cntl = RREG32_SOC15(GC, 0, regRLC_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1132

WREG32_SOC15(GC, GET_INST(GC, i), regRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1529

u32 tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1532

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2909

rlc_cntl = RREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1403

rlc_setting = RREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CNTL);