CPU
streq \tmp2, [\tmp1] @ invalidate SCU tags for CPU
LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size)
LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size)
CPU(0, "Bipolar Integrated Technology - B5010"),
CPU(-1, NULL)
CPU(0, "LSI Logic Corporation - unknown-type"),
CPU(-1, NULL)
CPU(0, "Texas Instruments, Inc. - SuperSparc-(II)"),
CPU(1, "Texas Instruments, Inc. - MicroSparc"),
CPU(2, "Texas Instruments, Inc. - MicroSparc II"),
CPU(3, "Texas Instruments, Inc. - SuperSparc 51"),
CPU(4, "Texas Instruments, Inc. - SuperSparc 61"),
CPU(5, "Texas Instruments, Inc. - unknown"),
CPU(-1, NULL)
CPU(0, "Matsushita - MN10501"),
CPU(-1, NULL)
CPU(0, "Philips Corporation - unknown"),
CPU(-1, NULL)
CPU(0, "Harvest VLSI Design Center, Inc. - unknown"),
CPU(-1, NULL)
CPU(0, "Systems and Processes Engineering Corporation (SPEC)"),
CPU(-1, NULL)
CPU(0, "Fujitsu or Weitek Power-UP"),
CPU(1, "Fujitsu or Weitek Power-UP"),
CPU(2, "Fujitsu or Weitek Power-UP"),
CPU(3, "Fujitsu or Weitek Power-UP"),
CPU(-1, NULL)
CPU(3, "LEON"),
CPU(-1, NULL)
CPU(-1, NULL)
CPU(-1, NULL)
CPU(-1, NULL)
CPU(0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"),
CPU(4, "Fujitsu MB86904"),
CPU(5, "Fujitsu TurboSparc MB86907"),
CPU(-1, NULL)
CPU(0, "LSI Logic Corporation - L64811"),
CPU(1, "Cypress/ROSS CY7C601"),
CPU(3, "Cypress/ROSS CY7C611"),
CPU(0xf, "ROSS HyperSparc RT620"),
CPU(0xe, "ROSS HyperSparc RT625 or RT626"),
CPU(-1, NULL)
clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28);
clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29);
writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);
clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28);
clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29);
writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);
LPC1XX_CGU_BASE_CLK(CPU, base_common_src_ids, 0),
cx18_api_epu_cmd_irq(cx, CPU);
case CPU:
API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
API_ENTRY(CPU, CX18_CREATE_TASK, 0),
API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
case CPU:
API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),
API_ENTRY(CPU, CX18_CPU_SET_VIDEO_IN, 0),
API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RATE, 0),
case CPU:
API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RESOLUTION, 0),
API_ENTRY(CPU, CX18_CPU_SET_FILTER_PARAM, 0),
API_ENTRY(CPU, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 0),
API_ENTRY(CPU, CX18_CPU_SET_MEDIAN_CORING, 0),
API_ENTRY(CPU, CX18_CPU_SET_INDEXTABLE, 0),
API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PARAMETERS, 0),
case CPU:
API_ENTRY(CPU, CX18_CPU_SET_VIDEO_MUTE, 0),
API_ENTRY(CPU, CX18_CPU_SET_AUDIO_MUTE, 0),
API_ENTRY(CPU, CX18_CPU_SET_MISC_PARAMETERS, 0),
API_ENTRY(CPU, CX18_CPU_SET_RAW_VBI_PARAM, API_SLOW),
API_ENTRY(CPU, CX18_CPU_SET_CAPTURE_LINE_NO, 0),
API_ENTRY(CPU, CX18_CPU_SET_COPYRIGHT, 0),
API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PID, 0),
API_ENTRY(CPU, CX18_CPU_SET_VIDEO_PID, 0),
case CPU:
API_ENTRY(CPU, CX18_CPU_SET_VER_CROP_LINE, 0),
API_ENTRY(CPU, CX18_CPU_SET_GOP_STRUCTURE, 0),
API_ENTRY(CPU, CX18_CPU_SET_SCENE_CHANGE_DETECTION, 0),
API_ENTRY(CPU, CX18_CPU_SET_ASPECT_RATIO, 0),
API_ENTRY(CPU, CX18_CPU_SET_SKIP_INPUT_FRAME, 0),
API_ENTRY(CPU, CX18_CPU_SET_SLICED_VBI_PARAM, 0),
API_ENTRY(CPU, CX18_CPU_SET_USERDATA_PLACE_HOLDER, 0),
API_ENTRY(CPU, CX18_CPU_GET_ENC_PTS, 0),
API_ENTRY(CPU, CX18_CPU_SET_VFC_PARAM, 0),
API_ENTRY(CPU, CX18_CPU_DE_SET_MDL_ACK, 0),
API_ENTRY(CPU, CX18_CPU_DE_SET_MDL, API_FAST),
API_ENTRY(CPU, CX18_CPU_DE_RELEASE_MDL, API_SLOW),
API_ENTRY(CPU, CX18_CPU_DEBUG_PEEK32, 0),
PINGROUP(cpu_pwr_req, CPU, RSVD2, RSVD3, RSVD4, 0x3328, N, N, N),
PINGROUP(cpu_pwr_req, CPU, RSVD2, RSVD3, RSVD4, 0x3328, N, N, N),
PINGROUP(cpu_pwr_req, CPU, RSVD1, RSVD2, RSVD3, 0x3170, N, N, N, Y, 0x950, 12, 5, 20, 5, -1, -1, -1, -1),
BPF_ANCILLARY(CPU);
__generic_field(int, CPU, FILTER_CPU);
C(CPU, "cpu"), \
evsel__set_sample_bit(cs_etm_evsel, CPU);
evsel__set_sample_bit(evsel, CPU);
evsel__set_sample_bit(tracking_evsel, CPU);
evsel__set_sample_bit(intel_bts_evsel, CPU);
evsel__set_sample_bit(switch_evsel, CPU);
evsel__set_sample_bit(intel_pt_evsel, CPU);
evsel__set_sample_bit(tracking_evsel, CPU);
evsel__set_sample_bit(pos, CPU);
if (PRINT_FIELD(CPU) &&
if (PRINT_FIELD(CPU)) {
CPU(he) == 1 && PID(he) == 100 && he->stat.period == 300);
CPU(he) == 0 && PID(he) == 100 && he->stat.period == 100);
CPU(he) == 0 && PID(he) == 100 &&
CPU(he) == 2 && PID(he) == 200 &&
CPU(he) == 1 && PID(he) == 300 &&
CPU(he) == 0 && PID(he) == 300 &&
CPU(he) == 3 && PID(he) == 300 &&
CPU(he) == 1 && PID(he) == 100 &&
CPU(he) == 2 && PID(he) == 100 &&
CPU(he) == 1 && PID(he) == 100 &&
CPU(he) == 1 && PID(he) == 100 &&
CPU(he) == 2 && PID(he) == 200 &&
evsel__set_sample_bit(evsel, CPU);
evsel__set_sample_bit(cycles_evsel, CPU);
PERF_SAMPLE_TYPE(CPU, "--sample-cpu"),
BUILD_CHECK_SAMPLE(CPU);
evsel__set_sample_bit(evsel, CPU);
evsel__set_sample_bit(evsel, CPU);
evsel__set_sample_bit(evsel, CPU);
bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),