Symbol: regCP_ME1_PIPE1_INT_CNTL
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
2207
return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
6377
mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
1870
return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
4749
mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
3525
regCP_ME1_PIPE1_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
3069
mec_int_cntl_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE1_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
3119
return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE1_INT_CNTL);