drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2205

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6374

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6705

target = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1868

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4746

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3520

regCP_ME1_PIPE0_INT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3066

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE0_INT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3117

return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE0_INT_CNTL);