Symbol: regCP_HQD_PQ_DOORBELL_CONTROL
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
309
WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c
205
WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL), data);
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
216
SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
4403
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
4464
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
167
SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
3273
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
3334
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
2271
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
2324
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
128
SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
1860
tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
1977
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
2046
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
2102
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000);
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
2103
WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1229
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1232
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1263
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1531
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1536
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1538
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1394
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1397
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1428
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1709
data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1714
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1716
WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1320
data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1323
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1354
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1664
data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1669
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, data);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1671
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0);