arch/powerpc/kernel/rtas_pci.c

194

read_pci_config = rtas_function_token(RTAS_FN_READ_PCI_CONFIG);

arch/powerpc/kernel/rtas_pci.c

31

static int read_pci_config;

arch/powerpc/kernel/rtas_pci.c

68

ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);

arch/x86/include/asm/pci-direct.h

10

extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);

arch/x86/kernel/aperture_64.c

195

aper_low = read_pci_config(bus, slot, func, 0x10);

arch/x86/kernel/aperture_64.c

196

aper_hi = read_pci_config(bus, slot, func, 0x14);

arch/x86/kernel/aperture_64.c

244

class = read_pci_config(bus, slot, func,

arch/x86/kernel/aperture_64.c

325

if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00)))

arch/x86/kernel/aperture_64.c

328

ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL);

arch/x86/kernel/aperture_64.c

332

aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;

arch/x86/kernel/aperture_64.c

381

if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00)))

arch/x86/kernel/aperture_64.c

384

ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL);

arch/x86/kernel/aperture_64.c

426

if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00)))

arch/x86/kernel/aperture_64.c

433

ctl = read_pci_config(bus, slot, 3,

arch/x86/kernel/aperture_64.c

447

aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;

arch/x86/kernel/aperture_64.c

552

if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00)))

arch/x86/kernel/cpu/amd.c

662

val = read_pci_config(0, 24, 0, 0x68);

arch/x86/kernel/early-quirks.c

126

d = read_pci_config(num, slot, func, 0x70);

arch/x86/kernel/early-quirks.c

130

d = read_pci_config(num, slot, func, 0x8);

arch/x86/kernel/early-quirks.c

165

d = read_pci_config(num, slot, func, 0x8);

arch/x86/kernel/early-quirks.c

191

d = read_pci_config(num, slot, func, 0x64);

arch/x86/kernel/early-quirks.c

337

bsm = read_pci_config(num, slot, func, INTEL_BSM);

arch/x86/kernel/early-quirks.c

347

bsm = read_pci_config(num, slot, func, INTEL_GEN11_BSM_DW0);

arch/x86/kernel/early-quirks.c

349

bsm |= (u64)read_pci_config(num, slot, func, INTEL_GEN11_BSM_DW1) << 32;

arch/x86/kernel/early-quirks.c

41

htcfg = read_pci_config(num, slot, func, 0x68);

arch/x86/kernel/early-quirks.c

660

addr = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);

arch/x86/kernel/early-quirks.c

661

addr |= (u64)read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_1) << 32;

arch/x86/kernel/early_printk.c

307

cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);

arch/x86/kernel/early_printk.c

308

classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);

arch/x86/kernel/early_printk.c

309

bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);

arch/x86/kernel/mmconf-fam10h_64.c

124

reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3));

arch/x86/kernel/mmconf-fam10h_64.c

129

reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));

arch/x86/kernel/mmconf-fam10h_64.c

84

id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);

arch/x86/kernel/vsmp_64.c

110

cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);

arch/x86/kernel/vsmp_64.c

32

cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);

arch/x86/kernel/vsmp_64.c

67

if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==

arch/x86/mm/amdtopology.c

39

header = read_pci_config(0, num, 0, 0x00);

arch/x86/mm/amdtopology.c

45

header = read_pci_config(0, num, 1, 0x00);

arch/x86/mm/amdtopology.c

73

reg = read_pci_config(0, nb, 0, 0x60);

arch/x86/mm/amdtopology.c

84

base = read_pci_config(0, nb, 1, 0x40 + i*8);

arch/x86/mm/amdtopology.c

85

limit = read_pci_config(0, nb, 1, 0x44 + i*8);

arch/x86/pci/amd_bus.c

100

id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);

arch/x86/pci/amd_bus.c

125

reg = read_pci_config(bus, slot, 1,

arch/x86/pci/amd_bus.c

152

reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID);

arch/x86/pci/amd_bus.c

154

reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID);

arch/x86/pci/amd_bus.c

161

reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3));

arch/x86/pci/amd_bus.c

166

reg = read_pci_config(bus, slot, 1, 0xc4 + (i << 3));

arch/x86/pci/amd_bus.c

227

reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3));

arch/x86/pci/amd_bus.c

233

reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));

arch/x86/pci/amd_bus.c

363

u32 val = read_pci_config(bus, slot, 3, 0);

arch/x86/pci/amd_bus.c

368

val = read_pci_config(bus, slot, 3, 0x8c);

arch/x86/pci/broadcom_bus.c

100

id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);

drivers/firewire/init_ohci1394_dma.c

252

ohci_base = read_pci_config(num, slot, func, PCI_BASE_ADDRESS_0+(0<<2))

drivers/firewire/init_ohci1394_dma.c

278

class = read_pci_config(num, slot, func,

drivers/iommu/amd/init.c

3344

pci_id = read_pci_config(0, i, 0, 0);

drivers/usb/early/ehci-dbgp.c

394

class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);

drivers/usb/early/ehci-dbgp.c

682

dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,

drivers/usb/early/ehci-dbgp.c

695

vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,

drivers/usb/early/ehci-dbgp.c

719

cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,

drivers/usb/early/ehci-dbgp.c

734

cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,

drivers/usb/early/ehci-dbgp.c

851

debug_port = read_pci_config(bus, slot, func, cap);

drivers/usb/early/ehci-dbgp.c

862

bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);

drivers/usb/early/xhci-dbc.c

115

class = read_pci_config(bus, dev, func, PCI_CLASS_REVISION);

drivers/usb/early/xhci-dbc.c

45

val = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0);

drivers/usb/early/xhci-dbc.c

47

sz = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0);

drivers/usb/early/xhci-dbc.c

60

val = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4);

drivers/usb/early/xhci-dbc.c

62

sz = read_pci_config(bus, dev, func, PCI_BASE_ADDRESS_0 + 4);