read_gicreg
vtr = read_gicreg(ICH_VTR_EL2);
val = read_gicreg(ICH_AP0R0_EL2);
val = read_gicreg(ICH_AP0R1_EL2);
val = read_gicreg(ICH_AP0R2_EL2);
val = read_gicreg(ICH_AP0R3_EL2);
val = read_gicreg(ICH_AP1R0_EL2);
val = read_gicreg(ICH_AP1R1_EL2);
val = read_gicreg(ICH_AP1R2_EL2);
val = read_gicreg(ICH_AP1R3_EL2);
elrsr = read_gicreg(ICH_ELRSR_EL2);
cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2);
u64 val = read_gicreg(ICH_HCR_EL2);
read_gicreg(ICH_MISR_EL2);
return read_gicreg(ICH_LR0_EL2);
return read_gicreg(ICH_LR1_EL2);
return read_gicreg(ICH_LR2_EL2);
write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE,
return read_gicreg(ICH_LR3_EL2);
val = read_gicreg(ICC_SRE_EL2);
return read_gicreg(ICH_LR4_EL2);
return read_gicreg(ICH_LR5_EL2);
val = read_gicreg(ICH_VTR_EL2);
return read_gicreg(ICH_LR6_EL2);
val = read_gicreg(ICH_VTR_EL2);
return read_gicreg(ICH_LR7_EL2);
return read_gicreg(ICH_LR8_EL2);
int max_lr_idx = vtr_to_max_lr_idx(read_gicreg(ICH_VTR_EL2));
return read_gicreg(ICH_LR9_EL2);
return read_gicreg(ICH_VTR_EL2);
sre = read_gicreg(ICC_SRE_EL1);
return read_gicreg(ICH_LR10_EL2);
val = read_gicreg(ICC_SRE_EL1);
return read_gicreg(ICH_LR11_EL2);
val |= read_gicreg(ICH_VTR_EL2);
return read_gicreg(ICH_LR12_EL2);
return read_gicreg(ICH_VMCR_EL2);
return read_gicreg(ICH_LR13_EL2);
return 8 - vtr_to_nr_pre_bits(read_gicreg(ICH_VTR_EL2));
return read_gicreg(ICH_LR14_EL2);
return read_gicreg(ICH_LR15_EL2);
u8 nr_apr_regs = vtr_to_nr_apr_regs(read_gicreg(ICH_VTR_EL2));
u8 nr_apr_regs = vtr_to_nr_apr_regs(read_gicreg(ICH_VTR_EL2));
hcr = read_gicreg(ICH_HCR_EL2);