read_c0_prid
if ((read_c0_prid() & PRID_REV_MASK) == 0)
if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
switch ((read_c0_prid() & PRID_REV_MASK)) {
board_type, octeon_model_get_string(read_c0_prid()));
prid = read_c0_prid();
switch (read_c0_prid()) {
switch (read_c0_prid()) {
switch (read_c0_prid() & (PRID_OPT_MASK | PRID_COMP_MASK)) {
return ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G);
if (can_use_mips_counter(read_c0_prid()))
if (can_use_mips_counter(read_c0_prid()))
c->processor_id = read_c0_prid();
c->processor_id = read_c0_prid();
switch (read_c0_prid()) {
printk("PrId : %08x (%s)\n", read_c0_prid(),
is_loongson64g = (read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G;
if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
switch (read_c0_prid() & PRID_REV_MASK) {
} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) {
} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R)
prid_imp = read_c0_prid() & PRID_IMP_MASK;
prid_rev = read_c0_prid() & PRID_REV_MASK;
if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010)
#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020)
switch (read_c0_prid()) {
unsigned int prid = read_c0_prid();
(read_c0_prid() >> 25) & 0x7);
#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010)
#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020)
unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK);
read_c0_prid() < 0x01030202 && !dma_default_coherent) {
pr_emerg("PrId : %08x\n", read_c0_prid());
sb1_pass = read_c0_prid() & PRID_REV_MASK;
sb1_pass = read_c0_prid() & PRID_REV_MASK;
switch (read_c0_prid() & PRID_IMP_MASK) {
prid_rev = read_c0_prid() & PRID_REV_MASK;