rcar_pci_read_reg
val = rcar_pci_read_reg(pcie, IDSETR0);
val = rcar_pci_read_reg(pcie, SUBIDSETR);
val = rcar_pci_read_reg(pcie, PCICONF(15));
flags = rcar_pci_read_reg(pcie, MSICAP(fn));
flags = rcar_pci_read_reg(pcie, MSICAP(fn));
val = rcar_pci_read_reg(pcie, PCIEMSITXR);
val = rcar_pci_read_reg(pcie, PCICONF(1));
val = rcar_pci_read_reg(pcie, PCIEINTXR);
val = rcar_pci_read_reg(pcie, PCIEINTXR);
val = rcar_pci_read_reg(pcie, MSICAP(fn));
val = rcar_pci_read_reg(pcie, PCIEMSITXR);
val = rcar_pci_read_reg(pcie, EXPCAP(1));
val = rcar_pci_read_reg(pcie, EXPCAP(2));
data = rcar_pci_read_reg(pcie, MACSR);
if (rcar_pci_read_reg(pcie, PMSR) &&
!(rcar_pci_read_reg(pcie, PCIETCTLR) & DL_DOWN))
*val = rcar_pci_read_reg(pcie, reg);
*data = rcar_pci_read_reg(pcie, PCICONF(index));
rcar_pci_write_reg(pcie, rcar_pci_read_reg(pcie, PCIEERRFR), PCIEERRFR);
if (rcar_pci_read_reg(pcie, PCIEERRFR) & UNSUPPORTED_REQUEST)
if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) != LINK_SPEED_5_0GTS)
if (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE) {
macsr = rcar_pci_read_reg(pcie, MACSR);
macsr = rcar_pci_read_reg(pcie, MACSR);
if (rcar_pci_read_reg(pcie, H1_PCIEPHYADRR) & PHY_ACK)
reg = rcar_pci_read_reg(pcie, PCIEMSIFR);
reg = rcar_pci_read_reg(pcie, PCIEMSIFR);
value = rcar_pci_read_reg(pcie, PCIEMSIIER);
value = rcar_pci_read_reg(pcie, PCIEMSIIER);
msg->address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE;
msg->address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR);
u32 val = rcar_pci_read_reg(pcie, where & ~3);
data = rcar_pci_read_reg(pcie, MACSR);
u32 val = rcar_pci_read_reg(pcie, where & ~3);
if (rcar_pci_read_reg(pcie, PCIEPHYSR) & PHYRDY)
if ((rcar_pci_read_reg(pcie, PCIETSTR) & DATA_LINK_ACTIVE))
u32 rcar_pci_read_reg(struct rcar_pcie *pcie, unsigned int reg);