drivers/gpu/drm/i915/gt/intel_rc6.c

145

if (GRAPHICS_VER(rc6_to_i915(rc6)) >= 11) {

drivers/gpu/drm/i915/gt/intel_rc6.c

148

} else if (IS_SKYLAKE(rc6_to_i915(rc6))) {

drivers/gpu/drm/i915/gt/intel_rc6.c

203

if (!NEEDS_WaRsDisableCoarsePowerGating(rc6_to_i915(rc6)))

drivers/gpu/drm/i915/gt/intel_rc6.c

233

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

287

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

307

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

432

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

494

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

531

pm_runtime_get_sync(rc6_to_i915(rc6)->drm.dev);

drivers/gpu/drm/i915/gt/intel_rc6.c

538

pm_runtime_put(rc6_to_i915(rc6)->drm.dev);

drivers/gpu/drm/i915/gt/intel_rc6.c

544

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

559

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

597

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

636

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/intel_rc6.c

703

if (HAS_RC6pp(rc6_to_i915(rc6)))

drivers/gpu/drm/i915/gt/intel_rc6.c

705

else if (HAS_RC6p(rc6_to_i915(rc6)))

drivers/gpu/drm/i915/gt/intel_rc6.c

731

if (IS_METEORLAKE(rc6_to_i915(rc6)) && rc6->bios_state_captured)

drivers/gpu/drm/i915/gt/intel_rc6.c

789

struct drm_i915_private *i915 = rc6_to_i915(rc6);

drivers/gpu/drm/i915/gt/selftest_rc6.c

24

if (HAS_RC6p(rc6_to_i915(rc6)))

drivers/gpu/drm/i915/gt/selftest_rc6.c

26

if (HAS_RC6pp(rc6_to_i915(rc6)))