drivers/gpu/drm/amd/ras/rascore/ras.h

339

enum ras_block_id block, struct ras_ecc_count *ecc_count);

drivers/gpu/drm/amd/ras/rascore/ras.h

348

const char *ras_core_get_ras_block_name(enum ras_block_id block_id);

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

190

if ((aca_blk->blk_info->ras_block_id == RAS_BLOCK_ID__GFX) &&

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

220

if (aca_blk->blk_info->ras_block_id == RAS_BLOCK_ID__GFX)

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

233

if ((aca_blk->blk_info->ras_block_id == RAS_BLOCK_ID__UMC) &&

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

250

bank->seq_no, aca_blk->blk_info->ras_block_id, info->socket_id, info->die_id,

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

291

if (aca_blk->blk_info->ras_block_id == RAS_BLOCK_ID__UMC)

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

438

enum ras_block_id blk;

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

656

aca_blk = &ras_aca->aca_blk[ip_func->block_info[i]->ras_block_id];

drivers/gpu/drm/amd/ras/rascore/ras_aca.h

129

u32 ras_block_id;

drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c

315

.ras_block_id = RAS_BLOCK_ID__UMC,

drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c

326

.ras_block_id = RAS_BLOCK_ID__GFX,

drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c

337

.ras_block_id = RAS_BLOCK_ID__SDMA,

drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c

348

.ras_block_id = RAS_BLOCK_ID__MMHUB,

drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c

359

.ras_block_id = RAS_BLOCK_ID__XGMI_WAFL,

drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c

60

(aca_blk->blk_info->ras_block_id == RAS_BLOCK_ID__GFX))

drivers/gpu/drm/amd/ras/rascore/ras_cmd.c

342

static enum ras_ta_block __get_ras_ta_block(enum ras_block_id block)

drivers/gpu/drm/amd/ras/rascore/ras_core.c

480

enum ras_block_id block, struct ras_ecc_count *ecc_count)

drivers/gpu/drm/amd/ras/rascore/ras_core.c

53

const char *ras_core_get_ras_block_name(enum ras_block_id block_id)