CPG_FRQCRB
{ "zx", CPG_FRQCRB, 12 },
{ "zs", CPG_FRQCRB, 8 },
{ "hp", CPG_FRQCRB, 4 },
{ "hp", CPG_FRQCRB, 4 },
reg = CPG_FRQCRB;
{ "zx", "pll1", CPG_FRQCRB, 12 },
{ "hp", "pll1", CPG_FRQCRB, 4 },
zclk->kick_reg = base + CPG_FRQCRB;
zclk->kick_reg = reg + CPG_FRQCRB;
CPG_FRQCRB, 0);
zclk->reg = reg + CPG_FRQCRB;
zclk->kick_reg = reg + CPG_FRQCRB;