Symbol: queue_reset
drivers/cxl/core/region.c
431
rc = queue_reset(cxlr);
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c
279
uint32_t queue_reset, i;
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c
284
queue_reset = RREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE_RESET_REQ_6_1_1));
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c
286
queue_reset = RREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE_RESET_REQ));
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c
288
queue_reset = REG_SET_FIELD(queue_reset, VPEC_QUEUE_RESET_REQ, QUEUE0_RESET, 1);
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c
291
WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE_RESET_REQ_6_1_1), queue_reset);
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c
295
WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE_RESET_REQ), queue_reset);
drivers/gpu/drm/radeon/cik.c
7549
bool queue_reset = false;
drivers/gpu/drm/radeon/cik.c
7956
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
7960
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
7964
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
7977
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
7981
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
7985
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
8046
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
8050
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
8054
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
8061
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
8065
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
8069
queue_reset = true;
drivers/gpu/drm/radeon/cik.c
8089
if (queue_reset) {
drivers/virtio/virtio_pci_modern.c
410
if (vp_check_common_size_one_feature(vdev, VIRTIO_F_RING_RESET, queue_reset))
drivers/virtio/virtio_pci_modern_dev.c
209
offsetof(struct virtio_pci_modern_common_cfg, queue_reset));
drivers/virtio/virtio_pci_modern_dev.c
519
return vp_ioread16(&cfg->queue_reset);
drivers/virtio/virtio_pci_modern_dev.c
535
vp_iowrite16(1, &cfg->queue_reset);
drivers/virtio/virtio_pci_modern_dev.c
537
while (vp_ioread16(&cfg->queue_reset))
include/uapi/linux/virtio_pci.h
192
__le16 queue_reset; /* read-write */